JPH06343044A - Reference voltage generating circuit - Google Patents

Abstract

PURPOSE:To accurately apply the differential input voltage to both ends of a reference resistor array. CONSTITUTION:An emitter follower circuit 28 includes a series circuit of resistors 3a-3d connected between the emitter outputs of an emitter follower resistor TR 2 whose base is connected to an input terminal 9 and an emitter follower TR 4 whose base is connected to an input terminal 8. A current detecting circuit 29 generates the output currents in response to the output potentials of the emitters of both TR 2 and 4 and also generates a detection output current that is defined by subtracting a 2nd detection current of smaller value from a 1st detection current of larger value. A current compensating circuit 30 generates both positive and negative polar compensating currents based on the detection output current generated by the circuit 29 and then applies these compensating currents to both ends of the series circuit of resistors 3a-3d. In such a constitution, the operating currents of both TR 2 and 4 are never affected by the differential input voltage and the reference voltage can be divided with high accuracy.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reference voltage generating circuit for a serial / parallel A / D converter.

[0002]

2. Description of the Related Art Recently, all-parallel A / D converters have been the mainstream of A / D converters in recent years. However, in order to reduce power consumption and chip size, serial / parallel A / D converters are used. D converters have become the mainstream. When converting an analog signal into a digital signal, a means for inputting the analog signal to the reference voltage becomes a problem, and various methods have been proposed.

A conventional reference voltage generating circuit will be described below. FIG. 2 is a circuit diagram of an example of a conventional reference voltage generating circuit that is an analog signal input means. In the figure,
1 is a first constant potential, 2 and 4 are transistors, 3a,
3b, 3c, 3d are resistors having a resistance value R, 5 and 6 are constant current sources having a current value I ₀ , 7 is a second constant potential, 8 is a second input terminal, and 9 is a first input terminal. .

In the conventional reference voltage generating circuit, the transistors 2 and 4 are emitter follower transistors in which the current sources 5 and 6 are connected to the respective emitter circuits, and resistors 3a to 3d are connected in series between the emitter outputs. It is connected and a differential input signal is input between the input terminals 8 and 9. The operation of the reference voltage generating circuit thus configured will be described below. First, the first input terminal 9 receives the input voltage V _{the IH,} V _{the IH} to the second input terminal 8
Input a lower input voltage V _IL . Next, the reference resistance 3
When the base-emitter voltage of the transistor 2 is V _BE1 , a voltage V _IH −V _BE1 is applied to the upper end of a, and when the base-emitter voltage of the transistor 4 is V _BE2 , V _IL is applied to the lower end of the reference resistor 3 d. A voltage of −V _BE2 is applied. Therefore V _{the IH} -V _IL becomes voltage is to be applied to both ends of the reference resistor string. The final stage conversion is performed based on this applied voltage.

[0005]

In the [0005] However the conventional structure described above, the reference resistor string (V _IH -V _IL) / 4R becomes the reference current Ir flows. Therefore, the emitter current I _E1 of the transistor 2 becomes I ₀ + (V _IH −V _IL ) / 4R.
On the other hand, the emitter current I _E2 of the transistor 4 is I ₀ − (V _IH
-V _IL ) / 4R. This current difference causes V _BE1 and V
_It has a drawback that a difference occurs in _BE2 and the differential input voltage V _IH -V _IL is not accurately applied across the reference resistor string.

The present invention solves the above-mentioned conventional problems, and an object of the present invention is to provide a reference voltage generating circuit capable of accurately applying a differential input voltage V _IH -V _IL across the reference resistor string. And

[0007]

A reference voltage generating circuit according to the present invention comprises an emitter follower circuit, a current detecting circuit and a current compensating circuit. The emitter follower circuit includes a first transistor for an emitter follower having a first input terminal connected to a base, a second transistor for an emitter follower having a second input terminal connected to a base, and first and second
And a plurality of resistors connected in series between the emitters of the transistors.

The current detection circuit has an input terminal connected to each emitter of the first and second transistors, generates a detection current according to each potential of the emitter, and outputs a current value from the first detection current having a large current value. To generate a detection output current from which the second detection current having a small value is subtracted. The current compensation circuit receives the detection output current of the current detection circuit as input, converts the detection output current into positive and negative compensation currents, and supplies the positive compensation current to the emitter of the first transistor, and A negative compensating current is supplied to the emitter of the second transistor.

[0009]

The reference voltage generating circuit of the present invention ensures a high input impedance and has the above-mentioned configuration.
A current according to the differential emitter output potential is detected by the current detection circuit, and the positive / negative of the detected current value is supplied to both ends of the resistor string.Therefore, the operating current of each transistor for the emitter follower is larger than the input voltage. It becomes constant irrespective of the situation, the influence of the nonlinear characteristic between the input and output of the emitter follower transistor is eliminated, and the differential input voltage V _IH −V _IL can be accurately applied to both ends of the reference resistor string.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram of a reference voltage generating circuit in the case of performing 2-bit conversion according to an embodiment of the present invention. In FIG. 1, 1 is a first constant potential, 2 is a first NPN transistor, 3a, 3b, 3
c, 3d is the reference resistance of the resistance value R, the second NPN transistor 4, the first constant current circuit of the current value I ₀ 5, the second constant current circuit of the current value I ₀ 6, 7 first 2 is a constant potential, 8 is a second input terminal, and 9 is a first input terminal.

Reference numeral 10 is a first resistor, 11 is a first PNP transistor, 12 is a third NPN transistor, 13 is a second resistor having a resistance value of 4R, 14 is a third resistor, and 15 is a second PNP. A transistor, 16 is a fourth NPN transistor, and 17 is a fourth resistor having a resistance value of 4R. 18 is a fifth resistor, 19 is a third PNP transistor, 20 is a sixth NPN transistor, 21 is a ninth resistor, 22 is a sixth resistor, 23 is a fourth PNP transistor, and 24 is a seventh resistor. A resistor, 25 is a fifth PNP transistor, 26 is a fifth NPN transistor, and 27 is an eighth resistor.

28 is an emitter follower circuit and 29 is a current detector.
The output circuit, 30 is a current compensation circuit. Configured as above
The reference voltage generation circuit of this embodiment, which has been
The operation of will be described. First, V is applied to the first input terminal 9._IHNaruiri
When a force voltage is applied, the emitter of transistor 16
Potential is V_IH-2V_BETherefore, the transistor 16
Rector current I_C16Is (V_IH-2V_BE) / 4R. One
The V input to the second input terminal 8._ILInput voltage is applied
Then, the potential of the emitter of the transistor 12 is V _IL-2V
_BETherefore, the collector current I of the transistor 12 is_C12
Is (V_IL-2V _BE) / 4R.

Next, the current I _C12 is applied to the transistor 11,
By reversing the current direction by the transistor 12, the resistor 14, and the transistor 15, the difference current from the current I _C16 becomes the collector current I _{C19 of the} transistor 19. By causing the current I _C19 to flow in the emitter terminal of the transistor 2 with the current directions reversed by the transistor 23 and the resistor 22, it is possible to compensate the current flowing out to the reference resistor string.

Next, the current I _C19 is supplied to the transistor 25,
By reversing the current direction by the transistor 26, the transistor 20, the resistor 24, the resistor 27, and the resistor 21 and blowing out from the emitter terminal of the transistor 4, it becomes possible to compensate the current flowing from the reference resistor string. By performing this current compensation, the differential input voltage V _IH −V _IL can be accurately applied across the reference resistor string.

As described above, according to this embodiment, the differential input voltage V _IH -V _IL can be accurately applied to both ends of the reference resistance series by compensating the current flowing through the reference resistance series. . In this embodiment, the PNP transistor, the NPN transistor and the resistor are used in the circuit for compensating the current flowing through the reference resistor string, but the same effect can be obtained by using the P channel MOS transistor and the N channel MOS transistor. Is obvious.

[0016]

According to the reference voltage generating circuit of the present invention, the differential input voltage V is applied across the resistor string for dividing the reference voltage without being affected by the non-linear characteristic between the input and output of the emitter follower receiving the differential input signal. It has a special effect that _IH- V _IL can be accurately applied.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a reference voltage generating circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of a conventional reference voltage generating circuit.

[Explanation of symbols]

1 1st constant potential 2, 4 Transistor for emitter follower 3a-3b Reference resistance of resistance value 5, 6 Constant current source of current value I ₀ 7 2nd constant potential 8 2nd input terminal 9 1st input Terminals 10, 14, 18, 21, 22, 24, 27 Resistors 11, 15, 19, 23, 25 PNP transistors 12, 16 Current detecting transistors 13, 17 Resistors with resistance value 4R 20, 26 NPN transistors 28 Emitter follower circuits 29 Current detection circuit 30 Current compensation circuit

Claims (2)

[Claims] 1. A first transistor for an emitter follower having a first input terminal connected to a base, a second transistor for an emitter follower having a second input terminal connected to a base, and the first and the first transistors. An emitter follower circuit including a plurality of resistors connected in series between the emitters of the two transistors, and an input terminal connected to each emitter of the first and second transistors, and a detection current corresponding to each potential of the emitter. A current detection circuit that generates a detection output current that is generated and that has a second detection current with a small current value subtracted from a first detection current with a large current value; and the detection output current as an input, and the detection output current is a positive electrode. And a negative compensation current is supplied to the emitter of the first transistor, and the negative compensation current is converted to the second compensation current. Reference voltage generating circuit that includes a current compensation circuit for supplying to the emitter of the transistor. 2. The current detecting circuit, wherein the emitter of the first transistor is connected to the base, the emitter of the third transistor is connected to one end of the first resistor, and the emitter of the second transistor is connected to the base. One end of the second resistor is connected to the emitter of the fourth transistor, the other ends of the first and second resistors are commonly connected, and the fourth resistor is connected.
2. The reference voltage generating circuit according to claim 1, wherein the collector current of the transistor is mirror-inverted and the collector current of the third transistor is added to output as a detection output current.