JPH06338605A - Solid-state image pick-up device and manufacture thereof - Google Patents

Abstract

PURPOSE:To realize the wide band spectral characteristics of photodiode and high precision threshold value controllability of peripheral circuit MOSFET. CONSTITUTION:A p-type implanted layer is formed on the substrate deep part on the whole surface of a picture element part A and peripheral circuit part B by accelerated ion implantation furthermore, a shallow p-type implanted layer is formed on the substrate surface on the whole surface of the picture element part A and the peripheral circuit part B by ion implantation, layer, the p-type implanted layer is diffused at the heat-treatment temperature of 900 deg.-1100 deg.C so that the dual structured p-type wells comprising the p-type well 1 on the substrate surface and the other p-type well 2 on the substrate deep part may be formed. Thus, an n-type impurity region 4 of photodiode is deeply formed so as to intrude into a p-type well 2 in the substrate deep part realizing the wide band spectral characteristics of photodiode furthermore enabling the threshold value of MOSFET in the peripheral circuit part B to be independently controlled also realizing the high precision threshold value controllability of the same.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CCD solid-state image pickup device and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, miniaturization of CCD solid-state image pickup devices has become necessary as video cameras become smaller and have higher resolution. Therefore, a method of forming an impurity region by high-acceleration ion implantation and low-temperature heat treatment has become effective. By using this technique, it is possible to suppress the diffusion of the impurity species from the n-type impurity region and the p-type impurity region, respectively, and it is possible to form the target impurity region in a finer region. Further, by lowering the temperature, contamination of heavy metals from the electric furnace body can be reduced, and a CCD solid-state imaging device with a high S / N ratio can be realized. Also in the conventional technique, this method is adopted, and the p-type well of the CCD solid-state imaging device is formed in the deep portion of the substrate by high-acceleration ion implantation and low-temperature drive-in.

The structure of a conventional solid-state image pickup device will be described below with reference to FIGS. 5 and 6. FIG. 5 is a cross-sectional structural view of a CCD solid-state image pickup device in the prior art, and FIG. 6 is a cross-sectional view of a peripheral circuit MOSFET channel part when a p-type well is formed in a deep portion of a substrate to broaden the spectral characteristics of a photodiode in the prior art. It is a figure which shows the simulation result of an impurity distribution.

In FIG. 5, 3 is an n-type silicon substrate, 4
Is the n of the photodiode that accumulates the signal charge formed to reach the deep portion of the substrate by the high-acceleration ion implantation method.
P-type impurity region, 5 is a p-type impurity region for preventing the signal charges accumulated in the photodiode from disappearing due to recombination on the substrate surface, 6 is a source / drain of the peripheral circuit MOSFET, and 8 is a p-type serving as an isolation region. Impurity region, 9 is CCD
P-type well of the channel part, 10 is n of the CCD channel part
Type well.

Reference numeral 11 is a first gate oxide film, and 12 is a pixel portion A.
Transfer gate of the solid-state image sensor of the
The gate of the OSFET, 14 is the second gate oxide film, 15 is the aluminum light-shielding portion of the solid-state image sensor, 16 is aluminum wiring, 17
Is a protective film, 26 is a p-type well formed by high-acceleration ion implantation and low-temperature heat treatment in the deep part of the substrate over the entire surface of the pixel portion A and the peripheral circuit portion B, and 27 is a MOSFE of the peripheral circuit portion B.
It is a channel part of T.

In the solid-state image pickup device, photons incident from the upper surface of the pixel portion A enter the n-type silicon substrate 3 from a region without the aluminum light-shielding portion 15, and are converted into photoelectrons by photoelectric conversion near the inside of the n-type impurity region 4 of the photodiode. It is converted and accumulated in a potential well formed in the n-type impurity region 4 of the photodiode. CC this accumulated charge
Image recognition is performed by taking out through the n-type well 10 of the D channel portion. Therefore, blue sensitivity is improved if the n-type impurity region 4 of the photodiode reaches the vicinity of the substrate surface, and red sensitivity is improved if the structure reaches the deep portion of the substrate.

In the prior art, the temperature of the entire process is lowered in order to prevent heavy metal contamination from the electric furnace body and prevent blurring of the impurity distribution due to excessive diffusion from each diffusion layer to enable miniaturization. Therefore, since diffusion of the n-type impurity region 4 of the photodiode is suppressed, in the conventional solid-state imaging device, the acceleration energy of the phosphorus implantation for forming the n-type impurity region 4 of the photodiode is 500 KeV or more, and the p-type The acceleration energy of boron implantation for forming the well 26 is increased to 1 MeV or more.

[0008]

The above-mentioned conventional techniques have the following problems. In the prior art, when the boron implantation for forming the p-type well 26 is performed with an acceleration energy of about 1 MeV, the structure in which the n-type impurity region 4 of the photodiode does not sufficiently reach the deep portion of the substrate is obtained, and the red sensitivity is sufficient. is not. Therefore, in order to make the n-type impurity region 4 of the photodiode reach a deeper portion of the substrate, p
It is necessary to increase the acceleration energy of boron implantation for forming the mold well 26 to 1.4 MeV or more.

However, if the acceleration energy of the boron implantation is increased to 1.4 MeV or more, as shown in FIG. 6, the concentration of p-type impurities (p-type impurity distribution) on the substrate surface of the channel portion of the MOSFET in the peripheral circuit portion B is increased. 30), the exposed portion 28 of the n-type impurity region appears, or the impurity concentration (impurity distribution 29) decreases, and the peripheral circuit portion B
The threshold value of the MOSFET cannot be set to a desired value.
Reference numeral 26 is a p-type well formed in the deep portion of the substrate, 28 is an inversion region on the substrate surface of the MOSFET channel portion 27 of the peripheral circuit portion B, and 29 is an impurity in the cross section of the MOSFET channel portion 27 of the peripheral circuit portion B. A distribution 30 is a p-type impurity distribution in the cross section of the MOSFET channel portion 27 of the peripheral circuit portion B.

Further, in order to set the threshold value of the MOSFET in the peripheral circuit section B to a desired value, if an attempt is made to secure the concentration of the p-type well 26 on the substrate surface, the p-type well 26 will be
The acceleration energy of boron implantation for forming the n-type impurity region 4 of the photodiode must be reduced.
Does not reach the substrate deep enough, and the red sensitivity is reduced. Therefore, the spectral characteristics of the photodiode are deteriorated.

As described above, according to the conventional technique, it is not possible to achieve both the broadband spectral characteristic and the highly accurate threshold controllability of the MOSFET in the peripheral circuit. The present invention solves the above-mentioned problems of the prior art, and provides a CCD solid-state imaging device capable of realizing highly accurate threshold controllability of a photodiode having a spectral characteristic in a wide band and a peripheral circuit MOSFET, and a manufacturing method thereof. With the goal.

[0012]

According to the solid-state image pickup device of the present invention, a p-type well is formed so as to have two peaks at a substrate surface portion and a substrate deep portion on the main surface of an n-type semiconductor substrate, and The n-type impurity region is deeply formed so as to penetrate into the p-type well in the deep part of the substrate.

The method of manufacturing a solid-state image pickup device according to the present invention comprises:
The entire surface of the pixel portion and the peripheral circuit portion of the semiconductor substrate is ion-implanted with boron at an implantation energy of 30 KeV to 150 KeV, and at the same time 1.4 MeV to 2.0 MeV.
Boron is injected at an injection energy of MeV, and the temperature is 900 ° C or higher.
By performing heat treatment at a heat treatment temperature of 1100 ° C., a p-type impurity well having two peaks is formed on the surface of the substrate and the deep portion of the substrate, and then the n-type impurity region of the photodiode enters the p-type well in the deep portion of the substrate. It is characterized in that it is deeply formed.

[0014]

According to the present invention, it is possible to independently control the concentration and depth of the p-type well formed in the deep portion of the substrate, and the concentration and distribution of the shallow p-type well near the substrate surface. By controlling the distribution of the p-type well formed in the deep part of the substrate and forming the photodiode deep so as to penetrate into the p-type well in the deep part of the substrate, the spectral characteristics of the photodiode can be broadened and at the same time near the surface of the substrate. By adjusting the concentration of the p-type well formed,
The threshold value of the peripheral circuit MOSFET can be controlled.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional structural view of a CCD solid-state image pickup device according to an embodiment of the present invention. In FIG. 1, a pixel portion A shows a pixel portion in the solid-state image pickup device which is composed of a photodiode for performing photoelectric conversion and a CCD transfer region, and a peripheral circuit portion B shows an MO of the peripheral circuit in the solid-state image pickup device.
SFET portion is shown, 1 is a p-type well formed near the surface of the substrate, 2 is a p-type well formed in the deep part of the substrate, 3 is an n-type silicon substrate, and 4 is an n-type impurity region of a photodiode in which signal charges are accumulated Reference numeral 5 denotes a p-type impurity region which prevents the electrons accumulated in the photodiode from disappearing due to surface recombination and reducing the signal charge.

Reference numeral 6 is a source / drain of the peripheral circuit MOSFET, 7 is a channel portion of the peripheral circuit MOSFET, 8 is a p-type impurity region serving as an isolation region of the solid-state image pickup device, and 9 is CC.
P-type well of D channel part, 10 n-type well of CCD channel part, 11 first gate oxide film, 12 transfer gate of solid-state imaging device, 13 gate of peripheral circuit MOSFET, 14 second gate oxide film , 15 is an aluminum light-shielding portion of the solid-state imaging device, 16 is an aluminum wiring portion, and 17 is a protective film.

FIG. 2 is a diagram showing a simulation result of the cross-sectional impurity distribution of the channel portion of the MOSFET in the peripheral circuit portion B of the solid-state image pickup device in one embodiment of the present invention. In FIG. 2, reference numeral 20 is a p-type impurity concentration distribution in the cross section of the peripheral circuit MOSFET channel portion in one embodiment of the present invention, and 21 is the peripheral circuit MO in one embodiment of the present invention.
The impurity distribution of the SFET channel part cross section is shown.

FIG. 3 shows a simulation result of the impurity distribution in the photodiode section cross section of the solid-state image sensor according to one embodiment of the present invention and the photodiode section cross section of the conventional solid-state image sensor, and the potential distribution when there is no signal charge. It is a figure which shows comparison. In FIG. 3, reference numeral 22 is an impurity concentration distribution in the cross section of the solid-state imaging device photodiode portion in the conventional technique, 23 is an impurity concentration distribution in the cross-section of the solid-state imaging device photodiode portion in one embodiment of the present invention, and 24 is a solid state in the conventional technique. Potential distribution when there is no signal charge in the cross section of the imaging device photodiode, 25 is a potential distribution when there is no signal charge in the cross section of the solid-state imaging device photodiode part in one embodiment of the present invention, and 26 is the substrate in the prior art. The p-type well formed in the deep portion is shown.

In the structure of the solid-state image pickup device according to one embodiment of the present invention, as shown in FIG. 1, the p-type well 2 is formed at a position deep enough to broaden the spectral characteristics of the photodiode, and further, the substrate is formed. In order to control the impurity distribution on the surface, a p-type well having a double structure in which the p-type well 1 is formed near the substrate surface is used. As a result, as shown in FIG. 2, the impurity concentration on the substrate surface of the peripheral circuit section B can be formed to a concentration sufficient for the threshold value of the MOSFET of the peripheral circuit section B to obtain a desired value, and at the same time, the figure As shown in FIG. 3, as compared with the impurity distribution 22 of the prior art, the impurity distribution 23 in the photodiode section in one embodiment of the present invention has the n-type impurity region 4 and the p-type well 2 of the photodiode located deeper in the substrate. As a result, the potential well formed in the photodiode portion when there is no signal charge can be deeply formed deep in the substrate.

In this way, the p-type wells 1 and 2 which can be independently controlled are formed near the surface of the substrate and in the deep portion of the substrate.
By using the double p-type well structure, the peripheral circuit MO
It is possible to realize a CCD solid-state imaging device that simultaneously enables the high threshold controllability of the SFET and the spectral characteristics of the photodiode in a wide band. A method of manufacturing the solid-state imaging device according to the embodiment of the present invention will be described with reference to FIG. First, FIG.
As shown in (a), the p-type well implantation layer 18 is formed by high-energy ion implantation to obtain 1.4 MeV to 2.0 Me.
V acceleration energy, 1.8 × 10 ¹¹ / cm ^{2 to} 2.4
It is formed by implanting boron on the entire surface of the pixel portion A and the peripheral circuit portion B at a dose amount of × 10 ¹¹ / cm ² .

The lower limit of the implantation energy is determined by simulation so that the lower boundary of the potential well formed in the photodiode portion is 2.4 μm from the substrate surface.
The upper limit is a value determined by the upper limit that can be used by the ion implanter. The implantation dose is optimized by simulation and experiment so that the substrate potential during operation of the solid-state imaging device is 8 to 10V.

Next, as shown in FIG. 4B, the p-type well implantation layer 19 is formed with an ion implantation method of 30 KeV.
Acceleration energy of 150 KeV, 1 × 10 ¹¹ / cm ² ~
Boron is implanted into the entire surface of the pixel portion A and the peripheral circuit portion B at a dose amount of 5 × 10 ¹¹ / cm ² . The lower limit value of the implantation energy is determined by the lower limit value of the ion implanter, and the upper limit value does not affect the maximum charge amount accumulated in the photodiode, CCD characteristics, etc. It is optimized by simulation and experiment to be possible. The order of forming the p-type well injection layer 1 and the p-type well injection layer 2 may be exchanged.

Further, after the above steps, in order to recover the crystal defects caused by the ion implantation and to control the impurity concentration on the substrate surface of the peripheral circuit section B, the heat treatment temperature is set to 900 ° C. to 1100 ° C. in an inert gas atmosphere. Heat treatment is performed for 3 minutes to 360 minutes. The lower limit value of the heat treatment temperature is optimized by simulation and experiment from the recovery efficiency of crystal defects and the diffusion rate of the p-type well 1 on the substrate surface, and the upper limit value reduces heavy metal contamination from the electric furnace body. It is the one optimized by experiments from the conditions. The heat treatment time is optimized by simulation and experiment from the viewpoint of the degree of recovery of crystal defects and the concentration of the p-type well 1 on the substrate surface.

Recovery of crystal defects by the heat treatment step, p
After the formation of the mold well, as shown in FIG. 4C, the p-type well 9 of the CCD channel section of the solid-state image sensor, the n-type well 10 of the CCD channel section of the solid-state image sensor, and the p-type impurity to be the separation region are formed. The region 8, the n-type impurity region 4 of the photodiode, the source / drain 6 of the MOSFET in the peripheral circuit portion B, the gate electrode 12 and the like are formed, and wiring,
A protective film and the like are formed to complete the solid-state imaging device.

As described above, by using the double-structured p-type wells 1 and 2 of the present invention, the lower boundary of the potential well formed in the n-type impurity region 4 of the photodiode is 2. 4 μm to 2.8 μm,
The potential well can be formed so as to reach a large depth in the substrate, as compared with 2.1 μm in the case of the p-type well of the prior art.

As a result, the red sensitivity of the photodiode is improved by 20% or more, and the spectral characteristics of the photodiode are significantly improved. At the same time, the MOSFE of the peripheral circuit section B is
The threshold value control of T can be easily performed independently without affecting the characteristics of the solid-state image pickup device. Further, since the conventional photomask is used as it is, increase in defects due to mask alignment error and the like and increase in cost due to increase in photomask do not occur.

[0027]

According to the CCD solid-state imaging device and the manufacturing method thereof of the present invention, the concentration and depth of the p-type well formed in the deep portion of the substrate, the concentration of the shallow p-type well near the substrate surface,
It is possible to control the distribution independently. As a result, by controlling the distribution of the p-type well formed in the deep portion of the substrate and forming the photodiode deep so as to penetrate into the p-type well in the deep portion of the substrate, the spectral characteristics of the photodiode are broadened and at the same time the substrate is By adjusting the concentration of the p-type well formed near the surface, the threshold value of the MOSFET in the peripheral circuit section can be controlled.

[Brief description of drawings]

FIG. 1 is a sectional structural view of a CCD solid-state image pickup device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a simulation result of impurity distribution in a cross section of a channel portion of a MOSFET in a peripheral circuit portion B of a solid-state imaging device according to an embodiment of the present invention.

FIG. 3 is a comparison of the simulation results of the impurity distribution in the photodiode section cross section of the solid-state image sensor according to the embodiment of the present invention and the photodiode section cross section of the conventional solid-state image sensor, and the potential distribution in the absence of signal charges. FIG.

4A to 4C are cross-sectional structural views in order of the manufacturing steps of the solid-state imaging device according to the embodiment of the present invention.

FIG. 5 is a cross-sectional structure diagram of a solid-state imaging device in the related art.

FIG. 6 is a diagram showing a simulation result of an impurity distribution in a cross section of a peripheral circuit MOSFET channel portion in the case where a p-type well is formed deep in a deep portion of a substrate in order to broaden the spectral characteristic of a photodiode in a conventional technique.

[Explanation of symbols]

 1 p-type well on substrate surface 2 p-type well on deep substrate 3 n-type silicon substrate 4 n-type impurity region of photodiode 5 p-type impurity region 6 source / drain of MOSFET 7 channel part of MOSFET 8 p-type impurity region 10 CCD channel n-type well

Claims (2)

[Claims] 1. A C in which a photodiode, a CCD transfer channel, and a peripheral circuit section are formed on an n-type semiconductor substrate.
In the CD solid-state imaging device, a p-type well is formed so as to have two peaks in a substrate surface portion on a main surface of the n-type semiconductor substrate and a substrate deep portion, and an n-type impurity region of the photodiode is formed on the substrate. A solid-state imaging device, which is deeply formed so as to penetrate into the deep p-type well. 2. A C formed by forming a photodiode, a CCD transfer channel and a peripheral circuit section on an n-type semiconductor substrate.
A method for manufacturing a CD solid-state image pickup device, comprising: 30 KeV-150 by ion implantation on the entire surface of a pixel portion and a peripheral circuit portion.
While injecting boron with an injection energy of KeV,
Boron is implanted with an implantation energy of 1.4 MeV to 2.0 MeV and heat treatment at a heat treatment temperature of 900 ° C. to 1100 ° C. is performed to form a p-type impurity well having two peaks on the substrate surface and the substrate deep portion, Thereafter, the n-type impurity region of the photodiode is deeply formed so as to penetrate into the p-type well in the deep portion of the substrate.