JPH06334028A - Manufacture of dielectric isolation substrate - Google Patents

Abstract

PURPOSE:To shorten a thermal oxidation time necessary for embedding an oxide film in a recess without changing the width and depth of a groove by forming a non-oxidizable film on the side wall of the groove in an oxidizing atmosphere in the groove and recess formed in a substrate. CONSTITUTION:A recess 2 having a predetermined depth is formed in the principal face to be bonded to another substrate of one substrate 1. Also, a groove 3, of which depth is greater than that of the recess 2, is formed in the principal face to be bonded of one substrate. Further, the groove 3 is formed to have an opening in the edge of the substrate 1. Then, the two substrates are directly bonded into a bonded substrate. In a processing before the bonding, a non- oxidizable film 4 is formed on the side wall of the groove 3 formed in one substrate 1. Thus, the decrease of the area through which an oxidizing gas passes can be prevented so that the oxidizing gas easily reaches the recess 2 through the groove 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a dielectric isolation substrate, and more particularly to an SOI using a substrate bonding technique.
(Silicon On Insulator) A method for manufacturing a substrate.

[0002]

2. Description of the Related Art A dielectric isolation method has been attracting attention as an element isolation method in a semiconductor integrated circuit. As one example, a direct bonding technique for a silicon substrate and an oxide film growth by thermal oxidation are used to form a dielectric embedded layer inside the substrate. As a method, a method of filling and burying thermally oxidized silicon has been proposed (for example, JP-A-2-96350).

In this method, as shown in FIG. 10, a shallow recess 23 (FIG. 10A) and an oxygen introducing groove 24 (FIG. 10B) communicating with the recess 23 are formed in the first surface. The semiconductor substrate 21 and the second semiconductor substrate 22 are directly bonded (see FIG. 1).
0 (c)), followed by heat treatment in an oxidizing gas atmosphere,
By supplying gas into the recess 23 along the groove 24, the thermal silicon oxide 25 is embedded (see FIG. 10).
(D)) After that, grinding until the groove 24 is exposed on the surface,
This is a method of polishing (FIG. 10E), and it is possible to selectively form a region electrically isolated by thermal oxide silicon.

[0004]

However, in the above-mentioned conventional method, in the thermal oxidation step of filling the thermal oxide with silicon oxide in the concave portion, the thermal silicon oxide is filled in the concave portion from the edge of the substrate to the center along with the elapse of thermal oxidation time. It takes time to oxidize the central part because it is performed sequentially toward the parts. This will be explained below.

The oxidizing gas is supplied to the concave portion through a groove communicating with the end portion of the substrate which serves as a supply port.
The growth rate of the thermal oxide film is high in the recessed region near the supply port, and thus in the vicinity of the substrate end where the gas supply amount is large, whereas the growth rate is low in the substrate center where the supply amount is small. Then, similarly to the growth of the thermal oxide film in the concave portion, the thermal oxide film growing on the side wall of the groove also grows rapidly in the region near the edge of the substrate.
Therefore, as thermal oxidation progresses, the opening area of the groove near the edge of the substrate, that is, the width and depth of the groove becomes smaller, and it becomes more difficult to supply the gas to the central portion of the substrate. Therefore, the thermal oxidation time required for completely filling and filling the central portion of the substrate is further increased by the growth of the thermal oxide film on the side wall of the groove.

Therefore, in order to shorten the thermal oxidation time,
The width and depth of the groove may be increased in advance in consideration of the growth of the oxide film on the side wall of the groove, but if the width of the groove is widened, it is deposited in the later step of filling the groove with polycrystalline silicon. It is necessary to increase the amount. This is because, for example, when the width of the opened groove is smaller than the depth of the groove, the groove width determines the amount of deposition required for burying. It is also difficult to form the groove deep when the groove width is narrowed due to problems such as aspect ratio. Also, in the process of exposing the groove to the surface by grinding / polishing, if the groove is exposed during the grinding step, the groove will be chipped and the groove must be exposed by polishing. This increases the polishing time and deteriorates the processing accuracy of the substrate.
The above problems become more remarkable when the diameter of the substrate is increased.

The present invention pays attention to various problems as described above, and makes it possible to shorten the thermal oxidation time required to fill the oxide film in the recess without changing the width and depth of the groove to be formed. An object is to provide a method for manufacturing a separation substrate.

[0008]

That is, in the method of manufacturing a dielectric isolation substrate according to the present invention, the first and second semiconductor substrates are bonded to each other to manufacture a semiconductor substrate having a dielectric buried layer formed therein. A predetermined method in a region corresponding to a dielectric burying layer formation position on at least one of the first semiconductor substrate and the second semiconductor substrate on the main bonding surface with the other semiconductor substrate. A recess having a depth is formed, and a groove having an opening at a position communicating with the space formed by the recess and having a depth set to be deeper than the depth of the recess is provided. A processing step of forming the groove on the main bonding surface of at least one of the first and second semiconductor substrates and at the same time forming the groove so as to have an opening at the substrate end surface of the semiconductor substrate.
Bonding step of directly bonding the semiconductor substrates of
A step of forming an oxidation resistant film on a side wall of the groove formed in at least one of the first and second semiconductor substrates in the processing step at least before the bonding step. And

[0009]

According to the present invention, the first and second semiconductor substrates are bonded to each other and one of the first and second semiconductor substrates is bonded.
Since the oxidation resistant film is formed on the side wall of the groove in the previous period as a pre-step of oxidizing the groove and the recess formed in at least one of the substrates in the oxidizing atmosphere, the groove and the recess are not formed in the oxidizing atmosphere in the previous period. At the time of oxidation, the sidewall of the groove is not oxidized. Therefore,
It is possible to prevent the reduction of the area where the oxidizing gas passes through the groove.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment according to the present invention will be described below with reference to the drawings. 1 to 9 show a cross-sectional structure of a main part of a dielectric isolation substrate manufactured by applying the present invention in the order of manufacturing steps. This embodiment will be described in the order of manufacturing steps. First, as shown in FIG. 1, a part of the mirror surface 1a of the first semiconductor substrate 1 whose at least one surface is mirror-polished is selectively etched by chemical etching or reactive ion etching (hereinafter referred to as RIE) to obtain a depth. 0.05-2.0 μm
To form the concave portion 2.

Next, as shown in FIG. 2, the recess 2 and the mirror surface 1 are formed.
A groove 3 is formed by chemical etching, RIE or a dicing saw along the boundary with a and communicating with the recess 2 and opening at the end of the substrate. Regarding the shape of this groove 3,
It should be determined in consideration of the shape of the recess 2, the substrate size, etc., but at least the depth thereof needs to be larger than the depth of the recess 2. Further, if necessary, after thermally oxidizing the first silicon substrate 1, the thermal oxide film formed by this thermal oxidation is completely removed by, for example, an aqueous solution of hydrogen fluoride, and is generated on the substrate surface in the etching step such as RIE. The crystal damage may be removed.

Next, as shown in FIG. 3, a thermal oxide film 4 is formed on the surface of the first semiconductor substrate 1. Further, a nitride film 5 is formed on this thermal oxide film 4. Next, as shown in FIG. 4, anisotropic (perpendicular) etching is performed by dry etching such as RIE, and etching is performed so that the nitride film 5b formed on the side wall of the groove 3 remains. It is desirable that the etching condition is such that the selection ratio between the nitride film and the oxide film is large and the oxide film acts as a stopper in etching the nitride film. At this time, at least the thermal oxide film 4 formed on the mirror surface 1a of the first semiconductor substrate 1
The nitride film 5a on a must be completely removed. Further, the nitride film 5c on the sidewall of the recess may remain, but
Its height must be lower than the mirror surface 1a of the first semiconductor substrate.

Next, as shown in FIG. 5, the nitride film 5 is etched.
The thermal oxide film 4 in the exposed region with, for example, hydrogen fluoride aqueous solution.
Remove completely with liquid. Next, the first semiconductor substrate 1
At least the second semiconductor substrate 6 whose one surface is mirror-polished
For example, trichlene boil, acetone ultrasonic cleaning, NH_FourO
H: H₂O₂: H ₂Organic with a mixture of O = 1: 1: 4
Removal of substances, HCl: H₂O₂: H₂O = 1: 1: 4 mixture
It is necessary to remove metal contamination by the mixture and wash with pure water sequentially.
Wash thoroughly with. Then, the first semiconductor substrate 1
The natural oxide film on the mirror surface 1a and the mirror surface 6a of the second semiconductor substrate 6 is removed.
For example, HF: H₂Remove with a mixture of O = 1: 50
And then, for example, H₂SO_Four: H₂O₂= 3: 1 mixture, etc.
Immersion in an acidic solution, thermal oxidation, or oxygen
The surface of the substrate is exposed to an acid of about 1 to 100 nm due to tsuma irradiation or the like.
The layer is made hydrophilic to make it hydrophilic and washed with pure water. Next
Dry nitrogen, spin, etc., and adsorb on the substrate surface
After controlling the amount of water,
The mirror surface 1a of the substrate 1 and the mirror surface 6a of the substrate 6 are brought into close contact with each other.
It As a result, the two substrates 1 and 6 are shielded on the surface.
The hydrogen bond of the water molecules adsorbed on the surface of the ranol group
Glued. Further, this bonded substrates 1 and 6 are taken as an example.
For example, it is dried in a vacuum of 10 Torr or less. This and
30g weight / cm to compensate the warpage of substrates 1 and 6
²You may make it apply the above load. After this, the substrate
1 to 6 in an inert atmosphere such as nitrogen or argon
By performing heat treatment at 100 ° C or higher for 1 hour or longer,
A dehydration condensation reaction occurs on the adhesive surface, and the two substrates 1 and 6
Are directly bonded and integrated to form a bonded substrate 7.
However, at this time, the recess 2 and the groove 3 are not joined.
It is hollow.

Next, as shown in FIG. 7, the substrate 7 is heat-treated at 900 ° C. or higher for 1 hour or longer in an oxidizing atmosphere such as dry O ₂ , wet O ₂ or H ₂ / O ₂ mixed combustion gas. Then, the surface of the cavity inside the bonded substrate 7 is oxidized through the groove 3 to form the thermally oxidized silicon layer 8. However, in the oxidization process shown in FIG. 7, the oxidization time is set so that it is completely buried and filled with thermal silicon oxide grown from the surface of the recess 2 and the surface of the substrate 6. At this time, since the thermal oxide film is not formed on the side wall of the groove in which the nitride film 5b is formed, the opening area of the groove with respect to the oxidizing gas is equal to the area of the opening of the thermal oxide film 9 at the bottom of the groove. Although it decreases, the reduction rate is low because there is no growth on the side wall, and the thermal oxidation time can be made shorter than when the nitride film 5b is not formed. Through the above steps, the semiconductor substrate 7 in which the dielectric layer 8 is embedded inside the substrate is formed. After that, as shown in FIG. 8, the substrate 1 is ground and polished from the front surface 1b side until the groove 3 is exposed on the front surface. Thereafter, if necessary, in order to secure the isolation breakdown voltage, the nitride film 5b formed on the side wall may be removed by phosphoric acid or the like, and then thermal oxidation may be performed to form a thick oxide film on the side wall. Next, as shown in FIG. 9, the opened groove 3 is filled with polycrystalline silicon 10 and flattened.

By thus forming the dielectric isolation substrate according to the above-described embodiment, the nitride film formed on the side wall of the groove can secure a path for the oxidizing gas to pass through, so that the substrate end portion and the substrate central portion can be secured. It is possible to reduce the difference in the oxidation rate between and. Therefore, the thermal oxidation time required for embedding the thermal oxide silicon in the recess can be shortened without changing the width and depth of the groove to be formed.

[0016]

As described in detail above, according to the present invention,
When oxidizing the groove and the recess in an oxidizing atmosphere, the oxidation resistant film formed on the sidewall of the groove can prevent the reduction of the area through which the oxidizing gas passes. It becomes easier to reach the recess. Therefore, it is possible to reduce the difference in the oxidation time between the edge portion of the substrate and the central portion of the substrate, and to reduce the thermal oxidation time required for embedding the thermal oxide silicon in the recess without changing the width and depth of the groove to be formed. Can be shortened.

[Brief description of drawings]

FIG. 1 is a manufacturing process diagram of a dielectric isolation substrate showing an embodiment according to the present invention.

FIG. 2 is a manufacturing process diagram of a dielectric isolation substrate showing an embodiment according to the present invention.

FIG. 3 is a manufacturing process diagram of a dielectric isolation substrate showing an embodiment according to the present invention.

FIG. 4 is a manufacturing process diagram of a dielectric isolation substrate showing an embodiment according to the present invention.

FIG. 5 is a manufacturing process diagram of a dielectric isolation substrate showing an embodiment according to the present invention.

FIG. 6 is a manufacturing process diagram of a dielectric isolation substrate showing an embodiment according to the present invention.

FIG. 7 is a manufacturing process diagram of a dielectric isolation substrate showing an embodiment according to the present invention.

FIG. 8 is a manufacturing process diagram of a dielectric isolation substrate showing an embodiment according to the present invention.

FIG. 9 is a manufacturing process diagram of a dielectric isolation substrate showing an embodiment according to the present invention.

FIG. 10 is a manufacturing process diagram of a dielectric isolation substrate in a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 1st semiconductor substrate 1a Mirror surface of 1st semiconductor substrate 2 Recess 3 Groove 4 Thermal oxide film 4a Thermal oxide film on mirror surface of 1st semiconductor substrate 5 Nitride film 5a Nitride film 5b on mirror surface of 1st semiconductor substrate 5b Nitride film 5c Nitride film on sidewall of recess 6 Second semiconductor substrate 6a Mirror surface of second semiconductor substrate 7 Bonding substrate 8 Thermally oxidized silicon layer 9 Thermally oxidized film at groove bottom 10 Polycrystalline silicon

Claims (1)

[Claims] 1. A method of manufacturing a semiconductor substrate in which a dielectric-embedded layer is formed by joining a first semiconductor substrate and a second semiconductor substrate, the method comprising the steps of: A recess having a predetermined depth is formed in a region corresponding to a dielectric burying layer formation position on the main bonding surface of at least one substrate with the other semiconductor substrate, and a space formed by the recess. A groove portion having an opening at a position communicating with the groove and the depth of which is set to be deeper than the depth of the recess on the main bonding surface of at least one of the first and second semiconductor substrates. At the same time as forming, the groove is formed so as to have an opening at the substrate end surface of the semiconductor substrate, a joining step of directly joining the first and second semiconductor substrates to form a joined substrate, at least the joining step Previous stage And a step of forming an oxidation resistant film on a side wall of the groove formed in at least one of the first and second semiconductor substrates in the processing step. Substrate manufacturing method.