JPH06333872A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To suppress the lowering of density of impurities in a polycrystalline silicon film, and to prevent the increase in wiring resistance and contact resistance in a wiring at least having the contact hole part formed in polyside structure. CONSTITUTION:The surface of a tungsten polyside wiring 110a, to be connected to diffusion layers 102aa and 102ab through the intermediary of contact holes 104aa and 104ab, is coated with a phosphorus glass film 107a containing highly concentrated phosphorus. Besides, the surface of the phosphorus glass film 107a is coated with a silicon nitride film 108.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a wiring of a semiconductor device having a polycide structure at least in a contact hole and a method of manufacturing the same.

[0002]

2. Description of the Related Art With the development of multi-layered wiring which plays a part in high integration of semiconductor devices, attention has been paid to refractory metal silicide films as constituent materials of lower layer wiring. For example, in the case of a semiconductor device including a MOS transistor, since the heat resistance is high, the resistance is low, and the interface state is stable, polycrystalline silicon is used for the gate electrode and the wiring in the same layer. Wiring having a polycide structure (polycide wiring) in which a film and a refractory metal silicide film are laminated is used.
When the contact hole has a high aspect ratio, it has high heat resistance and low resistance. Therefore, the contact hole is filled with a polycrystalline silicon film to be flattened and connected to the polycrystalline silicon film. The refractory metal silicide wiring is used.

FIG. 4 is a sectional view of a manufacturing process of a semiconductor device.
Referring to FIG. 1, the conventional polycide wiring is formed as follows. First, the opposite conductivity type diffusion layer 202a is formed on the surface of the one conductivity type semiconductor substrate 201, and the interlayer insulating film 203 is formed on the entire surface. A contact hole 204a reaching the diffusion layer 202a is formed in the interlayer insulating film 203. A polycrystalline silicon film 205 of the opposite conductivity type is formed on the entire surface by the low pressure CVD method or the like. Here, as compared with the film thickness of the polycrystalline silicon film 205, the contact hole 204
Since the aspect ratio of a is large, the contact hole 204a
Is buried by a polycrystalline silicon film 205 [FIG.
(A)]. Next, a silicide film 206 is formed on the entire surface by sputtering or the like [FIG. 4 (b)]. Subsequently, the silicide film 206 and the polycrystalline silicon film 205 are patterned by using a known lithography technique and etching technique to form a polycide wiring 210a composed of the silicide film 206a and the polycrystalline silicon film 205a. Further, in order to activate the silicide film 206a, heat treatment is performed in a nitrogen atmosphere so that impurities of the opposite conductivity type in the polycrystalline silicon film 205a are removed from the silicide film 206a.
It is diffused in [Fig. 4 (c)].

However, the heat treatment reduces the concentration of impurities of the opposite conductivity type in the polycrystalline silicon film, and particularly the concentration in the vicinity of the interface with the silicide film is extremely reduced. Therefore, contrary to the purpose of lowering the resistance, the resistance of the entire polycide wiring becomes high. This phenomenon becomes a serious problem especially in contact holes. To solve this problem, the impurities diffused in the silicide film may be compensated by another method. Conventionally, there are two methods for this compensation.

In the first method, before the patterning,
This is a method (ion implantation method) of ion-implanting impurities of opposite conductivity type in the vicinity of the interface between the silicide film and the polycrystalline silicon film in the polycide wiring. This method preliminarily compensates for the decrease in the amount of impurities of opposite conductivity type due to the heat treatment by ion implantation.

The second method is disclosed in JP-A-63-310138.
This method is disclosed in Japanese Patent Laid-Open No. 2004-242242, and is a method (impurity diffusion method) in which a polycide wiring is formed, an insulating film containing a reverse conductivity type impurity as a composition component is formed on the entire surface, and then heat treatment is performed.

Referring to FIG. 5, which is a sectional view of a semiconductor device, the method described in the above publication is as follows. First,
The semiconductor substrate 201 of one conductivity type having the diffusion layer 202b of the opposite conductivity type on the surface is covered with the interlayer insulating film 203,
A contact hole 204b reaching the diffusion layer 202b is formed in the interlayer insulating film 203. Next, a polycide wiring 210b including a reverse conductivity type polycrystalline silicon film 205b and a silicide film 206b is formed. Further, an insulating film 207 serving as a diffusion source (including an impurity of opposite conductivity type as a composition component) is formed on the entire surface by a CVD method or the like. Then, heat treatment is performed. In this method, the impurity concentration of the opposite conductivity type in the silicide film 206b is saturated by the thermal diffusion of the opposite conductivity type impurity from the insulating film 207 serving as a diffusion source, and the diffusion of the impurity from the polycrystalline silicon film 205b is suppressed. To be done. As a result, the polycide wiring 210b
The rise in overall resistance is suppressed.

[0008]

The above-mentioned ion implantation method is
There is no problem when the polycide wiring is formed only on a substantially flat surface, but an unfavorable problem occurs when the polycide wiring is formed across the step.

Referring to FIG. 6 which is a cross-sectional view of the semiconductor device, the above problem occurs in the contact hole 204c reaching the diffusion layer 202c, for example. This contact hole 204
A polycrystalline silicon film 205 having an inverse conductivity type of the aspect ratio of c
c and the silicide film 206c, the polycide wiring 2
Since it is smaller than the film thickness of 10c, the contact hole 204c
Are not buried by the polycide wiring 210c. Therefore, the surface of the silicide film 206c in the portion covering the side wall of the contact hole 204c becomes substantially vertical. Ions are not sufficiently implanted into the silicide film 206c in this portion, and the resistance of the polycide wiring 210c increases in this portion. Further, if the gate electrode is formed by the polycide wiring 206c, the transistor characteristics are deteriorated due to the damage to the channel region due to the ion implantation, which causes a serious problem that the reliability of the semiconductor device is lowered.

On the other hand, unlike the ion implantation method, the impurity diffusion method does not increase the resistance value in this portion even if the polycide wiring crosses the step portion. Further, even if the gate electrode of the MOS transistor is formed of this polycide wiring, the channel region is not damaged and the reliability is not lowered. However, in this impurity diffusion method, the impurities from the insulating film, which is the diffusion source, are diffused from the surface of this film to the outside. Therefore, the impurity concentration in the silicide film in which the impurities are diffused decreases during the heat treatment, and it becomes difficult to efficiently dope the interface between the silicide film and the polycrystalline silicon film with the impurity.

Referring to FIG. 7 which is a sectional view of the semiconductor device, in this semiconductor device, the contact hole 204d reaching the diffusion layer 202d of the opposite conductivity type has a high aspect ratio, and the contact hole 204d has a polycrystalline silicon of the opposite conductivity type. Membrane 205
d has been embedded and the silicide wiring 220 has been connected to the polycrystalline silicon film 205d (that is, the polycide structure only in the vicinity of the contact hole), and the surface of the interlayer insulating film 203 including the polycide wiring 220 has Insulating film 2 serving as a diffusion source
It is covered with 07a. The above phenomenon also occurs in the semiconductor device having such a structure. In this case, the surface area of the silicide wiring 220 covered with the insulating film 207a serving as a diffusion source is the silicide wiring 220 and the polycrystalline silicon film 205.
Since the area of the interface with d is sufficiently large, the impurity diffusion due to the heat treatment to the silicide wiring 220 is dominated by the diffusion from the insulating film 207a serving as the diffusion source, and the above phenomenon becomes remarkable. As a result, it becomes difficult to uniformly reduce the resistance value of each portion of the silicide wiring 220. Further, it becomes difficult to dope the polycrystalline silicon film 205d in the vicinity of the interface between the silicide wiring 220 and the polycrystalline silicon film 205d, which increases the contact resistance.

[0012]

The semiconductor device of the present invention comprises:
A diffusion layer of opposite conductivity type provided on the surface of a semiconductor substrate of one conductivity type and a diffusion layer connected to the diffusion layer through a contact hole provided in an interlayer insulating film covering the semiconductor substrate. A wiring provided on this interlayer insulating film formed by laminating a conductive type polycrystalline silicon film and a refractory metal silicide film, and an impurity of opposite conductivity type covering the wiring at least above the contact hole as a composition component. An insulating film including the insulating film and a silicon nitride film covering at least the insulating film are provided.

A method of manufacturing a semiconductor device according to the present invention is
A step of forming a diffusion layer of opposite conductivity type on the surface of a semiconductor substrate of one conductivity type, forming an interlayer insulating film on the entire surface, and forming a contact hole reaching this diffusion layer in the interlayer insulating film; A step of forming a wiring in which a reverse conductivity type polycrystalline silicon film and a refractory metal silicide film are laminated on the interlayer insulating film, and an insulating film containing a reverse conductivity type impurity as a composition component in at least the contact hole. The method includes a step of forming a silicon nitride film formed on the wiring and covering at least the insulating film, and a step of heat treatment.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

Referring to FIG. 1 which is a sectional view of the semiconductor device, the structure of the semiconductor device according to the first embodiment of the present invention is as follows.

The surface of the P type semiconductor substrate 101 having the N ⁺ type diffusion layers 102aa and 102ab is covered with an interlayer insulating film 103 having a film thickness of about 1 μm. The interlayer insulating film 103 is provided with contact holes 104aa and 104ab reaching the diffusion layers 102aa and 102ab, respectively. The measured diameters of the contact holes 104aa and 104ab are about 0.4 μm and 0.8 μm, respectively, and the designed diameters of the contact holes 104aa and 104ab are 0.6 μm and 1.0 μm, respectively. The tungsten polycide wiring 110a is formed by laminating an N ⁺ -type polycrystalline silicon film 105a having a film thickness of about 200 nm and a tungsten silicide film 106a having a film thickness of about 100 nm.
The tungsten polycide wiring 110a is formed in the diffusion layer 1 via the contact holes 104aa, 104ab and the like.
02aa, 102ab, etc. are connected. The surface of the interlayer insulating film 103 including the tungsten polycide wiring 110a is covered with the phosphor glass film 107a. The phosphorus concentration of this phosphorus glass film 107a is about 10 mol%. The surface of the phosphor glass film 107a has a film thickness of 10 nm.
It is covered with a silicon nitride film 108a.

Since the aspect ratio of the contact hole 104aa is large (compared to the film thickness of the polycide wiring 110a), the contact hole 104aa is formed in the polycrystalline silicon film 105.
It is buried by a. On the other hand, the contact hole 104a
The surface (side wall and bottom surface) of b is polycide wiring 110a.
However, the contact hole 104ab is not buried by the polycide wiring 110a.

Further referring to FIG. 1, the method of manufacturing the semiconductor device of the first embodiment is as follows.

First, N is formed on the surface of the P-type semiconductor substrate 101.
^{The +} type diffusion layers 102aa and 102ab are formed, and the interlayer insulating film 103 is formed on the entire surface. Diffusion layer 1
Contact holes 104a reaching 02aa and 102ab
After a and 104ab are formed on the interlayer insulating film 103, an N ⁺ -type polycrystalline silicon film containing phosphorus is formed on the entire surface by a low pressure CVD method or the like, and a tungsten silicide film is formed on the entire surface by a sputtering method or the like. To be done. The tungsten silicide film and the polycrystalline silicon film are patterned by a known lithography technique and etching technique to form a polycide wiring 11 including a polycrystalline silicon film 105a and a tungsten silicide film 106a.
0a is formed. Next, a phosphorus glass film 107a is formed on the entire surface by a low pressure CVD method using tetraethoxysilane and phosphine or trimethoxyphosphine. Further, the silicon nitride film 108a is formed on the entire surface by the low pressure CVD method or the like. Then, heat treatment is performed for a predetermined time in a nitrogen atmosphere at a predetermined temperature.

Contact hole 1 in the first embodiment
The contact resistances at 04aa and 104ab are about 380Ω and 130Ω, respectively. The measured value is about 0.15
The contact resistance in a contact hole having a diameter of μm (designed value 0.4 μm) is about 800Ω. When the polycide wiring is formed in the same manner as in the present embodiment and then the ion implantation method is adopted, the contact hole is about 0.15 μm,
The contact resistances in the case of 0.4 μm and 0.8 μm are approximately 1050Ω, 580Ω and 370Ω, respectively. Further, in the case of the impurity diffusion method formed in the same manner as this example until the formation of the phosphorus glass film, the contact hole is about 0.15.
The contact resistances in the case of μm, 0.4 μm and 0.8 μm are approximately 1500Ω, 570Ω and 170Ω, respectively. As is clear from these results, by adopting this embodiment, it is possible to obtain a polycide wiring having a lower resistance than the conventional one including the contact resistance.

The above results can be explained as follows.
According to the first embodiment, since the silicon nitride film 108a covers the phosphorus glass film 107a, during the heat treatment for diffusing phosphorus into the tungsten silicide film 106a forming the upper surface of the polycide wiring 110a, the phosphorus glass film is formed. Diffusion of phosphorus in 107a to the outside is blocked,
The phosphorus concentration of the phosphorus glass film 107a does not suddenly decrease, and the phosphorus concentration of the tungsten silicide film 106a is surely saturated. Therefore, it is possible to prevent a decrease in the phosphorus concentration of the polycrystalline silicon film 105a in the vicinity of the interface between the tungsten silicide film 106a and the polycrystalline silicon film 105a, and to prevent a sudden increase in contact resistance.
Further, according to the present embodiment, it is possible to avoid the deterioration of the reliability of the semiconductor device due to the damage which is observed in the ion implantation method.

Referring to FIG. 2 which is a sectional view of the semiconductor device, the semiconductor device of the second embodiment of the present invention is as follows. A contact hole 104b reaching the N ⁺ type diffusion layer 102b, an N ⁺ type polycrystalline silicon film 105b,
The tungsten silicide film 106b and the tungsten polycide wiring 110b are respectively the contact hole 104ab and the polycrystalline silicon film 105 of the first embodiment.
a, the same as the tungsten silicide film 106a and the tungsten polycide wiring 110a. The phosphorus glass film 107b is formed only in the depression of the tungsten polycide wiring 110b in the contact hole 104b. The interlayer insulating film 10 including the surfaces of the phosphor glass film 107b and the tungsten polycide wiring 110b is also included.
The surface of No. 3 is covered with the silicon nitride film 108b.

The main points of the method of manufacturing the semiconductor device of the second embodiment are as follows. First, a contact hole 104b reaching the N ⁺ type diffusion layer 102b is formed in the interlayer insulating film 103 by the same method as in the first embodiment. An N ⁺ -type polycrystalline silicon film containing phosphorus is formed on the entire surface by the low pressure CVD method, and a tungsten silicide film is formed on the entire surface by the sputtering method.
A phosphorus glass film having a phosphorus concentration of about 10 mol% is formed on the entire surface by the VD method. Next, the phosphorus glass film is selectively etched back by isotropic dry etching, and the phosphorus glass film 107b is formed in the depression of the tungsten silicide film in the contact hole 104b. Then, the tungsten silicide film and the polycrystalline silicon film are patterned by the same method as that of the first embodiment, and the polycrystalline silicon film 105b and the tungsten silicide film 1 are patterned.
Then, a tungsten polycide wiring 110b is formed by stacking the same with 06b. Then, a silicon nitride film 108b is formed on the entire surface and a predetermined heat treatment is performed.

According to the second embodiment, the increase in the resistance value of the tungsten polycide wiring in the vicinity of the contact hole is suppressed. This embodiment is effective when the aspect ratio of the contact hole is smaller than the film thickness of the tungsten polycide wiring.

Referring to FIG. 3, which is a sectional view of the semiconductor device, the semiconductor device of the third embodiment of the present invention is as follows. The higher the contact hole 104c aspect ratio to reach the N ⁺ -type diffusion layer 102c, an N ⁺ -type polycrystalline silicon film 105c is buried. The tungsten silicide wiring 120 is formed on the polycrystalline silicon film 105.
It is connected to the diffusion layer 102c via c. In the contact hole 104c, this wiring has a polycide structure. The surface of the interlayer insulating film 103 including the tungsten silicide wiring 120 is covered with a phosphorus glass film 107c having a high phosphorus concentration.
Is covered with a silicon nitride film 108c.

The main points of the method of manufacturing the semiconductor device of the third embodiment are as follows. First, a contact hole 104c reaching the N ⁺ type diffusion layer 102c is formed in the interlayer insulating film 103 by the same method as in the first embodiment. An N ⁺ -type polycrystalline silicon film containing phosphorus is formed on the entire surface by the low pressure CVD method or the like. Then, this polycrystalline silicon film is selectively etched back by isotropic dry etching, leaving the polycrystalline silicon film 105c only in the contact hole 104c. Then, a tungsten silicide film having a predetermined thickness is formed on the entire surface, and the tungsten silicide film is patterned to form a tungsten silicide wiring 120. The subsequent steps are the same as those in the first embodiment.

The third embodiment is particularly effective for a semiconductor device having a contact height with a high aspect ratio. In addition, since the underlying flatness of the silicide wiring is excellent, it is possible to increase the film thickness of the silicide wiring to further reduce the resistance of the wiring.

In the first, second and third embodiments, the P type semiconductor substrate, the N ⁺ type diffusion layer, the N ⁺ type polycrystalline silicon film and the phosphorus glass film are used. However, the present invention can be applied to an N type semiconductor substrate, a P ⁺ type diffusion layer, a P ⁺ type polycrystalline silicon film and a boron glass film. Although tungsten is taken as an example of the refractory metal, the present invention can also be applied to molybdenum, tantalum or titanium.

[0029]

As described above, according to the present invention,
That the wiring connected to this diffusion layer through the contact hole reaching the diffusion layer of the opposite conductivity type provided on the surface of the semiconductor substrate of one conductivity type has a polycide structure at least in the contact hole; And a silicon nitride film covering at least the insulating film containing an impurity having a reverse conductivity type as a composition component for covering the wire at least above the contact hole, and a silicon nitride film. Since the heat treatment is performed after forming the, the resistance value of this wiring does not increase. Further, in the case of the polycide wiring used as the gate electrode of the MOS transistor, according to the present invention, introduction of damage to the channel region due to ion implantation can be avoided, and a highly reliable semiconductor device can be obtained.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a first embodiment of the present invention.

FIG. 2 is a sectional view of a second embodiment of the present invention.

FIG. 3 is a sectional view of a third embodiment of the present invention.

FIG. 4 is a cross-sectional view of a conventional semiconductor device manufacturing process.

FIG. 5 is a cross-sectional view of another conventional semiconductor device.

FIG. 6 is a cross-sectional view illustrating a problem of a conventional semiconductor device.

FIG. 7 is a cross-sectional view for explaining a problem of another conventional semiconductor device.

[Explanation of symbols]

101, 201 semiconductor substrate 102aa, 102ab, 102b, 102c, 202
a, 202b, 202c, 202d Diffusion layer 103, 203 Interlayer insulating film 104aa, 104ab, 104b, 104c, 204
a, 204b, 204c, 204d contact holes 105a, 105b, 105c, 205a, 205b,
205c, 205d Polycrystalline silicon film 106a, 106b, 106c Tungsten silicide film 107a, 107b, 107c Phosphor glass film 108a, 108b, 108c Silicon nitride film 110a, 110b Tungsten polycide wiring 120 Tungsten silicide wiring 206, 206a, 206b, 206c Silicide Films 207 and 207a Insulating films 210a and 210b serving as diffusion sources Polycide wiring 220 Silicide wiring

Claims (2)

[Claims] 1. A diffusion layer of opposite conductivity type provided on the surface of a semiconductor substrate of one conductivity type, and a diffusion layer which is connected to the diffusion layer through a contact hole provided in an interlayer insulating film covering the semiconductor substrate, A wiring provided on the interlayer insulating film, which is formed by laminating a reverse conductivity type polycrystalline silicon film and a refractory metal silicide film in the contact hole, and is connected to the diffusion layer through the contact hole, A semiconductor device, comprising: an insulating film that covers the wiring above the contact hole and contains an impurity of opposite conductivity type as a composition component; and a silicon nitride film that covers at least the insulating film. 2. A step of forming a diffusion layer of opposite conductivity type on the surface of a semiconductor substrate of one conductivity type, forming an interlayer insulating film on the entire surface, and forming a contact hole reaching the diffusion layer in the interlayer insulating film. Forming a wiring on the interlayer insulating film, which is connected to the diffusion layer through the contact hole, and in which at least a polycrystalline silicon film of an opposite conductivity type and a refractory metal silicide film are laminated in the contact hole. An insulating film containing a reverse conductivity type impurity as a composition component is formed at least above the wiring in the contact hole,
A method of manufacturing a semiconductor device, comprising: forming a silicon nitride film that covers at least the insulating film; and performing a heat treatment.