JPH0632376B2 - Multilayer substrate for hybrid integrated circuit - Google Patents
Multilayer substrate for hybrid integrated circuitInfo
- Publication number
- JPH0632376B2 JPH0632376B2 JP60071220A JP7122085A JPH0632376B2 JP H0632376 B2 JPH0632376 B2 JP H0632376B2 JP 60071220 A JP60071220 A JP 60071220A JP 7122085 A JP7122085 A JP 7122085A JP H0632376 B2 JPH0632376 B2 JP H0632376B2
- Authority
- JP
- Japan
- Prior art keywords
- filler
- layer
- tungsten
- alumina
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Description
【発明の詳細な説明】 （産業上の利用分野） 本発明は、機器や回路ブロックの軽薄短小化を実現す
る、高密度実装用の混成集積回路用多層基板に関するも
のである。Description: TECHNICAL FIELD The present invention relates to a multi-layer substrate for a hybrid integrated circuit for high-density mounting, which realizes a lighter, thinner, and smaller device or circuit block.
（従来の技術） 混成集積回路は、半導体部品の高集積化、単体部品の小
型チップ化に伴い、部品の高密度実装や、回路ブロック
生産の合理化の手段として発展している。しかし、近年
は、回路を一層小型化、高密度実装化する要望が高ま
り、基板を多層化して配線密度を高める試みがなされて
いる。(Prior Art) A hybrid integrated circuit has been developed as a means for high-density mounting of components and rationalization of circuit block production in accordance with high integration of semiconductor components and miniaturization of individual components. However, in recent years, there has been an increasing demand for further miniaturization and high-density mounting of circuits, and attempts have been made to increase the wiring density by forming a multilayer board.
従来の試みとして、例えば、「ザ・インターナショナル
・ジャーナル・フォア・ハイブリッド・マイクロエレク
トロニックス（The International Journal For Hybrid
Microelectronics）６〔１〕616〜620〔813〕」にみら
れるように、アルミナ絶縁体層とタングステン導体層と
からなる積層構造体の最上層のタングステン導体層にニ
ッケルと金のメッキを施し、さらに樹脂カーボン系の抵
抗体膜を形成した多層構造を有する混成集積回路用多層
基板（以下多層基板と略す）が提案されていた。As a conventional attempt, for example, "The International Journal For Hybrid (Microelectronics)
Microelectronics) 6 [1] 616-620 [813] ”, nickel and gold are plated on the uppermost tungsten conductor layer of the laminated structure composed of the alumina insulator layer and the tungsten conductor layer, and A multilayer substrate for a hybrid integrated circuit (hereinafter abbreviated as a multilayer substrate) having a multilayer structure in which a resin carbon-based resistor film is formed has been proposed.
しかし、この方法は最上層タングステン層にメッキを施
す必要があり、抵抗体膜に樹脂カーボン系の抵抗体を用
いているため、一般に用いられているグレーズ抵抗体に
比べて、抵抗器としての諸特性が優れていないなどの問
題点があった。However, in this method, it is necessary to plate the uppermost tungsten layer, and the resin carbon type resistor is used for the resistor film. Therefore, as compared with the commonly used glaze resistor, various types of resistors are used as resistors. There were problems such as not having excellent characteristics.
これに対し、アルミナ絶縁体層とタングステン導体層と
からなる積層構造体に、通常用いられている厚膜、例え
ば、銀−パラジウム系厚膜導体とルテニウム系グレーズ
抵抗体膜の形成が可能な多層基板が提案されている。第
２図は、前記構成による多層基板の断面図を示す。第２
図において、１はアルミナ基板、２は第１層のアルミナ
絶縁体層、３は最上層のアルミナ絶縁体層、４はタング
ステンの導体層、５はタングステンを酸化させない低融
点ガラスとアルミニウム粉と銀粉からなる充填材、６は
銀−パラジウム系導体膜、７はルテニウム系グレーズ抵
抗体膜を示す。前記構成の多層基板は、絶縁体層にアル
ミナを用いるために絶縁特性に優れており、最上層表面
の抵抗体膜は、グレーズ抵抗体膜であるために抵抗器と
して安定性に優れているとともに、レーザによるトリミ
ングが容易であるなどの特徴がある。On the other hand, a multi-layer structure capable of forming a thick film that is normally used, for example, a silver-palladium-based thick film conductor and a ruthenium-based glaze resistor film, in a laminated structure including an alumina insulator layer and a tungsten conductor layer. Substrates have been proposed. FIG. 2 shows a cross-sectional view of the multi-layer substrate having the above structure. Second
In the figure, 1 is an alumina substrate, 2 is the first layer of alumina insulator layer, 3 is the uppermost layer of alumina insulator layer, 4 is a conductor layer of tungsten, 5 is low melting point glass that does not oxidize tungsten, aluminum powder and silver powder. 6 is a silver-palladium based conductor film, and 7 is a ruthenium based glaze resistor film. The multi-layer substrate having the above structure has excellent insulating properties because alumina is used for the insulating layer, and the resistor film on the uppermost layer surface is a glaze resistor film and therefore has excellent stability as a resistor. It has features such as easy trimming by laser.
（発明が解決しようとする問題点） しかし、前記従来の構成では、タングステン導体層と銀
−パラジウム系導体膜を接続する充填材は、湿気を完全
に通さない構造となっていないため、防湿特性が十分で
ないという問題点があった。(Problems to be Solved by the Invention) However, in the above-described conventional configuration, the filler that connects the tungsten conductor layer and the silver-palladium-based conductor film does not have a structure that does not allow moisture to completely pass therethrough, so that the moisture-proof property is not provided. There was a problem that was not enough.
すなわち、前記従来の構成の充填材は、タングステンを
酸化させない低融点ガラスとアルミナ粉と銀粉から構成
され、前記銀粉の重量比は７０〜８０％を占めている。
充填材の形成方法は、アルミナ絶縁体層とタングステン
導体層とからなる積層部の焼結体の最上層アルミナ絶縁
体層上に、低融点ガラス粉とアルミナ粉と銀粉を有機性
ビークルと混練したペーストを、スクリーン印刷により
充填し、その後空気中で８００〜９００℃で熱処理して
行なわれる。前記のように形成された充填材は、内部の
タングステン導体層と外部の銀−パラジウム系導体膜お
よびルテニウム系グレーズ抵抗体膜などを電気的に接続
する機能を有するとともに、前記充填材を形成した前記
積層部は、高温空気中で熱処理されても内部のタングス
テン導体層を酸化させないので、内部導体層にタングス
テンを用いても、前記積層部の表面に厚膜を高温空気中
で形成することができる。That is, the filler having the conventional structure is composed of low melting glass that does not oxidize tungsten, alumina powder and silver powder, and the weight ratio of the silver powder accounts for 70 to 80%.
The method of forming the filler was such that low-melting glass powder, alumina powder, and silver powder were kneaded with an organic vehicle on the uppermost alumina insulator layer of the sintered body of the laminated portion composed of the alumina insulator layer and the tungsten conductor layer. The paste is filled by screen printing, followed by heat treatment in air at 800 to 900 ° C. The filler formed as described above has a function of electrically connecting the internal tungsten conductor layer to the external silver-palladium-based conductor film, ruthenium-based glaze resistor film, and the like, and formed the filler. Since the laminated portion does not oxidize the internal tungsten conductor layer even when heat-treated in high temperature air, even if tungsten is used for the inner conductor layer, a thick film can be formed on the surface of the laminated portion in high temperature air. it can.
しかし、充填材は、銀の成分が多く、充填材ペーストの
焼成過程中に有機バインダが完全に燃焼されていないた
め、完全な緻密状態となっていない。そのため、前記の
ように構成された多層基板には、高温湿中に放置される
ことにより、内部のタングステン導体層にまで湿気が侵
入し、充填材とタングステン導体層の界面が劣化され
て、前記界面の電気抵抗が上昇するという問題点があっ
た。However, since the filler has a large amount of silver component and the organic binder is not completely burned during the firing process of the filler paste, the filler is not in a completely dense state. Therefore, in the multilayer substrate configured as described above, when left in high temperature and humidity, moisture penetrates into the internal tungsten conductor layer, and the interface between the filler and the tungsten conductor layer is deteriorated. There is a problem that the electric resistance of the interface increases.
（問題を解決するための手段） 前記問題点を解決するため、本発明は、前記従来の多層
基板の充填材の上部にルテニウム系グレーズ抵抗体膜を
防湿膜として形成する。(Means for Solving the Problem) In order to solve the above problems, the present invention forms a ruthenium-based glaze resistor film as a moisture-proof film on the filler of the conventional multilayer substrate.
（作用） 上記のような構成とすることにより、充填材とタングス
テン導体層の接続部の劣化を防ぎ、湿中に長時間放置し
ても前記接続部の抵抗値変化を起さない安定した多層基
板を提供できる。(Operation) With the above-described structure, deterioration of the connection portion between the filler and the tungsten conductor layer is prevented, and a stable multi-layer structure that does not cause a change in resistance value of the connection portion even when left in moisture for a long time. A substrate can be provided.
（実施例） 第１図は、本発明の多層基板の断面図を示し、充填材上
部ルテニウム系グレーズ抵抗体膜８のほかは、従来例の
第２図と同一であるので、符号１ないし７の詳細な説明
は略す。アルミナ基板１と、第１層アルミナ絶縁体層２
と、最上層アルミナ絶縁体層３と、タングステン導体層
４とからなる積層部は、アルミナグリーンシート上に、
アルミナを主成分とする無機粉末と有機ビークルからな
るアルミナペーストと、タングステン粉末と有機ビーク
ルからなるタングステンペーストとを交互に印刷積層化
し、その後加湿還元雰囲気中で一体焼成して作製された
ものである。積層数は必要に応じてその数を増すことは
可能である。(Example) FIG. 1 shows a cross-sectional view of a multi-layer substrate of the present invention, which is the same as FIG. 2 of the conventional example except for the ruthenium-based glaze resistor film 8 on the filler upper part. The detailed description of is omitted. Alumina substrate 1 and first layer alumina insulator layer 2
And a laminated portion composed of the uppermost alumina insulator layer 3 and the tungsten conductor layer 4, on the alumina green sheet,
It is produced by alternately printing and laminating an alumina paste composed of an inorganic powder containing alumina as a main component and an organic vehicle, and a tungsten paste composed of a tungsten powder and an organic vehicle, and then integrally firing in a humidified reducing atmosphere. . The number of laminated layers can be increased as necessary.
次に、BaO−B2O3系ガラス粉末１５ｗｔ％とアルミナ粉
５ｗｔ％と銀粉末８０ｗｔ％を、１０％のエチルセルロ
ーズをテレピン油に溶解したビークルとともに混練して
作成した充填材ペーストを、前記最上層アルミナ絶縁体
層３の表面の必要箇所で内部のタングステン導体層４が
露出している300μｍ角の小孔部分に、２５０メッシ
ュ、乳厚１５μｍのスクリーンを用いて印刷充填し、１
２０℃にて１０分間乾燥した後、ピーク温度８５０℃の
空気中でベルト炉を用いて３０分間熱処理をした。Next, a filler paste prepared by kneading 15 wt% of BaO-B 2 O 3 based glass powder, 5 wt% of alumina powder and 80 wt% of silver powder together with a vehicle in which 10% of ethyl cellulose was dissolved in turpentine oil was prepared. A small hole of 300 μm square in which the internal tungsten conductor layer 4 is exposed at a required position on the surface of the uppermost alumina insulator layer 3 is printed and filled using a screen of 250 mesh and a thickness of 15 μm.
After drying at 20 ° C. for 10 minutes, heat treatment was performed for 30 minutes using a belt furnace in air having a peak temperature of 850 ° C.
前記のように充填材５の形成された積層部に、充填材５
と接続するように銀−パラジウム厚膜ペーストパターン
を印刷乾燥し、ヒーター温度850℃のベルト炉で焼成し
た。The filler 5 is added to the laminated portion where the filler 5 is formed as described above.
The silver-palladium thick-film paste pattern was printed and dried so as to be connected to, and baked in a belt furnace with a heater temperature of 850 ° C.
次に前記銀−パラジウム系導体膜６と接続する部分およ
び充填材５上部を被覆する部分に、ルテニウム系グレー
ズ抵抗ペーストを印刷乾燥し、ヒーター温度８５０℃の
ベルト炉で焼成して、ルテニウム系グレーズ抵抗体膜７
および充填材上部ルテニウム系グレーズ抵抗体膜８が形
成された。Then, a ruthenium-based glaze resistance paste is printed and dried on a portion connected to the silver-palladium-based conductor film 6 and a portion covering the upper portion of the filler 5, and baked in a belt furnace with a heater temperature of 850 ° C. Resistor film 7
And the upper ruthenium-based glaze resistor film 8 of the filler was formed.
前記のように形成された多層基板の耐温テストの結果を
表１に示す。なお、テストはテストパターンを用いて行
なわれた。前記テストパターンは、内部に０．４mm×４
mmのタングステン導体層４を形成し、最上層アルミナ絶
縁体層３の表面に前記タングステン導体層４の両端が露
出するように設けた小孔に充填材５を形成し、さらに、
抵抗測定用パラッドとして前記充填材５と接続するよう
に銀−パラジウム系導体膜６を延設形成した。耐湿テス
トは、８５℃、相対湿度８５％、１０００時間の条件
で、抵抗測定用パッド間の抵抗値を測定して行なった。Table 1 shows the result of the temperature resistance test of the multilayer substrate formed as described above. The test was conducted using a test pattern. The test pattern is 0.4mm x 4 inside
mm tungsten conductor layer 4 is formed, and a filler 5 is formed in a small hole provided on the surface of the uppermost alumina insulator layer 3 so that both ends of the tungsten conductor layer 4 are exposed.
As a resistance measuring pad, a silver-palladium-based conductor film 6 was extendedly formed so as to be connected to the filler 5. The humidity resistance test was performed by measuring the resistance value between the resistance measurement pads under the conditions of 85 ° C., relative humidity 85%, and 1000 hours.
前記表で明らかなように、本発明によれば、湿中におい
ても極めて安定した混成集積回路用多層基板が得られる
ことがわかる。 As is clear from the above table, according to the present invention, it is possible to obtain an extremely stable multilayer substrate for a hybrid integrated circuit even in wet conditions.
（発明の効果） 以上により、本発明によれば、銀−パラジウム系導体膜
に接続する部分および充填材上部を被覆する部分に、ル
テニウム系グレーズ抵抗体膜を形成するのみで工程上極
めて簡単であるとともに、耐湿特性の優れた混成集積回
路用多層基板が実現されて、実用上極めて有利である。(Effects of the Invention) As described above, according to the present invention, the ruthenium-based glaze resistor film is only formed on the portion connected to the silver-palladium-based conductor film and the portion covering the upper portion of the filler, which is extremely simple in the process. In addition, a multilayer substrate for a hybrid integrated circuit having excellent moisture resistance is realized, which is extremely advantageous in practical use.
第１図は本発明の一実施例における混成集積回路用多層
基板の断面図、第２図は従来の混成集積回路用多層基板
の断面図を示す。 １……アルミナ基板、２……第１層アルミナ絶縁体層、
３……最上層アルミナ絶縁体層、４……タングステン導
体層、５……充填材、６……銀−パラジウム系導体膜、
７……ルテニウム系グレーズ抵抗体膜、８……充填材上
部ルテニウム系グレーズ抵抗体膜。FIG. 1 is a sectional view of a multilayer substrate for a hybrid integrated circuit according to an embodiment of the present invention, and FIG. 2 is a sectional view of a conventional multilayer substrate for a hybrid integrated circuit. 1 ... Alumina substrate, 2 ... First layer alumina insulator layer,
3 ... Top layer alumina insulator layer, 4 ... Tungsten conductor layer, 5 ... Filler material, 6 ... Silver-palladium-based conductor film,
7 ... Ruthenium-based glaze resistor film, 8 ... Filler upper ruthenium-based glaze resistor film.
Claims (1)
ステンの導体層とを交互に積層して積層部を形成し、前
記積層部の最上層絶縁体層の必要箇所に内部のタングス
テン導体層が露出するように形成した小孔に、タングス
テンを酸化しない成分からなる低融点ガラスとアルミナ
と銀粉とからなる充填材を形成し、さらに、前記積層部
の表面に、前記充填材延長部と電気的に接続する銀−パ
ラジウム系導体膜と、前記銀−パラジウム系導体膜に接
続する部分および前記充填材上部を被覆する部分にルテ
ニウム系グレーズ抵抗体膜を形成したことを特徴とする
混成集積回路用多層基板。1. An alumina ceramics insulator layer and a tungsten conductor layer are alternately laminated to form a laminated portion, and an internal tungsten conductor layer is exposed at a required portion of the uppermost insulator layer of the laminated portion. In the small hole formed as described above, a filler made of low melting point glass made of a component that does not oxidize tungsten, alumina and silver powder is formed, and further, electrically connected to the filler extension portion on the surface of the laminated portion. And a ruthenium-based glaze resistor film formed on a portion connected to the silver-palladium-based conductor film and a portion covering the upper portion of the filler, and a multilayer substrate for a hybrid integrated circuit. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60071220A JPH0632376B2 (en) | 1985-04-05 | 1985-04-05 | Multilayer substrate for hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60071220A JPH0632376B2 (en) | 1985-04-05 | 1985-04-05 | Multilayer substrate for hybrid integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61230393A JPS61230393A (en) | 1986-10-14 |
| JPH0632376B2 true JPH0632376B2 (en) | 1994-04-27 |
Family
ID=13454371
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60071220A Expired - Lifetime JPH0632376B2 (en) | 1985-04-05 | 1985-04-05 | Multilayer substrate for hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0632376B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6273799A (en) * | 1985-09-27 | 1987-04-04 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
-
1985
- 1985-04-05 JP JP60071220A patent/JPH0632376B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61230393A (en) | 1986-10-14 |
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