JPH06318593A - Wiring structure of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To provide a wiring structure of a semiconductor integrated circuit wherein diffusion of Cu into an insulating film or a substrate can be prevented and application of a fine LSI wiring is possible, when a Cu wiring is used. CONSTITUTION:An insulating film 12 is formed on the surface of an Si substrate 10, and a W film 14 of 1000Angstrom in thickness is formed on the whole surface of the insulating film 12. A Cu film 16 is grown on the surface of the W film 14. A substratum film 14a and a Cu wiring 16a are formed by patterning the W film 14 and the Cu film 16. A W film is selectively grown 100-500Angstrom thick only on the outer surfaces of the substratum film 14a and the Cu wiring 16a by a CVD method, and a W coating film 18 is formed. The thickness of the substratum film 14a is made larger than or equal to twice and smaller than or equal to ten times the thickness of the W coating film 18.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a semiconductor integrated circuit (LS).
The wiring structure of I).

[0002]

2. Description of the Related Art At present, as a wiring material of a semiconductor integrated circuit, Al or Al obtained by adding Si or Cu to Al is used.
Alloys are used. Since Al is mainly used for such wiring, the allowable current density of the wiring is limited to (2 to 3) × 10 ⁵ A / cm ² or less.
The reason for this is that if a current exceeding the permissible current density is applied to this wiring, the wiring will be broken due to electromigration. In order to pass a current with a high current density, 0.1 to 5% Cu is contained in Al as a wiring material.
Although an Al-Cu alloy added with may be used,
Resistance to electromigration is unsatisfactory. Moreover, although the allowable current density is improved, the specific resistance of the wiring is increased, which causes a problem of reliability deterioration due to heat generation.

On the other hand, in order to improve the electromigration resistance of the wiring, it is proposed to use Cu wiring which is substantially made of Cu, which has high electromigration resistance and low resistance, instead of Al wiring or Al alloy wiring. Has been done.

[0004]

However, Cu is more likely to diffuse into Si (substrate) or SiO ₂ (insulating film) than Al, which causes a problem that the normal operation of the transistor is hindered. In order to solve this problem, a technique of preventing diffusion of Cu by various barrier films has been proposed (for example, Spring 1992 Japan Society of Applied Physics 30p-Z).
H-6, see JP-A-63-156341). However, the resistance of these barrier films is higher than that of Cu, and C
Since u is used in a fine LSI with a wiring width of about 0.25 μm or less, if a barrier film is uniformly formed all around the Cu wiring, the effective resistance of the wiring increases and the merit of using the Cu wiring decreases. There is a problem of doing.

In view of the above circumstances, the present invention can prevent the diffusion of Cu into the insulating film and the substrate when Cu wiring is used, and further can cope with fine LSI wiring. The purpose is to provide.

[0006]

The inventors of the present invention have conducted various experiments and studies focusing on the fact that the distance until Cu reaches the Si substrate has a great influence on the malfunction of the transistor due to the diffusion of Cu. As a result, if the thickness of the underlying barrier film of the Cu wiring is a thickness that can effectively prevent the diffusion of Cu, Cu
It has been found that a sufficient barrier effect can be obtained even if the thickness of the barrier film on the upper and side surfaces of the wiring is thinner than the underlying barrier film thickness of the wiring. Further, in the multilayer wiring structure, it has been found that a sufficient barrier effect can be obtained even if the barrier film of the upper layer wiring is thinner than the barrier film of the lower layer wiring.

Specifically, a wiring structure of a first semiconductor integrated circuit according to the present invention for achieving the above object is a wiring structure of a semiconductor integrated circuit in which Cu wiring is formed.
The thickness of the underlying barrier film of the u wiring is at least twice the thickness of the upper barrier film or the side surface barrier film of the Cu wiring 10
It is characterized by being less than twice. A wiring structure of a second semiconductor integrated circuit according to the present invention for achieving the above object is a wiring structure of a semiconductor integrated circuit in which a multilayer Cu wiring is formed, in which a barrier film of an upper Cu wiring has a thickness of The thickness is less than 1/10 of the thickness of the barrier film of the lower Cu wiring.

Here, the barrier film is a W-containing alloy, T
It is preferably a film formed from a material containing an a-containing alloy, a nitride of these alloys, a boride, and a carbide.

[0009]

Next, the experiment which is the basis of the present invention will be described with reference to the drawings. Wiring width 0.2μ as sample
A wiring structure provided with a Cu wiring having a wiring width of 0.2 μm and a barrier film of the Cu wiring formed of various materials was used. The ratio of the thickness of the upper barrier film or the thickness of the side barrier film to the thickness of the underlying barrier film of the Cu wiring is set to n, and the barrier film of the lower Cu wiring to the thickness of the barrier film of the upper Cu wiring is The thickness ratio is m, and the values of the film thickness ratios n and m are changed to obtain Cu for the film thickness ratios n and m.
The transistor failure rate due to contamination and the short circuit failure rate between wirings due to the barrier film were investigated. The results are shown in FIGS.
1 is a graph showing the relationship between the barrier film thickness n and the transistor defect rate due to Cu contamination. FIG. 2 is a graph showing the relationship between the barrier film thickness ratio n and the short circuit defect ratio between Cu wirings. FIG. 6 is a graph showing a relationship between a barrier film thickness ratio and a transistor defect rate due to Cu contamination.

As shown in FIGS. 1 and 2, when the thickness of the barrier film on the side surface of the Cu wiring is reduced, the transistor defect rate due to Cu diffusion increases with n> 10, and the barrier film on the side surface of the wiring is increased. As the thickness increases, short circuit defects between wirings increase with n <2. Therefore, the range of the barrier film thickness ratio n is 2 or more and 1 which effectively suppresses the diffusion of Cu and causes less short circuit defects between wirings.
Limited to 0 or less.

As shown in FIG. 3, when the barrier film thicknesses of the upper Cu wiring and the lower Cu wiring in the multilayer wiring are compared, the Cu wiring structure of the lower layer in which the diffusion of Cu is sufficiently suppressed and the transistor operation is normal. When you have a body,
It was experimentally clarified that the barrier film thickness of the upper Cu wiring is 1/10 or more of the barrier film of the lower Cu wiring to suppress Cu diffusion.

As described above, in the wiring structure of the first semiconductor integrated circuit of the present invention, the thickness of the underlying barrier film of the Cu wiring is equal to the thickness of the upper barrier film of the Cu wiring or the thickness of the side surface barrier film. 2 times or more and 10 times or less, and in the wiring structure of the second semiconductor integrated circuit of the present invention, the thickness of the barrier film of the Cu wiring in the upper layer is the thickness of the barrier film of the Cu wiring in the lower layer. 1/10 times or more. In this way, by changing the thickness of the barrier film according to the location of the Cu wiring, not only is the material cost of the unnecessary barrier material reduced, but especially, the barrier film thickness on the side surface portion of the wiring is reduced. Due to
Insulation defects can be reduced even for an LSI having a fine wiring structure of 0.25 μm or less, and it is possible to realize a wiring capable of preventing Cu diffusion.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 4 is a sectional view showing an example of a method for manufacturing a Cu wiring structure according to the present invention. As shown in FIG. 4A, 3000 Å BPSG (Bo
An insulating film 12 of a phosphosilicate glass is formed. A film thickness of 1000 is formed on the entire surface of the insulating film 12 by RF magnetron sputtering at a total pressure of 2 mTorr in an Ar atmosphere at a deposition rate of 10 Å / s.
The W film 14 of Å is formed. A Cu film 16 is formed on the surface of the W film 14 by RF magnetron sputtering in an Ar atmosphere at a total pressure of 2 mTorr at a film forming rate of 60 Å / s.
Grow 000Å. After that, as shown in FIG. 4B, the W film 14 and the Cu film 16 are patterned to form a base film 14a and a Cu wiring 16a. After that, as shown in FIG. 4C, the base film 14 is formed by the CVD method.
a and W film selectively on the outer surfaces of the Cu wiring 16a
The W coating film 18 is formed by growing Å to 500Å. The W coating film 18 has a sample temperature of 200 to 400 ° C.
A mixed gas of F ₆ and H ₂ is supplied to the film forming chamber, and the pressure of this mixed gas is set to 1 Torr or less. According to this film forming method, the interface reaction becomes rate-determining, and W can be selectively grown only on the outer surfaces of the base film 14a and the Cu wiring 16a. Here, in order to make this wiring structure multi-layered, W
An insulating film such as a SiO ₂ film may be formed on the coating film 18, and the wiring structure described above may be formed on the insulating film by the same method.

[0014]

As described above, according to the wiring structure of the semiconductor integrated circuit of the present invention, it is possible to prevent Cu diffusion.
Since the film is used as a diffusion barrier film and the thickness of the barrier film is changed according to the degree of diffusion of Cu, it is possible to reduce the barrier material cost without being affected by the diffusion. Furthermore, since the barrier film thickness on the side surface of the fine LSI wiring of 0.25 μm or less can be made thinner than the barrier film thickness under the wiring, improvement in yield due to conduction between Cu wirings can be realized. Therefore, according to the present invention, it is possible to realize a Cu wiring which has a smaller specific resistance than an Al alloy and is excellent in electromigration resistance and has a great industrial significance.

[Brief description of drawings]

FIG. 1 is a graph showing a relationship between a barrier film thickness ratio n and a transistor defect rate due to Cu contamination.

FIG. 2 is a graph showing a relationship between a barrier film thickness ratio n and a short circuit defect rate between Cu wirings.

FIG. 3 is a graph showing the relationship between the upper and lower barrier film thickness ratios of multilayer wiring and the transistor defect rate due to Cu contamination.

FIG. 4 is a cross-sectional view showing an example of a method for manufacturing a Cu wiring structure according to the present invention.

[Explanation of symbols]

 10 Si substrate 12 Insulating film 14 W film 14a Underlayer film 16 Cu film 16a Cu wiring 18 W Coating film

Claims (3)

[Claims] 1. In a wiring structure of a semiconductor integrated circuit in which Cu wiring is formed, the thickness of the underlying barrier film of the Cu wiring is 2 times the thickness of the upper barrier film or the side surface barrier film of the Cu wiring. More than 1
A wiring structure of a semiconductor integrated circuit, which is 0 times or less. 2. In a wiring structure of a semiconductor integrated circuit in which a multilayer Cu wiring is formed, the thickness of the barrier film of the upper Cu wiring is 1/10 times or more the thickness of the barrier film of the lower Cu wiring. A wiring structure for a semiconductor integrated circuit, comprising: 3. The barrier film is a film formed from a material selected from W-containing alloys, Ta-containing alloys, nitrides, borides, and carbides of these alloys. 2. The wiring structure of the semiconductor integrated circuit according to 2.