JPH06314794A - Electronic device and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide an electronic device of a MIS structure in which lead titanate-zirconate (PZT) or lanthanium-lead titanate-zirconate (PLZT) is deposited to form a ferroelectric insulator layer. CONSTITUTION:An electronic device having a MIS structure comprises a silicon substrate 1, a first insulator layer 2 formed on the silicon substrate 1 which is made of strontium titanate, balium titanate or balium-strontium titanate, a second insulator layer 3 formed on the first insulator layer 2 which is made of PZT or PLZT, and an electrode 4 formed on the second insulator layer 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device having a MIS structure (metal-insulator-semiconductor structure) using a ferroelectric material and a method for manufacturing the same, and more particularly to MFS (m
et al-ferroelectrics-semic
The present invention relates to an element having an on structure and a manufacturing method thereof.

[0002]

2. Description of the Related Art Ferroelectric ceramics such as lead zirconate titanate (PZT) and lead lanthanum zirconate titanate (PLZT) are used for piezoelectric elements, pyroelectric elements, electro-optical elements and the like. These applications are wide-ranging such as vibrators, infrared sensors, and optical switches.

Further, recently, ferroelectric ceramics have been attracting attention as a material for forming a memory cell of a non-volatile memory. FIG. 10 shows the hysteresis characteristic of a capacitor using ferroelectric ceramics. Once the voltage of Vcc / 2 or -Vcc / 2 is applied between the electrodes of the capacitor, it is possible to accumulate the charge of Qr or -Qr even if the voltage is subsequently removed.

Therefore, it is conceivable to replace the ferroelectric ceramics with a gate oxide film of a MOS field effect transistor (FET). For example, the FET shown in FIG.
In, the gate insulating film 110 is formed of ferroelectric ceramics to form the circuit shown in FIG.

The IN terminal of the circuit shown in FIG.
When a voltage signal as shown in FIG.
It is expected that a voltage signal like 3 (b) will appear.
That is, once a positive or negative electrode is applied to the gate electrode, the FET operates to turn the switch on or off, and thereafter, it can be expected that data can be retained even if the voltage is removed. Such an element is called an MFSFET and is expected to be applied to a nonvolatile semiconductor memory device.

In the above-mentioned FET, the gate insulating film must be made of a material exhibiting ferroelectricity at room temperature. The thin film made of PZT or PLZT can be formed by a sol-gel method, a sputtering method or CVD. In these methods, it is known that on a sapphire (0001) and MgO (100) single crystal, the PZT film and the PLZT film have good crystallinity and exhibit ferroelectricity at room temperature. Further, it is possible to form a PLZT film having good crystallinity even on a platinum substrate.

[0007]

However, when a PZT film or a PLZT film is formed directly on a semiconductor substrate, especially a Si substrate, it is difficult to obtain a film having good crystallinity and ferroelectricity. Is. Amorphous PZT
It is difficult to impart sufficient characteristics to the device by the film or PLZT film.

An object of the present invention is to improve the crystallinity of an insulating film made of zirconate titanate such as PZT and PLZT in a device having a MIS structure, and to provide a film exhibiting ferroelectricity at room temperature. It is in.

A further object of the invention is a practical MFS.
An object is to provide a device having a structure, particularly an MFSFET.

[0010]

According to the first invention, M
An electronic device having an IS structure is provided, wherein the insulator layer for the MIS structure is strontium titanate (SrTiO ₃ ), barium titanate (BaTiO ₃ ).
₃ ) and barium strontium titanate (Ba _X S
r _1-X TiO ₃ (0 <X <1)), a first insulating layer made of at least one titanate selected from the group consisting of r _{1 -X} TiO ₃ (0 <X <1), and a zircon titanate in contact with the first insulating layer. A second insulator layer made of an acid salt, the first insulator layer is interposed between the semiconductor for the MIS structure and the second insulator layer, and the second insulator layer is It exhibits ferroelectricity at room temperature.

In the first aspect of the invention, as the semiconductor, silicon, particularly p-type or n-type Si (100) single crystal substrate and Si (111) single crystal substrate are preferably used.
Further, various semiconductors such as other IV group semiconductors such as Ge, III-V group semiconductors such as GaAs, or II-VI group semiconductors such as InP may be used as the semiconductor.

In the first invention, the first insulator layer is made of strontium titanate, barium titanate, barium strontium titanate or a combination thereof.
All of these materials easily form perovskite type crystals on the semiconductor substrate. In the first invention, the first
The insulating layer usually has a perovskite type crystal structure. Among these materials, strontium titanate is more preferable because a perovskite type crystal structure can be easily obtained on a Si substrate.

The first insulator layer is, for example, 100 to 50.
It can be formed with a thickness of 0Å.

In the first invention, a compound represented by the following chemical composition formula can be preferably used as the zirconate titanate forming the second insulator layer.

[0015]

[Chemical 1]

In the above formula, when y = 0, lead zirconate titanate (PZT) is obtained, and when y ≠ 0, lead lanthanum zirconate titanate (PLZT) is obtained. In the above formula, y is preferably 0 or in the range of 0.03 to 0.1. Also, z is 0.
A compound in the range of 5 or 0.65 to 0.7 is more preferably used.

Further, as zirconate titanate, P
Lead iron titanate zirconate titanate (PFZT) in which part of Pb in ZT is replaced with Fe, lead manganese titanate zirconate titanate in which part of Pb in PZT is replaced with Mn (P
MZT) or the like may be used.

In the first invention, the thickness of the second insulating layer can be set in the range of, for example, 1000 to 1500Å.

In the first invention, the electrode layer for the MIS structure is Pt, Al, Al alloy such as AlSi, Ti,
Ti alloy such as TiSi, W, W alloy such as WSi, Cu,
It can be formed of polysilicon or a combination thereof.

In the first invention, the first insulator layer may be directly formed on the semiconductor substrate, or may be provided on the semiconductor substrate via another film. When another film is formed on the semiconductor substrate and the first insulator layer is formed so as to be in contact therewith, the other film may be a silicon oxide film, a silicon nitride film, an oxynitride film, a TiO ₂ film, or a Ta ₂ O film. _Five membranes or a combination thereof can be used.

According to a second aspect of the present invention, there is provided a method of manufacturing an electronic device having a MIS structure, the step of preparing a semiconductor portion for the MIS structure, the step of forming a third insulator layer on the semiconductor portion, and the step of: The step of forming a fourth insulating layer made of zirconate titanate on the insulating layer of No. 3 and the step of forming an electrode layer for the MIS structure, and further forming a third insulating layer. The forming step includes strontium titanate (SrTiO ₃ ), barium titanate (BaTiO ₃ ), and barium strontium titanate (Ba _X Sr _1-X TiO ₃ (0 <X <
1)) forming an insulator layer of at least one titanate selected from the group consisting of: and a fourth insulator layer formed on the titanate insulator layer. It

In the second invention, the insulator layer made of at least one titanate selected from the group consisting of strontium titanate, barium titanate and barium strontium titanate is a liquid phase method such as a sol-gel method,
PVD such as sputtering or CVD such as MOCVD
Can be formed by. The insulating layer made of titanate is, for example, 100 to 500 by these methods.
It can be formed with a thickness of Å.

Similarly, the fourth insulator layer made of zirconate titanate such as PZT or PLZT is a liquid phase method such as sol-gel method, PVD or MOCV such as sputtering.
It can be formed by CVD such as D. The fourth insulator layer is, for example, 1000 to 15 by these methods.
It can be formed with a thickness of 00Å.

When the sputtering method is used in the second invention, a stoichiometric composition for strontium titanate, barium titanate or barium strontium titanate as a sputtering target when forming an insulator layer made of titanate is used. It is possible to preferably use a ceramics sintered body having When forming the fourth insulator layer, a ceramic sintered body having a stoichiometric composition for lead zirconate titanate, lead lanthanum zirconate titanate, or the like can be preferably used.

As the sputtering gas, a mixed gas of Ar and O ₂ is preferably used. An insulating layer made of titanate and a fourth insulating layer may be continuously formed by using two kinds of ceramics sintered bodies.

In the sputtering method, the substrate for depositing the insulating layer can be heated to 500 to 700 ° C. By depositing at such a high temperature, a film having a perovskite type crystal structure can be obtained by as grown. On the other hand, the temperature of the substrate may be set to a temperature of about 300 ° C. After sputtering at such temperature, 50
A film having a perovskite type crystal structure can be formed by performing the annealing at a temperature of 0 ° C to 700 ° C.

In the second invention, CVD can be preferably used to form the insulator layer. In the CVD, a β-diketone complex of Pb can be preferably used as a source material of Pb. The β-diketone complex of Pb can be represented by the following structural formula.

[0028]

[Chemical 2]

Since the β-diketone complex of Pb has low toxicity, the risk associated with its handling is low. Since the β-diketone complex of Pb has a relatively low melting point as compared with the conventional source material, its vaporization can be easily performed at a relatively low temperature. Β- of vaporized Pb in CVD
The diketone complex can reach the substrate with almost no decomposition. From these points, the β-diketone complex of Pb is industrially practical.

As a preferable example of the β-diketone complex of Pb, lead acetylacetonato (in the above formula, R ₁ ═CH ₃ , R ₂
= CH ₃ ), dipivaloylmethanatolead (R ₁ = C in the above formula)
_{(CH 3) 3, R 2} = C (CH 3) 3), heptafluorobutanoyl pivaloyl meth isocyanatomethyl lead (in the above formula R ₁ = C ₃
F ₇ , R ₂ ═C (CH ₃ ) 3) and lead hexafluoroacetylacetonato can be mentioned. further,
To lower the temperature of the CVD process, trimethylheptanedionato lead (TMHPD) having a lower melting point (in the above formula, R ₁ ═CH (CH ₃ ) ₂ and R ₂ ═C (CH ₃ )
₃ (melting point 77 ° C.) may be used.

These Pb source materials are CVD-processed by blowing a carrier gas into the heated and melted material.
The vapor may be transported to the environment for heating or subliming the solid by heating and vaporizing the vapor with a carrier gas.
May be transported to the environment. In these cases, nitrogen gas is usually used as the carrier gas.

As a Zr source material, 25 ° C., 1 atm
Liquid zirconium alkoxide (Zr (OR) ₄ )
Can be preferably used. The zirconium alkoxide can be selected, for example, from the group consisting of zirconium methoxide, zirconium ethoxide, zirconium propoxide and zirconium butoxide. As a particularly preferable example of the zirconium alkoxide, quaternary butoxyzirconium can be mentioned.

As a Ti source material, 25 ° C., 1 atm
Thus, liquid titanium alkoxide (Ti (OR ') ₄ ) can be preferably used. The titanium alkoxide can be selected, for example, from the group consisting of titanium methoxide, titanium ethoxide, titanium propoxide and titanium butoxide. Tetraisopropoxy titanium can be mentioned as a particularly preferable titanium alkoxide.

As the La source material, a β-diketone complex of La can be preferably used. A particularly preferable β-diketone complex of La is, for example, tridipivaloylmethanatrantan (La (DPM) ₃ ).

As the Ba source material, a β-diketone complex of Ba can be preferably used. Examples of preferable β-diketone complex of Ba include bisdipivaloylmethanatobarium (Ba (DPM) ₂ ).

As the Sr source material, a β-diketone complex of Sr can be preferably used. Examples of preferable β-diketone complex of Sr include bisdipivaloylmethanatostrontium (Sr (DPM) ₂ ).

In addition, at least one of oxygen and ozone can be used as an oxidant for the source material.

In the second invention, the insulating layer made of titanate or the fourth insulating layer can be preferably formed by thermal CVD using the above-mentioned raw materials. Heat C
In VD, the substrate is heated to, for example, 600-700 ° C.

In the second aspect of the invention, as the semiconductor, silicon, particularly p-type or n-type Si (100) single crystal substrate or Si (111) single crystal substrate is preferably used.
Further, as a semiconductor, other IV group semiconductors such as Ge,
Group III-V semiconductors such as GaAs or I such as InP
Various semiconductors such as I-VI group semiconductors may be used.

In the second invention, the fourth insulating layer made of zirconate titanate represented by the chemical composition formula [Chemical Formula 1] is preferably formed. Furthermore, the fourth insulator layer may be formed of PFZT, PMZT, or the like.

In the second invention, the electrode layer for the MIS structure is Pt, Al, Al alloy such as AlSi, Ti,
It can be produced from a Ti alloy such as TiSi, a W alloy such as W or WSi, a metal such as Cu, or a silicon compound such as polysilicon or tungsten silicide.

In the second invention, the third insulator layer is
An insulating layer may be included in addition to the insulating layer made of titanate. In this case, the step of forming the third insulator layer includes the step of forming another insulator layer before the step of forming the insulator layer made of titanate. Another insulating film is first formed on the semiconductor, and an insulating layer made of titanate is formed thereon. Then, a fourth insulator layer is formed on the insulator layer made of titanate. As another insulator layer, a silicon oxide film, a silicon nitride film, an oxynitride film, a TiO ₂ film, a Ta ₂ O ₅ film, or a combination thereof can be formed.

[0043]

The present inventors have conducted research on how to provide a ferroelectric layer having excellent characteristics on a semiconductor substrate. When forming an insulator film from zirconate titanate such as PZT and PLZT, it was an important key that the material of the film had a perovskite type crystal structure. PZT film or PLZT directly on Si substrate
Even if the film was formed, it was difficult to obtain a film having a perovskite type crystal structure.

Therefore, the inventors of the present invention used P for a semiconductor substrate or the like.
A study was conducted to find a material that easily forms a perovskite-type crystal on a different material whose physical properties are significantly different from those of ZT and PLZT. As a result, strontium titanate, barium titanate and barium strontium titanate were found as preferable materials. Then, as a result of forming a PZT film or a PLZT film on a thin film made of these materials, it was found that a ferroelectric film having a perovskite type crystal structure can be formed. It is considered that this is because the perovskite type crystal such as strontium titanate formed on the semiconductor substrate acts as an initial nucleus for crystal growth of PZT or PLZT. That is, it was considered that PZT, PLZT, or the like can be heteroepitaxially grown on the underlying crystal structure.

As described above, in the electronic device according to the first aspect of the invention, the PZT is provided in contact with the first insulating layer made of strontium titanate, barium titanate, barium strontium titanate or a combination thereof. Alternatively, the second insulating layer made of zirconate titanate such as PLZT has a perovskite type crystal structure and exhibits ferroelectricity at room temperature. Therefore, the structure of the present invention realizes a practical electronic device having an MFS structure.

Further, as described above, strontium titanate, barium titanate or barium strontium titanate can easily form a perovskite type crystal on a material having physical properties considerably different from those of PZT or PLZT such as a semiconductor substrate. it can. In the manufacturing method according to the second aspect of the invention, in the third insulator layer forming step, the insulator layer made of titanate is formed. By forming an insulating layer made of zirconate titanate such as PZT or PLZT on an insulating layer made of titanate, a ferroelectric layer having a perovskite type crystal structure can be obtained.
According to such a process, an electronic device having an MFS structure can be easily manufactured.

Further, strontium titanate, barium titanate and barium strontium titanate are P
It has a higher electric resistance than ZT or PLZT and has excellent insulating properties. Therefore, by stacking the insulating layer made of titanate and the insulating layer made of zirconate titanate, the electric resistance can be increased as compared with the case where the zirconate titanate film is used alone. The laminated structure having higher electrical resistance suppresses leakage current,
In particular, it is useful as a gate insulating film of FET.

Hereinafter, more specific examples of the present invention will be shown.

[0049]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An electronic device according to the first invention is
FIG. 1 shows a specific example of an IS structure portion (for example, a gate portion of a transistor in a semiconductor device). Referring to FIG. 1, on a silicon substrate 1 made of p-type or n-type silicon (100) single crystal, silicon (111) single crystal, or the like, strontium titanate, barium titanate, barium strontium titanate, or A first insulator layer 2 made of a combination thereof is formed. A second insulator layer 3 made of PZT or PLZT is formed on the first insulator layer 2. On the second insulator layer 3, platinum, aluminum, aluminum alloy, titanium,
An electrode 4 made of a metal such as titanium alloy, tungsten, a tungsten alloy or copper, or a silicon compound such as polysilicon or tungsten silicide is formed.

Such a structure can be formed as follows. Referring to FIG. 2, first, a silicon substrate 11 is prepared as shown in FIG. Next, FIG. 2 (b)
As shown in, the first insulator layer 1 is formed on the silicon substrate 11.
Form 2. The first insulator layer 12 can be formed by, for example, a sputtering method.

FIG. 3 schematically shows a sputtering apparatus for forming the first insulator layer. Referring to FIG.
In the reaction chamber 31, a substrate 32 for forming a thin film is attached to the susceptor 33. The susceptor 33 is 400 to 700 ° C., preferably 500 to 600 ° C. by resistance heating.
To be heated. The reaction chamber 31 can be evacuated by the rotary pump 34 and the cryopump 35.
As the target material 36, a ceramic sintered body having a stoichiometric composition ratio can be used. As the ceramic sintered body, a material having a composition ratio of SrTiO ₃ , BaTiO ₃ or Ba _X Sr _1-X TiO ₃ (0 <X <1) is used.

Argon or oxygen gas is supplied to the reaction chamber 31 through a pipe system 38 having gas flow rate control devices 37 and 37 '. The composition of the gas can be changed by controlling the flow rate, but the Ar / O ₂ ratio is preferably in the range of 5/1 to 9/1.

A high frequency power of 13.56 MHz is applied between the substrate 32 and the target 36 by a high frequency power supply 39. The input power is in the range of 200 to 1 kW.
The distance between the substrate and the target is 50 to 100 mm.
According to the film forming conditions described above, an insulating layer made of strontium titanate, barium titanate, or barium strontium titanate can be applied in an amount of 500-
It can be obtained with a thickness of 1000Å.

Then, a second insulator layer made of PZT or PLZT can be formed by the sol-gel method. To form this insulator layer, a sol-gel method that follows the flow shown in FIG. 4 is used. When forming PZT, a sol-gel solution prepared by dissolving lead acetate, tetrabutoxyzirconium and tetrapropoxytitanium in an organic solvent is used. To form PLZT, lanthanum acetate is further added to these raw materials.

As shown in FIG. 4, a sol-gel solution was added to the spa.
On the first insulator layer formed by the sputtering method.
Thickness of about 5 by heating, drying and calcination
A film of about 00Å can be obtained. As shown in the figure, the drying is 1
10 minutes at a temperature of 00 to 200 ° C., N₂Go under the atmosphere
Be seen. The calcination is performed at a temperature of 300 to 500 ° C. for 30 minutes,
O₂It is done in an atmosphere. From spin coating to temporary firing
The above step is repeated 4 to 5 times to obtain a desired film thickness. Obtained
The film at 500-700 ° C for 30 minutes ₂atmosphere
PZT film or PLZT film is obtained by main baking in
It

On the other hand, the PZT film or PLZT film is formed by CVD.
Can also be formed. FIG. 5 shows PZT or P
1 schematically shows a CVD apparatus for forming an LZT film. A substrate 54 for forming a thin film in a reaction chamber 56 for performing CVD is attached to a susceptor 60. The reaction chamber 56 has an infrared heater 5 for heating the substrate.
5 are provided. The reaction chamber 56 is a rotary pump 57.
It can be evacuated by a vacuum pump 57 including a and a mechanical booster pump 57b.

Further, the reaction chamber 56 is connected to a supply device for oxygen or ozone through a pipe system having a valve 40j and a gas flow rate control device 41c. Further reaction chamber 56
Is connected to tanks 51, 52, 53 and 44 for containing the source material via a piping system. The tank 51 for containing the Pb source material is supplied with N through a piping system having a valve 40c and a gas flow rate control device 41a.
_{2 The} supply device 58a is connected. The tank 51 is provided with the nozzle 48 of the reaction chamber 56 via a piping system having a valve 40a.
Connected to. A bypass having a valve 40b is provided between the piping system that supplies N ₂ and the piping system that supplies the Pb source material.

Similarly, the tank 52 for accommodating the Zr source material has a valve 40f and a gas flow rate controller 4.
An N ₂ supply device 58b is connected via 1b and a nozzle 48 via a valve 40d. Valve 40
A bypass with e is also provided as above.

Further, the tank 53 for accommodating the Ti source material is provided with the valve 40i and the gas flow rate control device 4.
It is connected to the N ₂ supply device 58c via 1d and to the nozzle 48 via the valve 40g. Valve 40
A bypass with h is also provided as above.

Tank 4 for supplying La source material
4 is a reaction chamber 56 through a piping system having a valve 40k.
Is connected to the nozzle 48 and is connected to the N ₂ supply device 58d through a pipe system having a valve 40m and a gas flow rate control device 41e. As with the other raw material supply system, a bypass having a valve 40n is provided.

The piping systems respectively extending from the tanks 51, 52, 53 and 44 are joined to reach the nozzle 48. The piping system for supplying the raw material can be heated by the ribbon heater 49.

In the above CVD apparatus, the tank 51 contains lead dipivaloylmethanato lead having a purity of 99.5% or more and is maintained at a temperature of 120 ° C. to 140 ° C., preferably 135 ° C. In the tank 52, the purity is 99.
99% quaternary butoxyzirconium (Zr (Ot-
C ₄ H ₉ ) ₄ ) is housed and kept at a temperature of 30 ° C to 50 ° C, preferably 30 ° C. In the tank 53, tetraisopropoxy titanium (Ti) with a purity of 99.999% is
_{(O-i-C 3 H} 7) 4) is housed, 30 ° C. to 50 ° C.
It is preferably maintained at a temperature of 30 ° C. Also, tank 4
4 has tridipivaloylmethanatrantan (La (D
PM) ₃ ) is housed and kept at a temperature of 175 ° C to 180 ° C. Note that these source materials can be obtained as commercial products.

At the time of forming the insulator layer, the pressure in the reaction chamber 56 is lowered to about 10 Torr by the vacuum pump 57a. The substrate 54 is fixed by the infrared heater 55.
It is heated to a temperature of 50 ° C. Then, each of the N ₂ supply device to a tank containing ingredients by opening the valves N ₂
Introduce gas. At this time, the source material in each tank is vaporized and carried to the reaction chamber 56 by N ₂ carrier gas.
At the same time, oxygen gas (semiconductor grade) or ozone gas (ozone concentration 50 to 95 g / Nm ³ ) is applied to the valve 4.
It is supplied to the reaction chamber 56 via 0j.

The flow rate of the carrier N ₂ gas is adjusted to 50 to 200 sccm by a gas flow rate control device equipped with a mass flow controller or flow meter. The flow rate of the gas containing oxygen gas and ozone is controlled by a gas flow rate controller equipped with a mass flow controller or flow meter.
00-2000 sccm, typically 1000 sccm
Is adjusted to. The raw material supply system is maintained at 50 to 200 ° C. by the ribbon heater 49. The raw material mixed gas is mixed with oxygen or ozone in the reaction chamber 56 and is oxidized. Through the above process, an insulating film made of PZT or PLZT is formed with a thickness of 1000 to 2000Å, preferably about 1500Å.

Next, an electrode layer is formed on the insulator layer formed by the above process according to a conventional method such as a sputtering method to form a MIS structure as shown in FIG.

SrTiO ₃ was deposited on a silicon (002) substrate.
The X-ray diffraction pattern when the film and the PZT film are laminated is shown in FIG. On the other hand, the X-ray diffraction pattern when PZT is directly deposited on the silicon substrate is shown in FIG.

The process for forming the insulating layer showing such a diffraction pattern was as follows. First, on the Si substrate, by the above-mentioned sputtering method, S with a thickness of about 35 nm is formed.
rTiO ₃ was deposited. Then, at a temperature of 650 ° C., O ₂
Crystal growth was performed on SrTiO ₃ by heat treatment in an atmosphere. Then, the PZT film was formed on the SrTiO ₃ film by the above-mentioned CVD. On the other hand, when forming only the PZT film, CVD was used.

As is clear from comparison between FIGS. 6A and 6B, the PZT film formed on the strontium titanate film exhibits good crystallinity. On the other hand, the PZT film formed directly on the silicon substrate has almost no crystal structure.

Further, the Pt electrode was provided on the PZT film formed on the strontium titanate film as described above, and the CV characteristics were measured. The result is shown in FIG. 7. Figure 7
(A) shows C-V characteristics when two insulator layers are formed on a p-type silicon substrate. FIG. 7B shows the case where an n-type silicon substrate is used. As shown in the figure, n
Hysteresis loops caused by ferroelectricity were found in both p-type and p-type substrates.

By using the process described above, it is possible to manufacture an MFSFET as shown in FIGS. 8 and 9, for example.

In the FET shown in FIG. 8, the gate insulating film 80 formed on the Si substrate 81 includes the first insulating layer 82 made of strontium titanate, barium titanate or barium strontium titanate, and the first insulating layer 82 formed thereon. The second insulator layer 83 formed and made of PZT or PLZT
Composed of and. A gate electrode 84 is provided on the second insulator layer 83. Source / drain regions 85 are formed on the Si substrate 81, and electrodes 86 and 86 'are provided so as to contact these regions, respectively.

In the FET shown in FIG. 9, the first insulator layer 8 is used.
A silicon oxide film 92 is interposed between the substrate 2 and the substrate 81.
The first insulator layer 82 is provided on the silicon oxide film 92. Other structures are similar to those of the FET shown in FIG.
In the FET shown in FIG. 9, another insulating film such as a silicon nitride film or an oxynitride film may be formed instead of the silicon oxide film.

In the above process, the first insulator layer may be formed by the sol-gel method or CVD. On the other hand, the second insulator layer can also be formed by a sputtering method.

[0074]

As described above, in the electronic device according to the first aspect of the invention, the insulator layer made of zirconate titanate such as PZT or PLZT may have a perovskite type crystal structure within the MIS structure. It is possible and exhibits sufficient ferroelectricity. The first invention is a practical MF
A device having an S structure is realized. The device according to the first invention is particularly useful for MFSFETs.

According to the manufacturing method of the second invention, a practical device having an MFS structure can be easily formed.

[Brief description of drawings]

FIG. 1 is a sectional view showing a specific example of a MIS structure for an electronic device according to the present invention.

FIG. 2 is a cross-sectional view showing a process for forming a MIS structure of an electronic device according to the present invention.

FIG. 3 is a schematic diagram showing a sputtering apparatus for manufacturing an insulating layer according to the present invention.

FIG. 4 is a diagram showing a flow for producing an insulator layer by a sol-gel method according to the present invention.

FIG. 5: CV for producing an insulator layer according to the invention
It is a schematic diagram which shows D device.

FIG. 6 is a diagram showing an X-ray diffraction pattern of a PZT film formed on a silicon substrate.

FIG. 7 is a CV of a MIS structure formed according to the present invention.
It is a figure which shows a characteristic.

FIG. 8 is a schematic diagram showing a specific example of an electronic device according to the present invention.

FIG. 9 is a schematic view showing another specific example of the electronic device according to the present invention.

FIG. 10 is a diagram for explaining the hysteresis characteristic of capacitance using ferroelectric ceramics.

FIG. 11 is a diagram for explaining an FET using ferroelectric ceramics for a gate insulating film.

FIG. 12 is a circuit diagram of an FET.

FIG. 13 is a diagram for explaining signal characteristics of an FET using ferroelectric ceramics for a gate insulating film.

[Explanation of symbols]

1, 11 Silicon substrate 2, 12 First insulator layer 3, 13 Second insulator layer 4, 14 Electrode In the drawings, the same reference numerals indicate the same or corresponding portions.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical indication location H01L 29/784 29/94 C 41/24 9274-4M H01L 41/22 Z

Claims (2)

[Claims] 1. An electronic device having a MIS structure, wherein the insulator layer for the MIS structure is at least one titanic acid selected from the group consisting of strontium titanate, barium titanate and barium strontium titanate. A first insulator layer made of a salt; and a second insulator layer made of zirconate titanate in contact with the first insulator layer, wherein the first insulator layer is the MIS. An electronic device, which is interposed between a semiconductor for structure and the second insulating layer, and wherein the second insulating layer exhibits ferroelectricity at room temperature. 2. A method of manufacturing an electronic device having a MIS structure, comprising: preparing a semiconductor portion for the MIS structure; forming a third insulator layer on the semiconductor portion; A step of forming a fourth insulator layer made of zirconate titanate on the third insulator layer; and a step of forming an electrode layer for the MIS structure, the third insulator The step of forming a layer comprises forming an insulator layer of at least one titanate selected from the group consisting of strontium titanate, barium titanate and barium strontium titanate, and said fourth insulating layer A method of manufacturing an electronic device, wherein the body layer is formed on the insulator layer made of the titanate.