JPH06303793A - Drive circuit of dc brushless dc motor - Google Patents

Abstract

PURPOSE:To facilitate a countermeasure to noise by making the cost and circuit space small, and also, facilitating the design of a printed board, and further, lessening the penetration place of noise. CONSTITUTION:A comparator 62 of one IC is provided, and reference voltage Vref is applied to the inverting input end - of this comparator 62, and signals Su, Sv, and Sw are applied through resistors R1-R3 to the noninverting input terminal + of the comparator 62. A value where these signals Su, Sv, and Sw are added and reference voltage Vref are compared with each other, and a signal S1 is outputted. Signal the signal of pulse at every 60' is outputted by inputting the signal, where the signals Su, Sv, and Sw are added, into the comparator 62 and comparing it with the reference voltage Vref.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive circuit for a brushless DC motor which detects the position of a field rotor by utilizing the terminal voltage of a winding and switches the flow state of a three-phase inverter circuit according to the detected position. It is a thing.

[0002]

2. Description of the Related Art FIG. 9 is a circuit diagram of a drive circuit of a conventional brushless DC motor of this type, which is described in, for example, Japanese Patent Laid-Open No. 63-7186. Further, FIG. 10 shows a specific configuration of the inverter circuit 17 and the brushless DC motor 18 shown in FIG.

First, in FIG. 10, 6 is a power source, and 7a to 7a.
c is a switching element of the positive arm of the three-phase full-bridge type inverter circuit, and 8a to 8c are switching elements of the negative arm. The free wheel diodes 11a to 1 are connected in parallel to the switching elements 7a to 7c of the positive arm.
1c is connected to the switching elements 8a to 8c of the negative arm, and the return diodes 12a to 1c are respectively connected to the switching elements 8a to 8c.
2c is connected to form an inverter circuit 17. The output of the inverter circuit 17 is connected to the drive windings 10a to 10c of the brushless DC motor 18. Reference numeral 9 is a field rotor of the brushless DC motor 18.

Further, in FIG. 9, 1a to 1c are input terminals of the terminal voltages of the drive windings 10a to 10c of the brushless DC motor 18, and are low-pass filters 2 for removing harmonics.
It is connected to each input terminal of 0a-20c. The outputs 46a to 46c of the filters 20a to 20c are connected to the non-inverting input terminals + of the comparators 4a to 4c, and the inverting input terminals-of the comparators 4a to 4c are grounded. Outputs 47a to 47c of the comparators 4a to 4c
Is a differentiation and logic circuit 21 and a microcomputer 22.
It is designed to be sent to.

The output of the differentiating and logic circuit 21 is sent to the microcomputer 22 and is sent to the microcomputer 22.
Of the positive side arm 7a of the inverter circuit 17
.About.7c, the flow control of the arms 8a to 8c on the negative electrode side is performed. And with the output of the inverter circuit 17,
The brushless DC motor 18 is driven. Each of the filters 20a to 20c is composed of a resistor and a capacitor, and constitutes a so-called CR low-pass filter.

FIG. 11 shows a specific circuit diagram of the differentiation and logic circuit 21. In FIG. 11, the OR circuit 2
The outputs 47a to 47c of the comparators 4a to 4c shown in FIG. 9 are input to the first input terminals of 9 to 31. The output 47a of the comparator 4a is introduced into the second input terminal of the OR circuit 31, and the output 47b of the comparator 4b is introduced into the second input terminal of the OR circuit 29. , Comparator 4c
Output 47c is introduced into the second input terminal of the OR circuit 30. The outputs of the OR circuits 29 to 31 are 3
It is adapted to be introduced to the first to third input terminals of the input NAND circuit 32. Output 48 of NAND circuit 32
Is the NAND circuit 3 through the differentiating capacitor 34a.
It is designed to be introduced to the first input terminal of 7 and N
The output 4 of this NOT circuit 33 is introduced into the OT circuit 33.
9 is introduced into the second input terminal of the NAND circuit 37 through the differentiating capacitor 34b. NAN
The first input terminal of the D circuit 37 is connected to the power supply via the pull-up resistor 35a and also connected to the power supply via the voltage clamping diode 36a. Similarly, the second input terminal of the NAND circuit 37 is connected to the power source via the pull-up resistor 35b and is also connected to the power source via the voltage clamping diode 36b. The output of the NAND circuit 37 is sent to the microcomputer 22 as the output 52 of the differentiation and logic circuit 21. Note that 50 and 51 are signals at the first and second input ends of the NAND circuit 37, respectively, and their waveforms are shown in FIGS. Further, the pulse of every 60 ° obtained from the differentiating and logic circuit 21 is inputted to the interrupt terminal of the microcomputer 22.

Next, the operation of the conventional example will be described. FIG. 12 is a diagram for explaining the operation. 12a to 1c of FIGS.
c is a waveform of the terminal voltage, and this waveform is filtered by the filter 20a.
.About.20c, as shown in FIGS. 12D to 12F, outputs 46a to 46c of substantially sinusoidal waveforms delayed by the phase .phi. Are obtained. The phase φ is determined by the phase characteristics of the filters 20a-20c with respect to frequency. When the output (sine wave waveform) of the filter 20 and the neutral point potential are compared by the comparators 4a to 4c as shown in FIG. 9, the waveform 4 as shown in FIGS.
7a-47c are obtained.

Next, FIG. 13 shows a process of obtaining pulses every 60 ° by the differentiating and logic circuit 21. 12
Outputs 4 of the comparators 4a to 4c shown in (a) to (c)
The waveform from 7a to 47c through the three OR circuits 29 to 31 and the 3-input NAND circuit 32 of the differentiation and logic circuit 21 is as shown in FIG. 13D, and the output 48 of the NAND circuit 32 is 1 is inverted by the NOT circuit 33, as shown in FIG.
It becomes like 3 (e). Output 48 of NAND circuit 32
Is differentiated by a differentiating circuit including the capacitor 34a, the pull-up resistor 35a, and the diode 36a. Similarly, the output 49 of the NOT circuit 33 is differentiated by a differentiation circuit including the capacitor 34b, the pull-up resistor 35b, and the diode 36b. As a result, the rising differentials of the outputs 48 and 49 are clamped, and only the falling differentials are obtained.
The signals 50 and 51 at the first and second input ends of the ND circuit 37 are
As shown in FIGS. 13 (f) and 13 (g). From the output of the NAND circuit 37 having this waveform as an input, an output 52 of a pulse waveform every 60 ° is obtained as shown in FIG.

In this way, the differentiation and logic circuit 21 inputs a pulse every 60 ° as a control signal to the microcomputer 22, and the microcomputer 22 sequentially switches the conduction states of the switching elements of the inverter circuit 17. , Blaresis DC motor 18
Is driven stably.

[0010]

In Japanese Laid-Open Patent Publication No. 63-7186, which is a conventional example, a differential and logic circuit 21 uses a terminal voltage to generate an electric signal from a rectangular wave signal having a frequency three times the operating frequency. A pulse is obtained every 60 °. In the configuration of the conventional differentiation and logic circuit 21 which obtains the pulse for each 60 ° of electrical angle, the OR circuit 29 to
3, three types of ICs such as 31, NAND circuits 32 and 37, and a NOT circuit 33, and two capacitors 34a and 34b,
Two resistors 35a, 35b, two diodes 36a,
36b is used. Therefore, there are various problems that the cost and the circuit space are increased, the wiring of the printed circuit board is complicated, and the number of intruding noises is increased.

The present invention has been made in order to solve the above-mentioned conventional drawbacks, and its purpose is to reduce the cost and circuit space, to facilitate the design of the printed circuit board, and to prevent the intrusion of noise. It is an object of the present invention to provide a drive circuit of a brushless DC motor that can reduce noise and facilitate noise countermeasures.

[0012]

Therefore, a drive circuit for a brushless DC motor according to a first aspect of the present invention uses a field rotor 9 of a permanent magnet.
Then, the DC motor 18 having the three-phase drive windings 10a to 10c detects the position of the field rotor 9 from the terminal voltage of the drive windings 10a to 10c, and detects the position of the three-phase inverter circuit 17 according to the position. A drive circuit of a brushless DC motor that sequentially switches the flow states to drive, and filters 20a to 20c that remove harmonics from three-phase terminal voltages, a terminal voltage that has passed through the filters 20a to 20c, and a predetermined reference voltage. Comparators 4a to 4c for comparing with the above, a means for outputting a pulse at every electrical angle of 60 ° from the outputs from the comparators 4a to 4c, and the switching elements 7a to 7c, 8 of the inverter circuit 17 by the pulse from this means.
In the drive circuit of the brushless DC motor including the control means 22 for controlling ON / OFF of a to 8c, the added value of the output values of the comparators 4a to 4c of each phase is used as an input to one input terminal and the other input. One of the features is that one comparator 62 having a reference voltage of a predetermined value as an input at its end constitutes a means 61 for outputting a pulse at every electrical angle of 60 °.

According to a second aspect of the present invention, there is provided a brushless DC motor drive circuit comprising a permanent magnet field rotor 9 and a DC motor 18 having three-phase drive windings 10a to 10c. Is a drive circuit of a brushless DC motor that detects the position of the field rotor 9 from the position of the field rotor 9 and sequentially switches the flow state of the three-phase inverter circuit 17 according to the position. The filters 20a to 20c to be removed and the filters 20a to 20c
comparators 4a to 4c for comparing the terminal voltage that has passed through c with a predetermined reference voltage, means for outputting a pulse every 60 electrical degrees from the outputs from the comparators 4a to 4c, and the inverter by the pulse from this means. Circuit 1
7, switching elements 7a to 7c and 8a to 8c are turned on,
In the drive circuit of the brushless DC motor including the control means 22 for performing the off control, the comparators 4a to 4 of the respective phases are provided.
The output from c is the open drain NAND gates ac.
Then, the NAND gates a to c are configured by one IC 63, and the outputs of the NAND gates a to c of the IC 63 are wired or connected to configure a means 61 for outputting a pulse at every 60 electrical angle. It has a feature.

[0014]

According to the brushless DC motor drive circuit of the first and second aspects, the number of ICs can be reduced to one as compared with the conventional example, and space and cost can be saved. Further, since the wiring can be easily made, the wiring of the printed circuit board is easy, and the number of intruding noises is small, which makes it easy to take measures against noises.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, specific embodiments of a brushless DC motor drive circuit according to the present invention will be described in detail with reference to the drawings. FIG. 3 shows a block circuit diagram of the drive circuit of the brushless DC motor, and the brushless DC motor 18, the inverter circuit 17, the microcomputer 22 and the like have the same configuration as the conventional one. The three-phase position signal generation circuit 60 is also composed of a filter, a comparator, etc., as in the conventional case.

Reference numeral 61 denotes a 60 ° signal generating circuit which is the gist of the present invention. As shown in FIG. 4, the 60 ° signal generating circuit 61 outputs 120 ° from the three-phase position signal generating circuit 60.
Upon receiving the signals S _u , S _v , and S _w out of phase, the pulse signal S ₁ is output every 60 °, and the microcomputer 22
I am trying to type in.

In FIG. 3, the position of the field rotor can be detected by using the three-phase terminal voltages of the brushless DC motor 18, and in order to realize this, the field rotor can be detected from the three terminal voltages. Binary signals S _u , S _v , and S _w having a phase difference of 120 ° with one rotation as a cycle are generated (see FIG. 4).

FIG. 6 shows a circuit diagram of a main part of the inverter circuit 17, in which the switching element of the positive arm (herein represented by the symbols U, V and W) and the switching element of the negative arm (here BU, BV, BW (B is B
It is represented by the symbol (meaning AR)). And in order to rotate the brushless DC motor 18,
Switching elements U, V, W, B of the inverter circuit 17
U, BV, and BW are shown in FIG.
Must be turned on and off as shown in. Therefore, in order to facilitate control of the microcomputer 22, 120 from the three-phase position signal generation circuit 60 shown in FIG.
It is better to input to the microcomputer 22 a signal for switching the H level and the L level every 60 ° from the signals S _u , S _v , and S _w that are out of phase, like the signal S ₁ . That is, when two values among the signals S _u , S _v , and S _w are H level, the signal S ₁ is set to H level, and when _one of the signals S _u , S _v , and S _w is H level, , The signal S ₁ may be set to the L level.

Therefore, in this embodiment, the 60 ° signal generation circuit 61 is formed by the circuit configuration shown in FIG. That is, the comparator 62 of one IC is provided, the reference voltage of V _ref is applied to the inverting input terminal − of the comparator 62, and the non-inverting input terminal + of the comparator 62 is connected via the resistors R _{1 to} R _3. Signals S _u , S _v , S
_w is applied, the value obtained by adding these signals S _u , S _v , and S _w is compared with the reference voltage V _ref, and the signal S ₁ is output.

That is, as shown in FIGS. 1, 2 and 4, when the signals S _u , S _v , and S _w are input to the comparator 62, a pair of two H level signals and one L level signal is generated. One H-level signal and two L-level signal sets appear alternately every 60 °, so the signal at point A is as shown in FIG. Here, when the value of the reference voltage V _ref is set in the middle of the high voltage and the low voltage at the point A and compared by the comparator 62, as shown in FIG. 2B, the same signal as the signal S ₁ shown in FIG. S ₁ is output from the comparator 62 and input to the microcomputer 22 to sequentially control the switching states of the switching elements of the inverter circuit 17 to drive and control the brushless DC motor 18. The power supply voltage of the comparator 62 and the microcomputer 22 is V _D , and as shown in FIG. 2B, the output voltage of the comparator 62 is also substantially V _D.

(Embodiment 2) Embodiment 2 is shown in FIG. In this embodiment, the configuration of the 60 ° signal generation circuit 61 is configured by using one IC 63 including open drain NAND gates a to c. Then, the outputs of the NAND gates a to c of the IC 63 are connected by wired OR, and the signal S
I'm trying to get _one . Here, each signal S _u ,
S _v and S _w are input to one input end of the NAND gates a to c, and the other-phase signals S _u , S _v , and S _w are input to the other input end. FIG. 8 is a diagram showing the truth value of FIG. 7, where Z is high impedance, L is L level, and ₁ in the signals S _u , S _v , and S _w signal S 1 is H level, 0.
Indicates L level.

When the signals S _u , S _v , and S _w as shown in FIG. 4 are sequentially input to the circuit shown in FIG. 7, the signals S _u , S _v , and S _w of the H level and L level are input. Depending on the state, the signal S ₁ is OR-outputted through the NAND gates a to c, and the signal S ₁ is, as shown in FIG.
0, 1, 0, 1, ... are sequentially output, resulting in 60
The pulse signal S _{1 for} each ° is output. For example, as shown in FIGS. 7 and 8, when the signals S _u , S _v , and S _w are 1, 0, 0, the NAND gates a to c are in the high impedance state, and the signal S ₁ is at the H level. When the signals S _u , S _v , and S _w are 1, 1, and 0, the NAND gate a has the H level for both inputs, so that the outputs are at the L level and the NAND gates b and c have the high impedance.
₁ becomes H level. Therefore, the result is as shown in FIG.

[0023]

According to the drive circuit of the brushless DC motor of the first and second aspects, it is possible to reduce the number of ICs to three as compared with the conventional example, and it is possible to save space and cost. Also, because the wiring can be easily done, the wiring of the printed circuit board is easy, and there are few noise points that enter,
Noise countermeasures are easy.

[Brief description of drawings]

FIG. 1 is a specific circuit diagram of a 60 ° signal generation circuit according to an embodiment of the present invention.

FIG. 2 is an operation waveform diagram of FIG. 1 according to the embodiment of the present invention.

FIG. 3 is a block diagram of a brushless DC motor drive circuit according to an embodiment of the present invention.

FIG. 4 is an operation waveform diagram of the embodiment of the invention.

FIG. 5 is an operation explanatory diagram of the embodiment of the present invention.

FIG. 6 is a circuit diagram of a main part of an inverter circuit according to an embodiment of the present invention.

FIG. 7 is a specific circuit diagram of a 60 ° signal generation circuit according to a second embodiment of the present invention.

FIG. 8 is an operation explanatory diagram of the second embodiment of the present invention.

FIG. 9 is a block diagram of a drive circuit of a conventional brushless DC motor.

FIG. 10 is a diagram showing configurations of a conventional inverter circuit and a brushless DC motor.

FIG. 11 is a specific circuit diagram of a differentiation and logic circuit of a conventional example.

FIG. 12 is an operation waveform diagram of a conventional example.

FIG. 13 is an operation waveform diagram of a conventional example.

[Explanation of symbols]

 4a comparator 4b comparator 4c comparator 7a switching element 7b switching element 7c switching element 8a switching element 8b switching element 8c switching element 9 field rotor 10a drive winding 10b drive winding 10c drive winding 17 inverter circuit 18 brushless DC motor 20a filter 20b Filter 20c Filter 22 Microcomputer 60 Three-phase position signal generation circuit 62 Comparator 63 IC

Claims (2)

[Claims] 1. A direct current motor (1) having a permanent magnet field rotor (9) and three-phase drive windings (10a-10c).
8) detects the position of the field rotor (9) from the terminal voltage of the drive windings (10a to 10c), and 3 is detected according to the position.
A drive circuit for a brushless DC motor that drives by sequentially switching the flow states of a phase inverter circuit (17), and filters (20a-2a) that remove harmonics from terminal voltages of three phases.
0c) and a comparator (4 that compares the terminal voltage that has passed through the filters (20a to 20c) with a predetermined reference voltage.
a to 4c), a means for outputting a pulse every 60 electrical degrees from the output from the comparators (4a to 4c), and the inverter circuit (17) by the pulse from this means.
In the drive circuit of the brushless DC motor provided with the control means (22) for ON / OFF controlling the switching elements (7a to 7c, 8a to 8c), the added value of the output values of the comparators (4a to 4c) of each phase. Is input to one input terminal, and a comparator (62) having a reference voltage of a predetermined value input to the other input terminal constitutes a means (61) for outputting a pulse every 60 electrical degrees. A drive circuit for a brushless DC motor characterized in that 2. A DC motor (1) having a permanent magnet field rotor (9) and three-phase drive windings (10a-10c).
8) detects the position of the field rotor (9) from the terminal voltage of the drive windings (10a to 10c), and 3 is detected according to the position.
A drive circuit for a brushless DC motor that drives by sequentially switching the flow states of a phase inverter circuit (17), and filters (20a-2a) that remove harmonics from terminal voltages of three phases.
0c) and a comparator (4 that compares the terminal voltage that has passed through the filters (20a to 20c) with a predetermined reference voltage.
a to 4c), a means for outputting a pulse every 60 electrical degrees from the output from the comparators (4a to 4c), and the inverter circuit (17) by the pulse from this means.
In the drive circuit of the brushless DC motor, which is equipped with a control means (22) for controlling ON / OFF of the switching elements (7a to 7c, 8a to 8c), the output from the comparators (4a to 4c) of each phase is open drained. Received at the NAND gates (a to c) of
c) is composed of one IC (63), and this IC (63)
(61) means for connecting the outputs of the NAND gates (a to c) in a wired-OR connection to output a pulse every 60 electrical degrees
A drive circuit for a brushless DC motor, characterized in that