JPH06303462A - Picture quality corrector - Google Patents

Abstract

PURPOSE:To provide a picture quality corrector which can improve the high frequency characteristic to acquire the natural images which are free from the undershoot and overshoot states. CONSTITUTION:A delaying device 10 delays a luminance signal. A primary differential arithmetic unit 20 acquires a primary differential signal from the output of the device 10, and a secondary differential arithmetic unit 30 acquires a secondary differential signal from the output of the device 10. A picture element interpolation arithmetic unit 40 generates the right and left interpolation picture element data between the right and left picture element data adjacent to the picture element data to be corrected from the output of the device 10. Then the unit 40 selects and outputs the right or left interpolation picture element data out of the primary and secondary differential signals to put the picture element data to be corrected close to the right or left. Thus the luminance signal can be tilted and the picture quality is corrected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image quality correction device used for improving a horizontal high frequency characteristic of a video signal in a television image.

[0002]

2. Description of the Related Art As a conventional image quality correction device for improving a horizontal high frequency characteristic of a video signal such as a luminance signal in a television image, a horizontal enhancer by analog signal processing or digital signal processing is used. Has been. FIG. 11 is a block diagram showing the configuration of an example of a conventional image quality correction apparatus, that is, an example of an enhancer. As shown in FIG. 11, this enhancer is composed of delay circuits 1 and 2, adders 3 and 6, a subtractor 4, a multiplier 5, and a limiter circuit 7. FIG. 12 input in FIG.
The luminance signal shown in (a) is input to the delay circuit 1 and the adder 3. The luminance signal input to the delay circuit 1 is delayed by a predetermined amount, and its output is input to the subtractor 4, the delay circuit 2 and the adder 6. The delay circuit 2 delays the output of the delay circuit 1 by a predetermined amount and inputs it to the adder 3. This adder 3 adds the input luminance signal shown in FIG. 12A and the output of the delay circuit 2 and halves the result, and inputs the result to the subtractor 4.

Then, the subtractor 4 subtracts the output of the adder 3 from the output of the delay circuit 1 and halves it to obtain the signal shown in FIG. 12 (b) in which the required enhancement frequency region is separated. To be The delay circuit 1 and 2, the adder 3 and the subtractor 4 operate as a bandpass filter. The signal shown in FIG. 12B output from the subtractor 4 is input to the multiplier 5. The multiplier 5 multiplies the output of the subtractor 4 that has been input by the set gain and inputs the result to the adder 6. The adder 6 adds the output of the delay circuit 1 and the output of the multiplier 5 to obtain a luminance signal as shown in FIG. The luminance signal shown in FIG. 12C output from the adder 6 is limited in the number of bits (for example, 8 bits) set by the limiter circuit 7 and output. As a result, undershoot and overshoot are attached to the edge portion of the luminance signal shown in FIG. 12A, and the high frequency component is reinforced.

[0004]

Although the conventional image quality correction apparatus uses the enhancement method to reinforce the high frequency component of the video signal as described above, the principle is as clear from FIG. However, there is a problem in that the image is often unnatural due to undershoot and overshoot at the edge of the signal. Therefore, a means for reinforcing the high frequency component of the video signal without undershoot or overshoot has been desired. The present invention has been made in view of the above problems, and an object of the present invention is to provide an image quality correction apparatus for improving a high frequency characteristic, which can obtain a natural image without undershoot and overshoot.

[0005]

SUMMARY OF THE INVENTION The present invention is an image quality correction apparatus for improving the high frequency characteristics of a television signal in order to solve the above-mentioned problems of the prior art, which is an input television. A delay device for delaying a signal, a primary differential operation device for obtaining a primary differential signal from a television signal output from the delay device, and a secondary differential signal for a television signal output from the delay device 2 The left and right interpolation pixel data of the correction target pixel data is generated from the secondary differential operation device and the television signal output from the delay device, and the left and right interpolation pixel data of the primary differential signal and the secondary differential signal is generated. An image quality correction device characterized by comprising a pixel interpolation calculation device for selecting and outputting any one of them.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An image quality correction device of the present invention will be described below with reference to the accompanying drawings. 1 is a block diagram showing an embodiment of an image quality correction apparatus of the present invention, FIG. 2 is a block diagram showing a specific configuration of the delay device 10 and the first-order differential operation device 20 in FIG. 1, and FIG. 3 is in FIG. 4 is a block diagram showing a specific configuration of the second order differential operation device 30, FIG. 4 is a block diagram showing a specific configuration of the pixel interpolation operation device 40, and FIG. 5 is a view showing the first order differential operation device 20 and the second order differential operation device 30. Coring circuit 2
FIG. 6 is a diagram showing characteristics of Nos. 2 and 33, and FIG.
And limiter circuits 23 and 34 in the second derivative operation device 30.
7 shows characteristics of the low-pass filter 32 in the second-order differential operation device 30 and its effect, FIG. 8 shows characteristics of the limiter circuit 42 in the pixel interpolation operation device 40, and FIG. Is a waveform diagram for explaining the image quality correction apparatus of the present invention, and FIG. 10 is a diagram for explaining the principle of the image quality correction apparatus of the present invention.

First, the principle of the image quality correction apparatus of the present invention will be described with reference to FIG. Note that, in FIG. 10, circles are data points. As an example, FIG.
The input signal (luminance signal) shown in is assumed. Figure 10 (b)
Is a signal obtained by first-order differentiating the input signal shown in FIG. 10A, and positive and negative values are generated at the rising and falling of the slope, respectively.
FIG. 10 (c) is a signal obtained by second-order differentiating the input signal shown in FIG. 10 (a). Negative and positive values are generated at the rising and falling of the slope of the first-order differentiated signal shown in FIG. 10 (b), respectively. . In addition,
Here, the signs of the primary differential signal and the secondary differential signal change depending on the direction of subtraction, but since the direction of the secondary differential is different from the direction of the primary differential here, the secondary differential signal is The waveform is such that a signal obtained by differentiating the primary differential signal is inverted. FIG. 10D is a summary of the results for each area. In order to improve the high frequency characteristic without using the conventional enhancement method, the slope of the input signal shown in FIG. 10A may be raised. Therefore, when the sign of the 1st derivative is +, the place where the sign of the 2nd derivative is-is shifted from the left to the right, and when the sign of 1st derivative is +, the place where the sign of 2nd derivative is + is from the right to left. Similarly, when the sign of the first derivative is −, the sign of the second derivative is +, the data is collected from left to right, and the sign of the first derivative is − and the sign of the second derivative is −. Place data from right to left.

That is, an EXOR (exclusive OR) circuit, for example, is used as a means for determining the sign of the first derivative and the sign of the second derivative, and the exclusive OR of them is taken, as shown in FIG. In addition, a control signal that the data is interpolated from the left of the correction target pixel at 1 and the data is interpolated from the right of the correction target pixel at 0 is obtained. When the data is interpolated by this control signal, a signal as shown in FIG. 10E is obtained, and the high frequency characteristic is improved due to the inclination. Further, the place where the value of the first derivative is 0 shown in FIG. Therefore, the 0-value detection portion of the first derivative may be used as a control signal for outputting the data without correction. It should be noted that even if the correction is performed in all parts, the image quality is not significantly affected, so that the main effect of the present invention can be obtained without the zero value detection and its control.

Next, the structure and operation of the image quality correction apparatus of the present invention based on the above principle will be described. As shown in FIG. 1, the image quality correction apparatus of the present invention includes a delay device 10,
It is roughly composed of a primary differential operation device 20, a secondary differential operation device 30, and a pixel interpolation operation device 40. Delay device 10
Is composed of four delay circuits 11 to 14, as will be described later with reference to FIG.
Secondary differentiation circuit 21, coring circuit 22, limiter circuit 2
3, an OR circuit 24, and a second-order differential operation device 30
Is a secondary differentiation circuit 31, a low pass filter (LPF) 3
2, a coring circuit 33, and a limiter circuit 34. The pixel interpolation calculation device 40 includes an interpolation filter 41, a limiter circuit 42, a delay circuit 43, a determination circuit 44, and a switch 4.
5 and 46. In FIG. 1, the signal lines from the delay device 10 to the first-order differential operation device 20, the second-order differential operation device 30, and the pixel interpolation operation device 40 are simplified and drawn as one line. Further, in the present embodiment described below, the input signal is a luminance signal and has the waveform shown in FIG. 9A, for example.

As shown in FIG. 2, the delay device 10 is composed of four delay circuits 11 to 14 having a delay time P, and the delay circuit 11 receives the input 8-bit pixel data D.
(-2) is delayed to output D (-1), and the delay circuit 12
Delays D (-1) and outputs D (0), and delay circuit 1
3 delays D (0) and outputs D (1), and the delay circuit 1
4 delays D (1) and outputs D (2). For example, if the delay circuits 11 to 14 sample four times as many sub-carriers, the delay for one pixel is about 70 ns. Now, assuming that the central pixel of the calculation is D (0), the first derivative is obtained by {D (-1) -D (1)}. Therefore, D (-1) and D (1) output from the delay circuit 11 and the delay circuit 13 in the delay device 10 are input to the primary differential circuit (subtraction circuit) 21 in the primary differential operation device 20,
The primary differentiating circuit 21 subtracts D (1) from D (-1) to obtain 1
The second differential signal (corresponding to FIG. 10B) is output.

This first-order differential value (8 bits) is used to adjust the detection sensitivity and to avoid the influence of noise, the coring circuit 22.
, And the input is ± a
In the range of, the output is cored so that the output becomes 0. Here, as an example, the coring circuit 22 is used.
Although the characteristic of is a straight line, it may be a curved line, and it is more preferable that the curved line shape and a can be arbitrarily set. The output (9 bits) of the coring circuit 22 from which the minute level signal of ± a or less is removed is input to the limiter circuit 23. The input of the coring circuit 22 is 8 bits, whereas the output thereof is 9 bits, because the carry or borrow is added to 8 bits to make an operation of 9 bits.

The characteristic of the limiter circuit 23 is as shown in FIG. 6, and as an example, the input of 9 bits is limited to 4 bits. Here, although the coring circuit 22 and the limiter circuit 23 are configured by different blocks, the coring circuit 22 and the limiter circuit 23 may have the characteristics of both the coring and the limiter. Of the 4 bits output from the limiter circuit 23, 1 bit of the most significant bit (MSB) is a polarity detection signal (see FIG. 1).
(Corresponding to the first-order differential code of 0 (d)), and inputting all 4 bits of the output of the limiter circuit 23 to the OR circuit 24 to perform a logical OR, and a 0 detection signal indicating a flat portion (0 value). To do. Therefore, the OR circuit 24 operates as 0 detection signal output means. In the present embodiment, the limiter circuit 2
Although 3 is provided, polarity detection and 0 detection are possible without a limiter circuit. Further, here, the handling of signed data is exemplified by the two's complement.

On the other hand, D from the delay device 10 shown in FIG.
(-2), D (0), D (2) output data A, B,
C is input to the second-order differential operation device 30. As shown in FIG. 3, the secondary differential circuit 31 in the secondary differential operation device 30 includes an adder 311 and a subtractor 312,
Similarly, as shown in FIG. 3, F32 is composed of delay circuits 321 and 322, and adders 323 and 324. Now, since the central pixel of the calculation is the data B which is D (0), the second derivative is {D (0) -0.5 × (D (-2)
+ D (2))}. Therefore, as shown in FIG. 3, the adder 311 adds the data A (D (−2)) and the data C (D (2)) and halves them, and the subtracter 312
Outputs the secondary differential signal (corresponding to FIG. 10C) by subtracting the output of the adder 311 from the data B (D (0)) and multiplying it by 1/2.

This second-order differential value (8 bits) is input to the LPF 32 and processed in order to exclude the vicinity of 3.58 MHz, which causes the adverse effect of phase shift, from being corrected. That is, the secondary differential value output from the subtractor 312 is sequentially delayed by the delay circuits 321 and 322 having the delay time Q, and the adder 3
23 adds the quadratic differential value output from the subtractor 312 and the output of the delay circuit 322 and halves it, and the adder 324 adds the output of the adder 323 and the output of the delay circuit 321 to 1 /
Double and output. The frequency characteristic of the secondary differential signal from the secondary differential circuit 31 is as shown in FIG.
(B) is the frequency characteristic of the LPF 32 described above. Therefore, the resulting detection area (image quality improvement area) is shown in FIG.
The area shown by hatching in (c). The delay circuit 321
If 322 and 322 are, for example, four times as large as the number of subcarriers, the delay for two pixels is about 140 ns.

The output (8 bits) of the LPF 32 is input to the coring circuit 33 in order to adjust the detection sensitivity and avoid the influence of noise, and its characteristics are shown in FIG.
When the input is within ± a, the output is cored so that the output becomes 0. Although the characteristic of the coring circuit 33 is a straight line as an example here, it may be a curved line.
Further, it is more preferable that the curve shape and a can be arbitrarily set. The output (9 bits) of the coring circuit 33 from which the minute level signal of ± a or less is removed is input to the limiter circuit 34. The input of the coring circuit 33 is 8 bits, while the output thereof is 9 bits, because the carry or borrow is added to 8 bits to make an operation of 9 bits, as described above.

The characteristic of the limiter circuit 34 is as shown in FIG. 6, and as an example, the input of 9 bits is limited to 4 bits. Here, the coring circuit 33 and the limiter circuit 34 are configured by different blocks, but the coring circuit 33 and the limiter circuit 34 may have the characteristics of both the coring and the limiter. Of the 4 bits output from the limiter circuit 34, 1 bit of the most significant bit (MSB) is a polarity detection signal (see FIG. 1).
(Corresponding to the secondary differential code of 0 (d)). Although the limiter circuit 34 is provided in the present embodiment, the polarity can be detected without the limiter circuit. Further, here, the handling of signed data is exemplified by the two's complement.

The primary and secondary differential codes shown in FIG. 10D are the primary differential circuit (subtraction circuit) 21 in the primary differential operation device 20 shown in FIG. 2 and the secondary differential circuit shown in FIG. The sign is changed by changing the subtraction direction of the subtraction circuit 312 of the secondary differentiation circuit 31 in the differential operation device 30. In the above-described embodiment, the code is set so that the determination circuit 44 in the pixel interpolation calculation device 40, which will be described later, can be easily configured.

Next, the pixel interpolation calculation device 40 will be described. As described in the principle of the present invention, since the correction target pixel data obtains the left and right values before the correction as the correction values,
First, a method of directly converting the left and right data can be considered. In this case, the effect may be significant, so it is preferable to interpolate the values between adjacent pixels and derive the result. Further, with this configuration, the effect of correction can be adjusted within the range of one pixel. As shown in FIG. 4, the interpolation filter 41 in the pixel interpolation calculation device 40 is composed of multipliers 411 to 414 to which data D to G are input, and an adder 415 that adds the outputs of the multipliers 411 to 414. ing. D (-from the delay device 10 shown in FIG.
2), D (−1), D (0), and D (1) output data D, E, F, and G are input to the interpolation filter 41 in the pixel interpolation calculation device 40.

The pixel data to be interpolated is in data F which is D (0), and its left and right components are between EF and F-, respectively.
It is between G. The function of the pixel interpolation calculation device 40 is to create the data between E and F and between F and G by four-point interpolation. First, in order to generate interpolation data between E and F by the interpolation filter 41, all the data D, E, F, and G are used. The coefficient of the multipliers 411 and 414 is β, and the coefficient of the multipliers 412 and 413 is α. These coefficients α and β are, for example, the following two types. α = 5/8, β = −1 / 8 (1) α = 1/2, β = 0 (2) When the coefficients α and β of the multipliers 411 to 414 are set to (1), this interpolation is performed. The filter 41 has good reproducibility in the high frequency range, and when the process (2) is performed, the interpolation filter 41 does not have good reproducibility in the high frequency range, but has a noise suppression effect of about 3 dB.

The output of the interpolation filter 41 is input to a limiter circuit 42 having the characteristics shown in FIG. 8, and the amplitude is limited to 8 bits and output. As a result, interpolation data (interpolation value) between E and F is generated. Since the interpolated data (interpolated value) between F and G is obtained by delaying the interpolated data (interpolated value) between E and F by a time corresponding to one pixel, the limiter circuit 4
The output of No. 2 is input to the delay circuit 43 having the delay time P and delayed by the time of one pixel. Then, an interpolated value between FG, that is, an interpolated value on the right side of the pixel data to be interpolated in FIG. 9 or 10A is obtained at one terminal 45a of the switch 45, and at the other terminal 45b. The interpolation value between E and F, that is, the interpolation value on the left side of the interpolation target pixel data in FIG. 9 or 10A is obtained. The polarity detection signal obtained from the primary differential operation device 20 and the polarity detection signal obtained from the secondary differential operation device 30 are input to the determination circuit 44 which is an EXOR circuit.
By taking the OR, a determination signal indicating which interpolation value should be selected is output.

The switch 45 is switched by the 1 or 0 decision signal output from the decision circuit 44. That is, when the determination signal is 1, the output of the delay circuit 43 is selected to shift the data from left to right, and when the determination signal is 0, the output of the limiter circuit 42 is shifted to shift the data from right to left. Select. Further, the data F is input to one terminal 46a of the switch 46 and the switch 46
The output of the switch 45 is input to the other terminal 46b. As described above, the place where the value of the first derivative is 0 is a flat place, and since it is not necessary to correct the data,
The switch 46 is switched by the 0 detection signal obtained from the first-order differential operation device 20. That is, the 0 detection signal output from the OR circuit 24 in the first-order differential operation device 20 is 0
In the case of, the switch 46 is connected to the terminal 46a, and when the 0 detection signal is 1, the switch 46 is connected to the terminal 46b. If the image quality is not corrected, the switch 46 may be forcibly connected to the terminal 46a.

In this way, the switch 46 to FIG.
An image quality corrected luminance signal as shown in (c) is output. Comparing the input luminance signal shown in FIG. 9A with the output luminance signal shown in FIG. 9C, it can be seen that the slope portion is steepened and the high frequency component is reinforced. Also, FIG. 9 (b)
For comparison, a luminance signal after image quality correction by a conventional image quality correction device (enhancer) is shown in FIG. This FIG. 9 (b)
As is clear from a comparison between FIG. 9C and FIG. 9C, the image quality correction apparatus of the present invention improves the high frequency characteristics without undershoot and overshoot, and obtains a natural image. Further, since the image quality correction device of the present invention has the interpolation filter 41 in the image quality interpolation calculation device 40, it also has a high-frequency noise attenuation effect.

In the image quality correction apparatus according to the present embodiment described above, the luminance signal is used as an example of the input signal, but the input signal may be an R, G, B signal or a color difference signal after demodulation. Good. Further, in the image quality correction apparatus of the present embodiment, the delay time of the four delay circuits 11 to 14 constituting the delay device 10 is set as the delay time of one pixel, and the high frequency component is corrected. When the image quality correction apparatus of the invention is applied and the input signal includes many frequency components in the low frequency range, the effect of enhancing the low frequency range can be obtained by lengthening the pixel delay time and interpolating from far pixels. Is also possible. At this time, the target band is also detected in the first-order differential operation device 20 and the second-order differential operation device 30. Further, at this time, the band limiting characteristic of the LPF 32 in the second derivative computing device 30 is changed accordingly.

[0024]

As described in detail above, the image quality correction apparatus of the present invention includes a first-order differential operation device for obtaining a first-order differential signal of a television signal and a second-order differential operation device for obtaining a second-order differential signal. , And a pixel interpolation calculation device that generates left and right interpolation pixel data of the correction target pixel data and selects one of the left and right interpolation pixel data from the primary differential signal and the secondary differential signal. The sloping portion of the John signal can be made steep, so that a natural image can be obtained without causing undershoot or overshoot at the edge portion of the signal unlike the conventional enhancer. Further, if the interpolation pixel data is set between the correction target pixel data and the adjacent left and right pixel data, the effect of the image quality correction can be adjusted within the range of one pixel, and the primary differential calculation device and the secondary differential calculation device can be used. If the differentiating device is provided with a coring circuit, the sensitivity can be adjusted and the influence of noise can be avoided. In addition, since the pixel interpolation calculation device includes the interpolation filter for generating the interpolated pixel data, it also has a secondary effect that it also has an attenuation effect for high frequency noise.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an image quality correction device of the present invention.

FIG. 2 is a delay device 10 and a first-order differential operation device 2 in FIG.
It is a block diagram which shows the concrete structure of 0.

FIG. 3 is a block diagram showing a specific configuration of a secondary differential calculation device 30 in FIG.

FIG. 4 is a block diagram showing a specific configuration of a pixel interpolation calculation device 40.

FIG. 5: First-order differential operation device 20 and second-order differential operation device 3
It is a figure which shows the characteristic of the coring circuits 22 and 33 in 0.

FIG. 6 is a first-order differential operation device 20 and a second-order differential operation device 3.
It is a figure which shows the characteristic of the limiter circuits 23 and 34 in 0.

FIG. 7 is a low-pass filter 3 in the second-order differential operation device 30.
It is a figure which shows the characteristic of 2 and its effect.

8 is a diagram showing characteristics of a limiter circuit 42 in the pixel interpolation calculation device 40. FIG.

FIG. 9 is a waveform diagram for explaining the image quality correction device of the present invention.

FIG. 10 is a diagram for explaining the principle of the image quality correction device of the present invention.

FIG. 11 is a block diagram showing an example of a conventional image quality correction device.

FIG. 12 is a waveform diagram for explaining a conventional image quality correction device.

[Explanation of symbols]

 10 Delay Devices 11 to 14 and 43 Delay Circuit 20 Primary Derivative Operation Device 21 Primary Differential Circuit 22, 33 Coring Circuits 23, 34 and 42 Limiter Circuit 24 OR Circuit (Detection Signal Output Means) 30 Secondary Differential Operation Device 31 Secondary differentiation circuit 32 Low-pass filter 40 Pixel interpolation calculation device 41 Interpolation filter 44 Judgment circuit (EXOR circuit) 45, 46 switch

Claims (6)

[Claims] 1. An image quality correction device for improving high frequency characteristics of a television signal, comprising: a delay device for delaying an input television signal; and a delay signal output from the delay device. First-order differential calculation device for obtaining a second-order differential signal, second-order differential calculation device for obtaining a second-order differential signal from the television signal output from the delay device, and correction target pixel from the television signal output from the delay device And a pixel interpolation calculation device for generating left and right interpolation pixel data and selecting and outputting either the left or right interpolation pixel data from the primary differential signal and the secondary differential signal. An image quality correction device characterized by. 2. The delay device has first to fourth delay circuits for sequentially delaying the input television signal, and the first-order differential operation device has left and right adjacent to the correction target pixel data. Primary differential circuit that obtains a primary differential signal from the pixel data of 1., a first coring circuit that correlates a minute level or less of the primary differential signal for sensitivity adjustment, and a positive or negative sign of the primary differential signal. And a means for obtaining a first polarity detection signal for determining polarity, wherein the secondary differential operation device obtains a secondary differential signal from left and right pixel data two pixels away from the correction target pixel data. A secondary differentiating circuit, a low-pass filter that limits the band of the secondary differential signal, a second coring circuit that correlates the output of the low-pass filter below a minute level for sensitivity adjustment, and the secondary differential signal of Means for obtaining a second polarity detection signal for determining a negative polarity, wherein the pixel interpolation calculation device is a television signal output from the first to fourth delay circuits of the delay device. An interpolation filter that generates left and right interpolation pixel data between the correction target pixel data and adjacent left and right pixel data,
A first switch for selecting the left and right interpolated pixel data, and a determination circuit for controlling the first switch based on the first polarity detection signal and the second polarity detection signal are provided. 1. The image quality correction device described in 1. 3. A detection signal output means for detecting a flat portion of the input television signal and outputting a detection signal is provided in the first-order differential operation device, and the correction target is provided in the pixel interpolation operation device. A second switch for selecting pixel data and the interpolated pixel data output from the first switch is provided, and the second switch is controlled by a detection signal output from the detection signal output means, The image quality correction apparatus according to claim 2, wherein the correction target pixel data is output as it is in a flat portion of the input television signal. 4. The first polarity detection signal and the second polarity detection signal are the most significant bits of the first-order differential signal and the second-order differential signal, or a bit-limited signal of the first-order differential signal and the second-order differential signal, respectively. The image quality correction device according to claim 2. 5. The detection signal output means takes an OR of the first-order differential signal or a bit-limited signal of the first-order differential signal.
The image quality correction apparatus according to claim 3, wherein the image quality correction apparatus is an R circuit. 6. The EXOR which takes an exclusive OR of the first polarity detection signal and the second polarity detection signal.
6. The image quality correction device according to claim 2, wherein the image quality correction device is a circuit.