JPH06302791A - Semiconductor substrate and manufacture thereof - Google Patents

Abstract

PURPOSE:To inhibit a temperature rise generated in an SOI wafer by partially burying an insulating film into a single-crystal silicon substrate. CONSTITUTION:A circuit 1 (34) is formed into a region, in which an insulator is not buried, on the left side of a single-crystal silicon substrate 31, a circuit 3 (36) into a region, in which an insulating film is not buried, on the right side of the substrate 31 and a circuit 2 (35) to a thin single-crystal silicon layer on the insulating film 32. There is no insulating layer under the circuit 1 of 34 and the circuit 3 of 36, and heat generated by operating these circuits 1, 3 escapes to the semi-conductive single-crystal silicon substrate 31. On the other hand, high speed properties are required particularly in the circuit 2 of 35 formed to the thin single-crystal silicon layer, an SOI layer 33, in the upper section of the insulating film 32, and heat generated in the SOI layer 33 by operating the circuit 2 proceeds to upper sections 37 and 38 at both end sections of the insulating film 32, and dissipated to the whole substrate 31 from the upper sections 37 and 38. Accordingly, the rise of a temperature can be inhibited even during the operation of the circuit 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate and its manufacturing method.

[0002]

2. Description of the Related Art Semiconductor silicon is an SOI on an electrically insulating film.
It is called (Silicon On Insnlator) and has been attracting attention in recent years as a semiconductor device capable of high speed and high integration. FIG. 2 shows a structural cross-sectional view of this SOI wafer substrate. Reference numeral 21 denotes a single crystal silicon substrate having a thickness of 500 to 1000 μm, 22 denotes a silicon oxide film (BOX: Baried Oxide) which is an electrical insulator having a thickness of several hundred Å to several μm, and 23 has a thickness of several hundred Å to several μm. The silicon oxide film 23, which is an electrical insulator, is single crystal silicon having a thickness of several hundred Å to several μm.

The semiconductor integrated circuit formed on the SOI wafer has a single crystal silicon layer (SOI layer) on the electric insulating film 22.
Since 23 is very thin, the integrated circuit is a complementary MIS.
In the case of a transistor (complementary metal / insulator transistor), the electrical capacitance between the source / substrate, drain / substrate, and gate substrate is reduced, which makes it possible to speed up the integrated circuit and the conventional single crystal. Compared with the case where an integrated circuit is formed on a silicon wafer, the presence of the electric insulator 22 makes it possible to make the element isolation region between the transistors very narrow, which has the advantage that high integration can be achieved. Have

[0004]

Although the SOI wafer has the above-mentioned excellent characteristics, the integrated circuit operates because the insulating film 22 exists immediately below the thin single crystal silicon on which the integrated circuit is formed. The heat generated by the electric current flowing during the operation does not escape to the thick semiconductive single crystal silicon substrate under the insulating film 22, and the heat is accumulated in the thin single crystal silicon layer 23, and the thin single crystal silicon layer 23 accumulates. The temperature of the crystalline silicon layer rises over time.

When the integrated circuit is formed by complementary MIS transistors, if the transistor size is reduced for higher integration, the current flowing in the transistor increases and the temperature rise also increases. When the temperature rises in the thin single crystal silicon layer, a large number of carrier trapping levels are easily generated in the gate insulating film of the MIS transistor, which causes variations in transistor characteristics and further impairs reliability of the integrated circuit. Become.

An object of the present invention is to provide a semiconductor substrate capable of forming a highly reliable integrated circuit while suppressing the above-mentioned drawback of temperature rise in an SOI wafer.

[0007]

An insulating film is locally formed in a single crystal silicon substrate for the purpose of releasing heat accumulated in a thin single crystal silicon layer (SOI layer) 23. That is, a thin single crystal silicon layer on the insulating film is locally formed in the single crystal silicon substrate.

[0008]

On the semiconductor substrate of the present invention having the above structure,
When an integrated circuit is formed, not only the heat generated in the integrated circuit formed on the single crystal silicon in the region where the insulating film is not formed, but also the single crystal silicon having good heat conductivity spreading under the integrated circuit Be dissipated in. Further, the heat generated in the integrated circuit formed in the single crystal silicon layer on the insulating film is transmitted to the end portion of the insulating film and then dissipated in the thick single crystal silicon in the region where the insulating film is not formed. .

[0009]

EXAMPLE An example of the present invention is shown in FIGS. 1 (a) and 1 (b). FIG. 1A is a plan view of a semiconductor substrate of the present invention, and FIG. 1B is a sectional structural view on a straight line AA ′ of FIG. Reference numeral 11 is a single crystal silicon substrate, 12 is an insulating film such as a silicon oxide film embedded in the single crystal silicon substrate, and 13 is a single crystal silicon layer on the insulating film 12, that is, an SOI layer. Reference numeral 14 indicates a cutting line cut to show a certain orientation of the single crystal silicon. The insulating film 12 has a thickness of, for example, several hundred Å to several μm, and similarly, the thin single crystal silicon layer 13 has a thickness of several hundred Å to several μm.

FIG. 3 shows an example of a semiconductor device formed by using the semiconductor substrate of the present invention shown in FIG. Reference numeral 31 is a single crystal silicon substrate, 32 is a silicon oxide film which is an insulator with a thickness of several hundred Å to several μm embedded in the single crystal silicon substrate 31, and 33 is several hundred Å to several μm in thickness on the silicon oxide film 32. Is a thin single crystal silicon layer, that is, an SOI layer.

Reference numeral 34 denotes a circuit 1 formed on the left side of the single crystal silicon substrate 31 and in a region where the insulator is not embedded,
36 is a circuit 3 formed on the right side of the single crystal silicon substrate and in a region where the insulating film is not buried, and 35 is a circuit 2 formed on a thin single crystal silicon layer on the insulating film 32. ing. The circuits 34, 35 and 36 are electrically connected to each other to form one integrated circuit having a certain function.

There is no insulating film under the circuits 3 of 34 and the circuits 3 of 36, and the heat generated by the operation of these circuits has a thickness of several hundreds under the circuits 3 of 34 and 1 of 36. It escapes to a thick semiconducting single crystal silicon substrate 31 of μm or more. As a result, the temperature rises and the MIS
Carrier trap levels do not occur in the gate insulating film of the transistor, and the reliability of the transistor group forming the circuits 34 and 1 and 36 is high and a stable circuit is obtained.

On the other hand, the thin single crystal silicon layer on the insulating film 32, that is, the circuit 2 of 35 formed in the SOI layer 33 is a circuit that requires particularly high speed. The reason why the integrated circuit formed of the MIS transistors formed in the SOI layer 33 has high speed will be described with reference to FIG.

The heat generated in the SOI layer 33 by the operation of the circuit 2 proceeds to the upper portions 37 and 381 at both ends of the insulating film 32, and is dissipated to the entire thick single crystal silicon substrate 31 from the upper portions 37 and 381, and the SOI layer 33. Never stop. Therefore, the temperature of the SOI layer 33 does not rise even during the operation of the circuit 2, and the carrier trap level does not occur in the gate insulating film of the MIS transistor group forming the circuit 2. As a result, the reliability of those transistor groups is high, and the circuit 2 operates stably with no change over time.

FIG. 4 shows a cross-sectional structural view of the N-type MIS transistor. The reason why the integrated circuit including the MIS transistor formed in the SOI layer has high speed will be briefly described with reference to FIG. 41 is a single crystal silicon substrate,
42 is an insulating film such as a silicon oxide film, 43 is a low concentration, for example, a P well made of a P-type impurity of about 1 × 10 ¹⁶ cm ⁻³ , 44 is a gate insulating film, and 45 is a high concentration, for example, about 1
A gate made of polycrystalline silicon containing N type impurities of × 10 ²⁰ cm ^-3 , and 46 and 47, respectively, are a source and a drain made of N type impurities of high concentration, for example, about 1 × 10 ²⁰ cm ^-3 . The N-type MIS transistor has a P well 4
3, a gate insulating film 44, a gate 45, a source 46, and a drain 47. Reference numeral 48 denotes a field oxide film made of a thick silicon oxide film for element isolation.

The thickness of the single crystal silicon of the P well 43 is, eg, about 0.6 μm. When operating the N-type MIS transistor, for example, the source potential is set to 0V and the gate and drain are set to 5V. At this time, a depletion layer spreads under the gate, the source and the drain. Dashed lines 49, 4
Reference numerals 10 and 411 denote boundaries of the depletion layer. The depletion layer is a region of high resistance with no moving carriers. Depletion layer is broken line 4
It extends to the right side of 9, the left side of 410, and the upper side of 411.

For example, if the depth of the source and drain is 0.
If the thickness is 3 μm, a depletion layer of about 0.9 μm spreads below the drain and about 0.3 μm below the source. Therefore, the depletion layer contacts the insulating film 42 not only under the drain but also under the source. To do. Therefore, the source substrate (P well 4
The capacitance between 3) and between the drain and the substrate (P well 43) includes the insulating film 42, which is a very small value. As a result, these parasitic capacitances are reduced, and the integrated circuit composed of MIS transistors formed in the SOI layer has high speed.

FIG. 5 shows another embodiment of the present invention. Figure 5
The embodiment of the present invention shown in FIG. 3 has much in common with the embodiment of the present invention shown in FIG. Therefore, in FIG. 5, description of the names of the portions 31 to 38 common to FIG. 3 is omitted. In FIG. 5, a part of the single crystal silicon under the silicon oxide film 32 which is an insulating film buried in a part of the single crystal silicon substrate 31 is removed. 51 and 52 are silicon nitride films, which serve as masks when removing the single crystal silicon under the silicon oxide film 32. When removing the single crystal silicon, for example, the single crystal silicon substrate may be immersed in a potassium hydroxide solution (KOH solution) heated to 80 ° C. to 100 ° C. The silicon oxide film 32 plays a role of an etching stopper when the single crystal silicon under the silicon oxide film 32 is removed by etching with a KOH solution, and the thin single crystal silicon film 33 on the silicon oxide film 32 is etched. Also plays a role in preventing After removing the single crystal silicon under the silicon oxide film 32, the silicon nitride films 51 and 52 may or may not be removed.

A manufacturing method for manufacturing the semiconductor substrate of the present invention shown in FIG. 1 will be described with reference to FIGS. 6A to 6D are process sectional views showing a manufacturing method for forming a semiconductor substrate of the present invention.

In FIG. 6A, reference numeral 61 denotes single crystal silicon, and 62 denotes a photoresist having a thickness of several μm applied on the entire surface of the single crystal silicon 61. In FIG. 6B, oxygen is added to the single crystal silicon 6 by a photolithography process.
The photoresist in the area where the ion implantation is to be performed in 1 is removed. Reference numeral 63 indicates the photoresist remaining after the photolithography process. In FIG. 6C, reference numeral 64 indicates oxygen ions ion-implanted into the single crystal silicon. The acceleration energy for implanting oxygen ions depends on the depth of the silicon oxide film formed under the SOI layer from the surface of the SOI layer. The amount of oxygen ions at the time of ion implantation is about 1 × 10 ¹⁸ cm ^-2 . Figure 6
In (d), the photoresist film 63 is removed. Thereafter, when a heat treatment at 900 ° C. or higher is applied, the single crystal silicon and the ion-implanted oxygen atoms react with each other to form a good silicon oxide film 65. However, the silicon oxide film 6
5 is a good thin single crystal silicon layer 66 or SOI
A layer will be formed.

In FIG. 6, when implanting oxygen ions,
The portion to be implanted was selected by removing only the desired portion of the photoresist film 62 applied on the single crystal silicon 61. However, in the method for manufacturing a semiconductor substrate of the present invention, as a method for selecting the position for ion implantation,
Photoresist film 6 applied on single crystal silicon 61
The method is not limited to the method in which 2 is removed only at a desired portion.

7A to 7D are process sectional views showing another embodiment of the manufacturing method for forming the semiconductor substrate of the present invention. In FIG. 7A, 71 is single crystal silicon, 72 is a silicon oxide film obtained by thermally oxidizing single crystal silicon 71 to a thickness of several thousand Å to several μm, and 73
Indicates a photoresist film applied on the silicon oxide film 72.

In FIG. 7B, the photoresist and the silicon oxide film at the locations where oxygen should be ion-implanted into the single crystal silicon 61 are removed by a photolithography process. 7
Reference numerals 4 and 75 respectively indicate the photoresist and the silicon oxide film remaining after the photolithography process.

In FIG. 7 (c), reference numeral 76 denotes oxygen ions ion-implanted into the single crystal silicon. The acceleration energy for implanting oxygen ions depends on the depth of the silicon oxide film formed under the SOI layer from the surface of the SOI layer. The amount of oxygen ions at the time of ion implantation is about 1 × 10 ¹⁸ cm ^-2 .

In FIG. 7D, the photoresist film 74 and the silicon oxide film 75 are removed after the oxygen ion implantation, so that the entire surface becomes a single crystal silicon layer having a flat surface. Thereafter, when a heat treatment at 900 ° C. or higher is applied, the single crystal silicon and the ion-implanted oxygen atoms react with each other to form a good silicon oxide film 77. Moreover,
A good thin single crystal silicon layer 78, that is, an SOI layer is formed on the silicon oxide film 77.

In FIG. 7, the silicon oxide film 72 and the photoresist film 73 are used for forming the implantation window when implanting oxygen ions, but another insulating film, for example, is deposited instead of the silicon oxide film 72. Even if a silicon nitride film or the like is used and a photoresist film 73 is used thereon, it does not matter.

Although the silicon oxide film is used as the insulating film under the SOI layer in the embodiments of FIGS. 6 and 7, another insulating film such as a silicon nitride film may be used. That is, in the embodiment of the present invention shown in FIGS. 6 and 7, oxygen ions are ion-implanted, but nitrogen ions are ion-implanted and then annealed to form a silicon nitride film at a desired depth from the silicon surface. May be formed.

FIGS. 8A to 8D and FIGS. 9E to 9G.
Another embodiment of the manufacturing method for forming the semiconductor substrate of the present invention will be described with reference to the process sectional views of FIGS. In FIG. 8A, 81 is single crystal silicon, 82 is a silicon oxide film obtained by thermally oxidizing single crystal silicon 81 to a thickness of several hundred Å, 83 is deposited silicon having a thickness of 1000 to 2000 Å Nitride film, 8
Reference numeral 4 denotes a photoresist film applied on the silicon nitride film 83.

In FIG. 8B, a window 85 is opened at a desired position of the photoresist by a photolithography process. In FIG. 8C, the silicon nitride film 83 in the portion where the window of the photoresist film is opened is removed.

In FIG. 8 (d), the photoresist film remaining on the silicon nitride film is removed and thermally oxidized to form a silicon oxide film 86 having a thickness of several thousand Å to several μm. In FIG. 9E, the remaining silicon nitride film is removed.

In FIG. 9F, the silicon oxide film 82
A photoresist film 87 is deposited on the entire surfaces of and 86. In FIG. 9G, the thin silicon oxide film 82, all of the deposited photoresist film 87 and the thick silicon oxide film 8 are used.
Part of 6 is etched by dry etching or the like.
As a result, the silicon oxide film 88 whose surface is flush with the surface of the single crystal silicon is newly formed at a plurality of desired positions in the single crystal silicon substrate.

Here, the single crystal silicon substrate used in the steps of FIGS. 8A to 9G is referred to as an A substrate. Figure 1
0 (h), a new single crystal silicon substrate 89 (B
Prepare the substrate).

In FIG. 10 (i), 1100 to 120
The A and B substrates are bonded together with the silicon oxide film 88 inside in a high temperature oxygen atmosphere of 0 ° C. A silicon oxide film 810 is formed around the A and B substrates. Figure 10
In (j), the single crystal silicon on the A substrate side is polished and polished so that the single crystal silicon to be left on the silicon oxide film 88 is left to have a desired thickness. As a result, the single crystal silicon substrate of the present invention as shown in FIG. 1B, in which the silicon oxide film 88 is embedded in the single crystal silicon, is completed. The silicon oxide film 810 around the single crystal silicon substrate may or may not be removed.

The method for manufacturing a semiconductor substrate of the present invention shown in the process cross-sectional views of FIGS. 8A to 10J uses a so-called bonding method for bonding two single crystal silicon substrates. is there. 8 (a) to 10 (j)
The embodiment of the present invention shown in FIG.
This does not have to be the case.

That is, the silicon oxide film 82 is not always necessary in FIG. Further, in FIG. 9F, the photoresist 8 is formed on the entire surface of the single crystal silicon substrate 81.
Although 7 is applied, the applied material is not necessarily a photoresist, but a silicon oxide film, a silicon nitride film, or a silicon oxide film formed by applying and heat-treating at a temperature of about 400 ° C. (commonly known as SOG: SPIN ON GL
It may be an insulating film such as ASS) or polyimide. By applying an insulating film of some kind to flatten the surface of the insulating film and obtain etching conditions that can obtain an etching rate almost equal to that of the silicon oxide film 86, the surface of the single crystal silicon substrate can be formed by subsequent etching. It can be formed flat as shown in FIG.

11 (a) to 11 (d) and 12 (e) to
Another embodiment of the manufacturing method for forming the semiconductor substrate of the present invention will be described with reference to (g) and the process cross-sectional views of FIGS. In FIG. 11A, 1101
Indicates a single crystal silicon substrate 1102 indicates a photoresist film applied on the single crystal silicon substrate 1101.

In FIG. 11B, a window 1103 is opened at a desired position of the photoresist by a photolithography process. A silicon oxide film is buried under the window 1103 in the final step. Reference numeral 1104 is a photoresist remaining after the photolithography process.

In FIG. 11 (c), the single crystal silicon at the portion where the window of the photoresist film is opened is etched to a desired depth by dry etching or the like. Reference numeral 1105 designates a concave portion formed by etching single crystal silicon. The remaining photoresist 1104 is removed.

In FIG. 11D, thermal oxidation is performed to form a silicon oxide film 1106 having a thickness of several thousand Å to several μm. In FIG. 12E, the silicon oxide film 11
A photoresist film 1107 is applied on the entire surface of 06.

In FIG. 12F, the photoresist film 1107 is dry-etched or the like until the silicon oxide film on the bottom surface 1108 of the single crystal silicon at a portion etched to a desired depth in FIG. 11C appears. To etch the entire surface (usually called etch back). As a result, the silicon oxide film 1109 is formed at a plurality of desired positions on the surface of the single crystal silicon substrate 1101.

Here, the single crystal silicon substrate used in the steps of FIGS. 11A to 12F is referred to as an A substrate.
In FIG. 12 (g), a new single crystal silicon substrate (B
A substrate 1110 is prepared.

In FIG. 13 (h), 1100 to 120
In the high temperature oxygen atmosphere of 0 ° C., the A substrate and the B substrate are bonded together with the silicon oxide film 1109 inside. A silicon oxide film 1111 is formed around the A and B substrates. Figure 1
3 (i), the single crystal silicon on the side of the A substrate is polished and polished so that the single crystal silicon left on the silicon oxide film 1109 has a desired thickness. As a result, the silicon oxide film 1109 is formed on the single crystal silicon substrate 11.
12 and a thin single crystal silicon layer 1113 is formed on the silicon oxide film 1109 at desired plural positions in the silicon substrate, as shown in FIG. 1B. Is completed. Silicon oxide film 1 formed around single crystal silicon substrate 1112
111 may or may not be removed.

The semiconductor substrate manufacturing method of the present invention shown in the process cross-sectional views of FIGS. 11A to 12I uses a so-called bonding method in which two single crystal silicon substrates are bonded together. is there. 11A to 12
The embodiment of the present invention shown in (i) is one representative example, and the embodiment is not necessarily required.

That is, in FIG. 11D, the silicon oxide film 1106 formed by thermally oxidizing the single crystal silicon substrate is not necessarily a silicon oxide film. Instead of this silicon oxide film, a silicon nitride film may be deposited. In this case, 11 in FIG.
09 is a silicon nitride film.

Further, in FIG. 12E, a photoresist film 1107 is deposited on the entire surface of the single crystal silicon substrate 1101. However, 1107 is not necessarily a photoresist film, but silicon oxide grown by chemical vapor deposition is used. Film, silicon nitride film, silicon oxide film formed by coating and heat treatment at a temperature of about 400 ° C. (commonly known as SOG: SPIN ON
It may be an insulating film such as GLASS) or polyimide. By forming an insulating film on the surface of the silicon substrate, flattening the surface of the insulating film, and obtaining an etching condition that provides an etching rate almost equal to that of the silicon oxide film 1106, the subsequent etching is performed to obtain single crystal silicon. The surface of the substrate can be formed flat as shown in FIG.

[0046]

As described above in detail, in the semiconductor substrate of the present invention, when the integrated circuit is formed thereon, the integrated circuit formed on the single crystal silicon in the region where the insulating film is not formed is formed. Of course, the heat generated in the above is also dissipated in the single crystal silicon with good thermal conductivity that spreads under the integrated circuit,
Further, the heat generated in the integrated circuit formed in the single crystal silicon layer over the insulating film is transmitted to the end portion of the insulating film and then dissipated in the thick single crystal silicon in the region where the insulating film is not formed, The reliability of the integrated circuit caused by the increase in heat does not deteriorate, and good characteristics are maintained.

Further, in the manufacturing method of the present invention for a semiconductor substrate in which an insulating film is embedded in a part of the region, a semiconductor substrate having a flat surface can be obtained by either the ion implantation method or the bonding method. It has an excellent advantage.

[Brief description of drawings]

1A is a plan view of a semiconductor substrate of the present invention, FIG.
FIG. 3 is a sectional view of a semiconductor substrate of the present invention.

FIG. 2 is a structural cross-sectional view of an SOI wafer.

FIG. 3 is a structural cross-sectional view of a semiconductor device formed using the semiconductor substrate of the present invention.

FIG. 4 is a structural cross-sectional view of an N-type MIS transistor.

FIG. 5 is a structural cross-sectional view of a semiconductor device formed using the semiconductor substrate of the present invention.

6A to 6D are cross-sectional views in order of the steps, showing the method for manufacturing a semiconductor substrate of the present invention.

7A to 7D are cross-sectional views in order of the steps, showing the method for manufacturing a semiconductor substrate of the present invention.

8A to 8D are cross-sectional views in order of the steps, showing the method for manufacturing a semiconductor substrate of the present invention.

9 (e) to 9 (g) are sectional views in order of the steps, showing the method for manufacturing a semiconductor substrate of the present invention.

10 (h) to 10 (j) are process order cross-sectional views showing the method for manufacturing a semiconductor substrate of the present invention.

11A to 11D are cross-sectional views in order of the steps, showing the method for manufacturing a semiconductor substrate of the present invention.

12 (e) to 12 (g) are sectional views in order of the steps, showing the method for manufacturing a semiconductor substrate of the present invention.

13 (h) to (i) are cross-sectional views in order of the steps, showing the method for manufacturing a semiconductor substrate of the present invention.

[Explanation of symbols]

11, 31, 61, 81 Single crystal silicon substrate 22 Silicon oxide film BOX 12, 32, 65, 88 Buried insulating film 64, 76 Oxygen ion 87, 1107 Photoresist 13, 33, 66, 1113 Thin single crystal on insulating film Silicon layer

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁵ Identification number Reference number within the agency FI technical display location // H01L 21/76 D 9169-4M (72) Inventor Atsushi Sakurai 6-31 Kameido, Koto-ku, Tokyo No. 1 Seiko Electronics Co., Ltd.

Claims (8)

[Claims] 1. A semiconductor substrate comprising an insulating film locally embedded in a single crystal silicon substrate. 2. An insulating film is embedded at a desired position by ion-implanting atoms that react with the single crystal silicon to form an insulating film at a local position of a semiconductor single crystal silicon substrate and then annealing. A method of manufacturing a semiconductor substrate, which comprises forming a semiconductor substrate. 3. A single crystal silicon substrate is coated with a photoresist, and the photoresist is removed by a photolithography process at a portion where an insulating film is formed inside the single crystal silicon, and reacts with the single crystal silicon for insulation. A semiconductor substrate in which an insulating film is embedded in a desired position is formed by ion-implanting atoms forming a film, removing a photoresist remaining on single crystal silicon, and then annealing. The method of manufacturing a semiconductor substrate according to claim 2. 4. A first insulating film is formed on a surface of a single crystal silicon substrate, a photoresist is applied on the first insulating film, and a second insulating film is formed inside the single crystal silicon by a photolithography process. The photoresist on the film forming portion is removed, the atoms that react with the single crystal silicon to form the insulating film are ion-implanted, the photoresist remaining on the single crystal silicon is removed, and then annealed. The method of manufacturing a semiconductor substrate according to claim 2, wherein the semiconductor substrate having the second insulating film embedded in a desired position is thereby formed. 5. A silicon oxide film is locally formed on the surface of the first single crystal silicon substrate by locally oxidizing the first single crystal silicon substrate, and then the first single crystal silicon substrate. An insulating film is formed on the surface, and the insulating film formed on the silicon surface is removed by a method such as etching until the silicon oxide film and the surface of the single crystal silicon substrate become the same surface. A crystalline silicon substrate and another new second single crystal silicon substrate are bonded together in a high temperature atmosphere with the silicon oxide film formed on the first single crystal silicon substrate inside, and then one of the single silicon substrates is bonded. Remove the single crystal silicon by polishing or etching until the single crystal silicon layer of the desired thickness remains on the silicon oxide film, and then place the crystalline silicon substrate at the desired position. A method of manufacturing a semiconductor substrate, which comprises forming a semiconductor substrate in which an insulating film is embedded. 6. A first insulating film is formed on a first single crystal silicon substrate, and the first insulating film is locally left on the first single crystal silicon substrate by a photolithography process or the like, Then, a second insulating film is formed on the surface of the first single crystal silicon substrate, and the second insulating film is formed on the silicon surface until the surfaces of the first insulating film and the first single crystal silicon substrate become the same surface. The formed second insulating film is removed by a method such as etching, and then the first single crystal silicon substrate and another new second single crystal silicon substrate are replaced with the first single crystal silicon described above. The first insulating film left locally on the substrate is bonded to the inside in a high temperature atmosphere, and then one of the single crystal silicon substrates is formed on the first insulating film with a desired thickness of the single crystal silicon. Polish or etch until the layer remains. A method for manufacturing a semiconductor substrate, characterized in that the single crystal silicon is removed by etching or the like to form a semiconductor substrate in which an insulating film is embedded at a desired position. 7. The first single crystal silicon substrate surface is locally removed by etching or the like, and then is oxidized to locally remove the first single crystal silicon surface and the first single crystal silicon surface. A silicon oxide film is formed on the removed portion, and a new insulating film is further deposited on the silicon oxide film, and the insulating film is formed until the surface of the silicon oxide film becomes the same surface as that of single crystal silicon. The first single crystal silicon substrate and another new second single crystal silicon substrate are removed by a method such as film etching, and a silicon oxide film formed on the first single crystal silicon substrate is placed inside. Then, the single crystal silicon substrates are bonded together in a high temperature atmosphere, and then one of the single crystal silicon substrates is polished or etched until a single crystal silicon layer having a desired thickness remains on the silicon oxide film. A method for manufacturing a semiconductor substrate, wherein the single crystal silicon is removed by a method such as the above to form a semiconductor substrate in which an insulating film is embedded at a desired position. 8. The first single crystal silicon substrate surface is locally removed by etching or the like, and then the first single crystal silicon surface and the first single crystal silicon surface are locally removed. A first insulating film is formed at a position, and a new second insulating film is further formed on the first insulating film, and the surface of the first insulating film is the same as the surface of single crystal silicon. The second insulating film is removed by a method such as etching, and the first single crystal silicon substrate and another new second single crystal silicon substrate are replaced with the first single crystal silicon substrate. The first insulating film formed above is bonded to the inside in a high temperature atmosphere, and then one of the single crystal silicon substrates is laminated on the first insulating film until a single crystal silicon layer having a desired thickness remains. One of the A method of manufacturing a semiconductor substrate, comprising removing crystalline silicon to form a semiconductor substrate having an insulating film embedded at a desired position.