JPH0629515A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a manufacturing method of a semiconductor device wherein the orientation property of a polymer material film formed along the lengthwise direction of a groove by a capillary phenomenon is enhanced and the contact area between the polymer material film and a belt-shaped conductor layer or the like formed in a direction crossed with the lengthwise direction of the groove can be ensured sufficiently. CONSTITUTION:This manufacture is constituted so as to include the following: a process wherein a belt-shaped groove 12 with its surface layer composed of an insulating film 13 is formed in a base body 11; a process wherein a conductive film traversing the groove 12 is formed on the insulating film; and a process wherein one end of the groove 12 is immersed in a catalyst solution for a polymer material, the catalyst solution for the polymer material is introduced along the groove 12 by a capillary phenomenon and a polymer material film 15 is formed inside the groove 12 and connected to conductive films 14a, 14b.

Description

Detailed Description of the Invention

(Table of Contents) -Industrial application field-Conventional technology (Figs. 6 to 8) -Problem to be solved by the invention-Means for solving the problem-Action-Example (1) First example Example (FIGS. 1, 2 and 5) (2) Second Example (FIGS. 3 and 4)

[0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device using a conductive polymer material as a semiconductor material or a wiring material.

[0003]

2. Description of the Related Art Conductive polymer materials such as polyacetylene (CH) _x are known to have a different conduction mechanism from inorganic semiconductor materials such as silicon, but they may be used as semiconductor materials. .

Moreover, such a conductive polymer material has features such as light weight, flexibility, and easy processing and large area. Therefore, it is expected as a semiconductor material replacing silicon or a wiring material replacing metal or the like depending on the application. For example, it may be used for making electronic devices such as FETs and solar cells, and for making wiring for semiconductor integrated circuit devices and the like.

In particular, polyacetylene ((CH) _x ) is
It is a chain aliphatic unsaturated hydrocarbon having a conjugated double bond in the molecular chain and is usually a non-conductor, but conductivity can be imparted by introducing impurities such as iodine (I). Furthermore, by forming a conductive polymer material in the fine grooves, a polymer material having high electric conductivity can be obtained.

For example, a polyacetylene film can be formed by introducing acetylene gas into a substrate coated with a Ziegler-Natta catalyst solution composed of triethylaluminum and tetrabutoxytitanium using toluene as a solvent. However, the polyacetylene film produced in this way has a structure in which the fibrils (fibrous single crystals) with a diameter of several hundred Å where the molecular chains have grown intersect at random, and as a result, the electrical conductivity is low. Not shown.

On the other hand, it exhibits high electrical conductivity in the longitudinal direction of the fibrils. Therefore, by forming fine grooves with a width of 0.5 μm or less and a depth of about 1 μm on a silicon substrate or a silicon oxide film, and introducing the catalyst solution only into the grooves by using a capillary phenomenon, A polyacetylene film with uniform alignment can be formed. The polyacetylene film thus formed has a high electric conductivity.

6 (a) to 6 (c), 7 (d) and 7 (e)
FIG. 6 is a perspective view for explaining a conventional method for manufacturing a field effect transistor using the polyacetylene film manufactured by the above method as a semiconductor material.

First, as shown in FIG. 6A, a silicon oxide film 2 is formed on the surface of a silicon substrate 1. Then, S / D, which is electrically separated and paralleled at a predetermined interval
Band-shaped S / D wiring layers 3a, 3 integrally formed with electrodes
b is formed on the silicon oxide film 2 (FIG. 6B).

Then, a silicon oxide film 4 is formed so as to cover the S / D wiring layers 3a and 3b (FIG. 6 (c)). next,
A groove 5 having a width of 0.5 μm or less and a depth of about 1 μm is formed in the silicon oxide film 4 to expose a part of the S / D wiring layers 3a and 3b (FIG. 7D).

Then, a groove 5 is added to the Ziegler-Natta catalyst solution.
After immersing one end thereof, the pressure is reduced and acetylene gas is introduced and maintained for a predetermined time. As a result, the catalyst solution is introduced only into the groove 5 due to the capillary phenomenon, and the catalyst solution reacts with the acetylene gas to form the polyacetylene film 6 having the orientation along the groove 5. Subsequently, it is washed with toluene and then dried. Then, iodine is selectively introduced into the polyacetylene film 6 to impart semiconductivity,
Further, when the gate electrode 7 is formed on the back surface of the silicon substrate 1, the field effect transistor is completed (FIG. 7 (e)).
The polyacetylene film 6 sandwiched between the S / D wiring layers 3a and 3b serves as a channel region layer, and on both sides thereof, S
The polyacetylene film 6 in contact with the / D wiring layers 3a and 3b becomes the S / D region layer.

[0012]

In the method of manufacturing a field effect transistor described above, since the upper and lower insulating films of the S / D wiring layers 3a and 3b are silicon oxide films 2 and 4 of the same type, FIG. When the groove 5a is formed in the upper silicon oxide film 4 by the same method as shown in d), the underlying silicon oxide film 2 other than the lower portions of the S / D wiring layers 3a and 3b may also be etched. Therefore, the S / D wiring layer 3a,
A concave portion 8 having a level difference equal to or larger than the film thickness of 3b is formed (see
(A)) When the polyacetylene film is formed in the groove 5a by the capillary phenomenon, the polyacetylene film has a disordered orientation, and thus has a problem of low electric conductivity.

Even when the groove 5b is formed so that no step is formed, the groove 5b is formed by the same method as shown in FIG. 7 (e).
When the polyacetylene film 6a is formed in b and then dried, the polyacetylene film 6a shrinks due to the surface tension (FIG. 8B). Therefore, there is a problem that the contact area with the S / D wiring layers 3a and 3b becomes insufficient.

The present invention has been made in view of the above problems of the prior art, and improves the orientation of the polymer material film formed along the longitudinal direction of the groove by the capillary phenomenon, and the polymer. An object of the present invention is to provide a method for manufacturing a semiconductor device, which can sufficiently secure a contact area between a material film and a strip-shaped conductor layer or the like formed in a direction intersecting the longitudinal direction of a groove.

[0015]

The first object of the present invention is to provide a step of forming a band-shaped groove having a surface layer made of an insulating film on a substrate.
Forming a conductive film across the groove on the insulating film; selectively etching and removing the conductive film to form a sidewall of the groove in a direction intersecting the longitudinal direction of the groove. And a step of leaving a strip-shaped conductive film passing through the bottom, and by immersing one end of the groove in the catalyst solution of the polymer material and introducing the catalyst solution of the polymer material along the groove by capillary action. And a step of forming a polymer material film in the groove and connecting to the conductive film, and secondly, selectively etching the conductive film. The semiconductor device according to the first aspect of the present invention, which includes a step of removing and leaving a strip-shaped conductive film that passes through a sidewall and a bottom of the groove in a direction intersecting the longitudinal direction of the groove. Achieved by the manufacturing method of Thirdly, the conductive film is selectively oxidized to leave a strip-shaped conductive film in a direction intersecting with the longitudinal direction of the groove, and the remaining strip-shaped conductive film is formed. This is achieved by the method for manufacturing a semiconductor device according to the first aspect of the invention, which comprises a step of insulating the peripheral portion. Fourth, at least two strip-shaped conductive films are arranged in parallel with each other. A channel region layer having a step of remaining, wherein the two strip-shaped conductive films are respectively used as source / drain wiring layers, and the polymer material film in a region sandwiched between the two strip-shaped conductive films is formed. It is achieved by the method for manufacturing a semiconductor device according to the second or third invention, which is characterized by forming a field effect transistor having

[0016]

[Operation] In the method of manufacturing a semiconductor device of the present invention,
After forming the groove in advance, a band-shaped conductive film is formed on the groove. Therefore, the base insulating film at the bottom of the groove, as in the conventional case of forming a groove in the insulating film covering the conductive film after forming a band-shaped conductive film on the underlying insulating film Over etching does not occur.
As a result, unlike the conventional case, the bottom of the groove does not always have a level difference equal to or larger than the film thickness of the band-shaped conductive film. In particular,
When the conductive film covering the groove is selectively oxidized to leave the strip-shaped conductive film, the step difference at the bottom of the groove can be further reduced. Therefore, the directions of the fibrils forming the polymer material film formed along the groove are aligned along the groove.

Further, since the groove is formed in advance and the band-shaped conductive film is formed on the groove, the band-shaped conductive film is present on the side wall and the bottom of the groove. Therefore,
When the polymer material film formed in the groove is dried, even if the polymer material film shrinks due to surface tension, unlike the conventional case, the polymer material film has a strip-shaped conductivity with the polymer material film on both the sidewall and the bottom of the groove. You can get in touch with.

As a result, it is possible to improve the orientation of the polymer material film formed along the groove by the capillary phenomenon and to secure a sufficient contact area between the polymer material film and the conductive film.

After forming the groove, the source / source is formed on the groove.
Band-shaped conductive films to be the drain electrode and the source / drain wiring layer are formed in parallel with each other, and then a polymer material is introduced along the groove to form a polymer material film in the groove to form a band-shaped film. A field effect transistor having a channel region layer which is a polymer material film in a region sandwiched between two strip-shaped conductive films is formed. This improves the orientation of the polymer material film,
A field effect transistor in which a contact area between the polymer material film and the conductive film is sufficiently secured can be manufactured.

[0020]

EXAMPLES (1) First Example Next, a method for producing a field effect transistor using the polyacetylene film of the first example of the present invention as a semiconductor material will be described with reference to the drawings.

First, an apparatus for forming the above polyacetylene film in the groove formed on the surface layer of the wafer will be described. FIG. 5 is a perspective configuration diagram of such a device. In FIG. 5, 17 is a Ziegler-Natta catalyst solution 1
8 is a container, 11 or 11a is a wafer (silicon substrate; substrate), and 12 or 12a is a groove formed in the surface layer of the wafer 11 or 11a.

Using this apparatus, a polyacetylene film is formed in the groove 12 or 12a formed in the surface layer of the wafer 11 or 11a as follows. That is, the wafer 11 or 21
After immersing one end of the groove 12 or 12a formed in the surface layer in the Ziegler-Natta catalyst solution 18, the pressure inside the container 17 in which the Ziegler-Natta catalyst solution 18 is housed is reduced, and acetylene gas is introduced into the container 17 from the outside. The pressure to about 100 To
Hold in rr. As a result, due to the capillary phenomenon, the groove 12 or
Ziegler-Natta catalyst solution 18 is introduced along 12a and causes a polymerization reaction with acetylene gas to form groove 12 or
A polyacetylene film is formed in 12a.

Next, using the above apparatus, the first of the present invention will be described.
A method of manufacturing a field effect transistor using the polyacetylene film of the above example as a semiconductor material will be described. 1 (a), 1 (b), 2 (c) and 2 (d) are perspective views for explaining a method of manufacturing the field effect transistor of the first embodiment of the present invention.

First, as shown in FIG. 1A, by RIE (reactive ion etching) using CF ₄ gas,
The silicon substrate (base) 11 is anisotropically etched and removed to form a groove 12 having a width of 0.5 μm or less and a depth of about 1 μm.

Then, in a dry oxygen gas atmosphere, a temperature of 10
Under the condition of 00 ° C., a silicon oxide film (insulating film) 13 having a film thickness of about 500 Å is formed on the surface layer of the silicon substrate 11 by thermal oxidation (FIG. 1B).

Next, a polysilicon film (conductive film) having a film thickness of about 500 Å is formed on the silicon oxide film 13 by the chemical vapor deposition method (CVD method). At this time, CV
Since the D method is used, the polysilicon film can be formed on the side wall and the bottom of the groove 12 with a uniform film thickness.

Then, the polysilicon film is patterned, passes through the side wall and the bottom of the groove 12 in a direction intersecting the longitudinal direction of the groove 12, and is formed into a strip-shaped polysilicon film as a source / drain electrode and a source / drain wiring layer ( Conductive film; hereinafter referred to as S / D electrode / wiring layer) 14a,
Two 14b remain so as to be parallel to each other. Subsequently, the gate electrode 16 made of an aluminum film having a film thickness of about 1 μm is formed on the back surface of the silicon substrate 11 (FIG. 2C).

Next, one end of the groove 12 is immersed in the Ziegler-Natta catalyst solution (catalyst solution forming a polymer material) 18 in the container 17 of the apparatus shown in FIG.
Introduce acetylene gas into the container 17 and adjust the pressure to 100.
Hold on to Torr. As a result, the Ziegler-Natta catalyst solution 18 is introduced into the groove 12 along the groove 12 due to the capillary phenomenon, and is polymerized with acetylene gas to form a polyacetylene film (polymer material film) 15. At this time, unlike the prior art, since the etching for forming the groove 12 has already been completed, the bottom of the groove 12 does not have a step difference more than the film thickness of the band-shaped S / D electrode / wiring layers 14a and 14b. Therefore, the directions of fibrils forming the formed polyacetylene film 15 are aligned along the groove 12.

Then, after a lapse of a predetermined time, the silicon substrate 11 is taken out from the Ziegler-Natta catalyst solution 18. Then, after washing the catalyst solution with toluene,
Vacuum dry at room temperature.

Then, iodine is selectively introduced into the polyacetylene film 14 to impart semiconductivity, whereby a field effect transistor is formed (FIG. 2 (d)). The polyacetylene film 15 in the region sandwiched between the two strip-shaped S / D electrodes / wiring layers 14a and 14b serves as a channel region layer, and contacts the S / D electrodes / wiring layers 14a and 14b on both sides thereof. The polyacetylene film 15 is a source / drain region layer (hereinafter referred to as S
/ D area layer. ). Also, the silicon oxide film 1
3 serves as a gate insulating film.

As described above, according to the first embodiment of the present invention, after forming the groove 12 in advance, the band-shaped S / D electrode / wiring layers 14a and 14b are formed, and then the groove is formed by the capillary phenomenon. A polyacetylene film 15 is formed in the film 12. Therefore, unlike the prior art, since the bottom of the groove 12 does not have a step more than the film thickness of the strip-shaped S / D electrodes / wiring layers 14a and 14b,
The directions of fibrils forming the formed polyacetylene film 15 are aligned along the groove 12.

After forming the groove 12 in advance, the strip-shaped S
Since the / D electrode / wiring layers 14a and 14b are formed, the groove 1
The strip-shaped S / D electrode / wiring layer 14a is also provided on the side wall and the bottom of
14b is present. Therefore, when the polyacetylene film 15 formed in the groove 12 is dried, even if the polyacetylene film 15 contracts due to surface tension as in the conventional case, contact can be obtained on both the sidewall and the bottom of the groove 12 unlike the conventional case. .

As a result, the orientation of the polyacetylene film 15 formed in the groove 12 by the capillarity is improved and the S / D electrode / wiring layer 14 which is brought into contact with the film 14 is improved.
A sufficient contact area with a and 14b can be secured. (2) Second Embodiment FIGS. 3 (a), 3 (b), and 4 (c) describe a method for producing a field effect transistor using the polyacetylene film of the second embodiment of the present invention as a semiconductor material. FIG.

First, as shown in FIG. 3A, by RIE (reactive ion etching) using CF ₄ gas,
The silicon substrate (base) 11a is anisotropically etched and removed to form a groove 12a having a width of 0.5 μm or less and a depth of about 1 μm.

Then, in a dry oxygen gas atmosphere, a temperature of 10
Under the condition of 00 ° C., a silicon oxide film (insulating film) 13a having a film thickness of about 500 Å is formed on the surface layer of the silicon substrate 11a by thermal oxidation.

Next, a polysilicon film (conductive film) 14c having a film thickness of about 500 Å is formed on the silicon oxide film 13a by the chemical vapor deposition method (CVD method). At this time,
Since the CVD method is used, the polysilicon film 14c is formed in the groove 12
It can be formed with a uniform film thickness on the side wall and bottom of a.

Next, after forming a silicon nitride film (not shown), patterning is performed, and then, the patterned silicon nitride film is selectively oxidized as a mask to form a strip S / D electrode in a direction intersecting the longitudinal direction of the groove 12a. / Wiring layers (conductive films) 14d and 14e that remain in parallel with each other, and the remaining strip-shaped S / D electrode / wiring layer
The peripheral portions of 14d and 14e are insulated by the silicon oxide film 14f. Subsequently, a gate electrode 16a made of an aluminum film having a film thickness of about 1 μm is formed on the back surface of the silicon substrate 11a (FIG. 3B).

Next, one end of the groove 12a is immersed in the Ziegler-Natta catalyst solution (catalyst solution of polymer material) 18 in the container 17 of the apparatus shown in FIG. 5 and the pressure is reduced, and acetylene gas is introduced into the container 17. Introduce and hold pressure at 100 Torr. As a result, due to the capillary phenomenon, the Ziegler-Natta catalyst solution 18 is introduced into the groove 12a along the groove 12a, and is polymerized with acetylene gas to form a polyacetylene film (polymer material film) 15a in the groove 12a. At this time, unlike the conventional case, a strip-shaped S / D electrode / wiring layer 14 is formed on the bottom of the groove 12a.
There is no step more than the difference between the film thickness of d and 14e and the film thickness of the silicon oxide film 14f. Therefore, even when compared with the first embodiment, the directions of the fibrils forming the formed polyacetylene film 15a become more uniform along the groove 12a.

Then, after a lapse of a predetermined time, the silicon substrate 11 is taken out from the Ziegler-Natta catalyst solution 18. Then, after washing the catalyst solution with toluene,
Vacuum dry at room temperature.

After that, iodine is selectively introduced into the polyacetylene film 16a to impart semiconductivity. As a result, a field effect transistor connected to the polyacetylene film 16a is formed (FIG. 4C). The polyacetylene film 16a in the region sandwiched between the two strip-shaped S / D electrodes / wiring layers 14d and 14e serves as a channel region layer, and on both sides thereof, the S
The polyacetylene film 16a in contact with the / D electrode / wiring layers 14d and 14e becomes the S / D region layer.

As described above, according to the second embodiment of the present invention, after forming the groove 12a in advance, the polysilicon film is selectively oxidized to form the band-like S / D electrodes / wiring layers 14d and 14e. After that, the polyacetylene film 15a is formed in the groove 12a by the capillary phenomenon. Therefore, unlike the conventional case, the groove 12
The bottom of a has no step more than the difference between the film thickness of the strip-shaped S / D electrodes / wiring layers 14d and 14e and the film thickness of the silicon oxide film 14f. In particular, by selectively oxidizing the polysilicon film, a strip-shaped S /
Since the D electrodes / wiring layers 14d and 14e remain, the step difference can be further reduced as compared with the first embodiment. As a result, the directions of the fibrils forming the formed polyacetylene film 15a become more uniform along the groove 12a.

After forming the groove 12a in advance, a strip-shaped S is formed.
Since the / D electrode / wiring layers 14d and 14e are formed, the groove 12
strip-shaped S / D electrode / wiring layer 14d on the side wall and bottom of a,
There is 14e. Therefore, when the polyacetylene film 15a formed in the groove 12a is dried, even if the polyacetylene film 15a shrinks due to surface tension as in the conventional case, contact can be obtained on both the side wall and the bottom of the groove 12a unlike the conventional case. .

As a result, the orientation of the polyacetylene film 15a formed in the groove 12a by the capillary phenomenon is improved, and the S / D electrode / wiring layer 14 which is brought into contact with the film 15a is improved.
A sufficient contact area with d and 14e can be secured.

In the above first and second embodiments,
Although polyacetylene is used as the polymer material, other polymer materials can be used. Further, although the polyacetylene film is used as a semiconductor material, it can be used as a wiring material.

[0045]

As described above, according to the method of manufacturing a semiconductor device of the present invention, after forming a groove in advance, a band-shaped conductive film is formed so as to intersect with the groove, and thereafter, by a capillary phenomenon. A film made of a polymer material is formed in the groove. Therefore, unlike the prior art, the bottom of the groove before forming the film made of the polymer material does not have a level difference greater than the film thickness of the film having the band-shaped conductivity. In particular, when a band-shaped conductive film remains crossing the groove by selective oxidation of the conductive film formed by covering the groove, the step difference can be further reduced. Therefore, the directions of the fibrils forming the formed polymer material film are aligned along the groove.

Further, since the band-shaped conductive film is formed after the groove is formed in advance, the band-shaped conductive film exists on the side wall and the bottom of the groove. Therefore, when the polymer material film introduced into the groove is dried, even if the polymer material film contracts due to surface tension, contact can be obtained at both the side wall and the bottom portion of the groove unlike the conventional case.

As a result, it is possible to improve the orientation of the polymer material film formed in the groove by the capillary phenomenon and to secure a sufficient contact area with the conductive film to be brought into contact with this film.

Source / drain electrodes and source /
After forming a band-shaped conductive film to be the drain wiring layer in parallel, a polymer material film is formed in the groove and connected to these band-shaped conductive films to form two band-shaped conductive films. A field effect transistor having a channel region layer formed of a polymer material film in a region sandwiched between the films having a is formed. Thereby, it is possible to improve the orientation of the polymer material film, and to manufacture a field effect transistor in which a contact area with a conductive film to be brought into contact with the film is sufficiently secured.

[Brief description of drawings]

FIG. 1 is a perspective view (No. 1) for explaining a method of manufacturing a field effect transistor according to a first embodiment of the present invention.

FIG. 2 is a perspective view (No. 2) for explaining the method for manufacturing the field effect transistor according to the first embodiment of the present invention.

FIG. 3 is a perspective view (No. 1) for explaining a method of manufacturing the field effect transistor according to the second embodiment of the present invention.

FIG. 4 is a perspective view (No. 2) for explaining a method of manufacturing the field effect transistor according to the second embodiment of the present invention.

FIG. 5 is a perspective view of an apparatus for forming a polyacetylene film used in an example of the present invention.

FIG. 6 is a perspective view (No. 1) for explaining a method of manufacturing a field effect transistor of a conventional example.

FIG. 7 is a perspective view (No. 2) for explaining the method for manufacturing the field effect transistor of the conventional example.

FIG. 8 is a perspective view illustrating a problem of a conventional example.

[Explanation of symbols]

11, 11a Silicon substrate (wafer; substrate), 12, 12a groove, 13, 13a, 14f Silicon oxide film (insulating film), 14a, 14b, 14d, 14e S / D electrode / wiring layer (conductive film) , 14c Polysilicon film (conductive film), 15,15a Polyacetylene film, 16,16a Gate electrode, 17 container, 18 Ziegler-Natta catalyst solution (catalyst solution of polymer material).

Claims (4)

[Claims] 1. A step of forming a band-shaped groove having a surface layer made of an insulating film on a substrate, a step of forming a conductive film across the groove on the insulating film, and a step of forming the conductive film. Selective etching / removal,
A step of leaving a strip-shaped conductive film that passes through the side wall and the bottom of the groove in a direction intersecting the longitudinal direction of the groove, and by immersing one end of the groove in a catalyst solution of a polymer material by a capillary phenomenon. A step of introducing a catalyst solution of a polymer material along the groove, forming a polymer material film in the groove and connecting the film to the conductive film. 2. A step of selectively etching / removing the conductive film to leave a strip-shaped conductive film passing through a side wall and a bottom of the groove in a direction intersecting the longitudinal direction of the groove. The method for manufacturing a semiconductor device according to claim 1, further comprising: 3. The selective oxidation of the conductive film,
2. A step of leaving a strip-shaped conductive film in a direction crossing the longitudinal direction of the groove and insulating the peripheral portion of the remaining strip-shaped conductive film. Of manufacturing a semiconductor device of. 4. A step of leaving at least two strip-shaped conductive films so as to be parallel to each other, wherein each of the two strip-shaped conductive films is a source / source film.
4. A field effect transistor having a drain wiring layer and a polymer material film in a region sandwiched between the two strip-shaped conductive films as a channel region layer, the field effect transistor being formed. Of manufacturing a semiconductor device of.