JPH06292123A - Video signal recording and reproducing device - Google Patents

Abstract

PURPOSE:To provide a stable variable speed reproduction picture with less error in the video signal recording and reproducing device by which picture data are recorded/reproduced on/from a recording tape medium in a helical scan system by using a rotating head. CONSTITUTION:This device is provided with a means converting an inputted digital picture signal into picture data for recording and when the obtained picture data are recorded/reproduced on/from a recording tape medium 1 in a helical scan system by using a rotating head, the data are rearranged to record the picture data used in the variable speed reproduction mode are recorded in a middle track 3 in the vicinity of the center of recording tracks 2 on the recording medium. The data used in the variable speed reproduction mode are basic components of the picture being mainly a low frequency component or a DC component or the like. Thus, the picture data are read stably in the variable speed reproduction mode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal recording / reproducing apparatus used for recording / reproducing a video signal.

[0002]

2. Description of the Related Art In recent years, there has been a remarkable introduction of digital technology to video signal recording / reproducing apparatuses, and some digital recording type video signal recording / reproducing apparatuses have been put into practical use. In a conventional digital recording type video signal recording / reproducing apparatus, for example, "Handbook of Television Image Information Engineering, Television Society of Japan" (P.528-P.529 1 inch H)
As shown in (Tape format of DTV digital VTR), an input image is encoded without being compressed, and data is distributed to image data tracks on a tape-shaped recording medium by helical scanning using a rotary head. It was a device for recording and reproducing.

An example of a conventional video signal recording / reproducing apparatus will be described below with reference to the drawings. Figure 10 (a)
FIG. 3 is a conceptual diagram of a tape pattern on a recording medium of a conventional digital video signal recording device. In FIG. 10 (a),
Reference numeral 82 is a tape recording medium, 83 is a recording track, and 84 is a reproducing head.

In this conventional example, the tape-shaped recording medium 8
A signal obtained by converting the input digital video signal into a recording signal is recorded on the recording track 83 on the second recording track 83. In the signal conversion at this time, in order to faithfully follow the original image and easily perform variable speed reproduction, the input image is encoded without being compressed, and the data is distributed to the image data tracks for recording and reproduction. Met.

During variable speed reproduction such as fast forward and rewind reproduction, the reproducing head 85 scans the recording track diagonally as shown by the dotted line as shown in FIG. If the recorded contents can be determined at the position of the recorded data on the track, a reproduced image can be easily obtained. When the input image is encoded without compression and is recorded / reproduced, the above-described operation can be easily performed, and the variable speed reproduction image can be obtained from the data reproduced by the reproduction head.

[0006]

FIG. 2 (a) shows a conceptual diagram of a helical scan system for recording / reproducing on / from a tape-shaped recording medium using a rotary head used in a digital video signal recording / reproducing apparatus. In FIG. 2A, the cylinder is composed of a rotary cylinder 4 and a fixed cylinder 5, and a head 6 attached to the rotary cylinder 4 rotates and moves in the direction of the arrow obliquely wound around the cylinder. The video signal is recorded and reproduced at 7. A conceptual diagram of the output characteristic at this time is shown in FIG.

In FIG. 2B, the horizontal axis represents the position in the width direction of the tape, and the vertical axis represents the reproduction output level. Figure 2
As shown in the reproduction output characteristic 8 of (b), the reproduction output is large and stable in the vicinity of the center of the recording track as compared with the vicinity of the end. Further, when variable speed reproduction is performed, the tape feed speed is different from the speed during normal reproduction, and the head touch at the end of the tape is also poor, so the reproduction output is the same as the reproduction output characteristic 9 in FIG. 2B. Playback output on the input side and output side of becomes unstable. Therefore, there is a problem that data necessary for variable speed reproduction cannot be stably obtained on the entry side and the exit side of the head.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to solve the above problems and to provide a video signal recording / reproducing apparatus capable of stable variable speed reproduction.

[0009]

In order to achieve the above object, a video signal recording / reproducing apparatus of the present invention arranges and reproduces image data used in variable speed reproduction in the vicinity of the center of a recording track on a recording medium. Have a configuration. The image data used at the time of variable speed reproduction is preferably the basic component that constitutes the image. As a basic component forming an image, a low frequency component of the image data, a direct current component, or data in which the quantization width in the amplitude direction of the image data is larger than the quantization width in normal reproduction can be considered.

The image data used during variable speed reproduction may be only the data used during reproduction, or the image data added only for variable speed reproduction.
It may be both data used during normal reproduction and image data added only for variable speed reproduction.

[0011]

With the above-described structure, the present invention can stably reproduce image data during variable speed reproduction such as fast forward and rewind. As a result, stable variable speed reproduction with few errors can be performed.

[0012]

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a recording pattern on a tape-shaped recording medium in a video signal recording apparatus according to an embodiment of the present invention.

In FIG. 1, 1 is a tape-shaped recording medium, 2
Is a recording track on which image data is recorded and reproduced. Further, data used for variable speed reproduction is arranged in the track center portion 3 to record and reproduce. Of course, image data can be obtained from a place other than this portion at the time of variable speed reproduction, and the reproduced image may be formed by utilizing this.

FIG. 3 is a block diagram showing a video signal recording / reproducing apparatus according to an embodiment of the present invention. In FIG. 3, 10
Is an input terminal, and the image signal input from this is input to the recording head 15 through the image signal conversion circuit 11, the encoding circuit 12, the shuffling circuit 13, and the ECC circuit 14 which are sequentially connected, and the tape-shaped recording is performed. It is recorded on the medium 16. During reproduction, the signal reproduced by the reproducing head 17 is sequentially connected to the ECC circuit 18, the deshuffling circuit 19,
Output terminal 2 through decoding circuit 20 and image restoration circuit 21
It is output from 2.

The operation of each unit will be described below. The image signal input from the input terminal 10 is input to the image signal conversion circuit 11 that obtains image data to be recorded. In this circuit, recorded image data is obtained from the input digital image. Further, here, the data used for variable speed reproduction is also obtained. The obtained recording image data is sent to the encoding circuit 12 and encoded into a recording code. The data encoded by the encoding circuit 12 is rearranged in order of data by the shuffling circuit 13.

A block diagram showing the shuffling circuit 13 is shown in FIG. In FIG. 4A, reference numeral 23 is an input terminal to which encoded image data is input. The input image data is sent to the variable speed reproduction data separation circuit 24.
To the memories 25 and 26, sent to the data rearrangement circuit 27, and output from the output terminal 28.

In the shuffling circuit 13, the input image data is sent to the variable speed reproduction data separation circuit 24, where it is separated into image data used during variable speed reproduction and other data. Next, the separated data are input and stored in the memories 25 and 26, respectively. Then, in the data rearrangement circuit 27, when considering the time in units of recording tracks, the cycle is set so that the image data used in the variable speed reproduction is arranged in the track center portion 3 near the center of the recording tracks in FIG. Data is read out from the memories 25 and 26 and the image data is rearranged. At this time, at the same time, the data is rearranged so that error correction at the time of recording / reproducing can be performed efficiently.

The data whose order has been rearranged is added with an error correction code by the ECC circuit 14 to form a recording signal, which is recorded on the tape-shaped recording medium 16 by the recording head 15 through a recording amplifier (not shown).

At the time of normal reproduction, the reproduction head 17 (which may also be used as the recording head 15) is used to read a signal from each recording track and obtain a reproduction signal through a reproduction amplifier. For this reproduced signal, first the ECC circuit 1
Error correction is performed in step 8 to correct errors during recording and reproduction as much as possible. The signal that has undergone error correction enters the deshuffling circuit 19.

A block diagram showing the deshuffling circuit 19 is shown in FIG. In FIG. 4B, reference numeral 29 is an input terminal to which the reproduced and error-corrected image data is input. The input image data is sent to the image data separation circuit 30, divided into memories 31 and 32, sent to the image data synthesis circuit 33, and output from the output terminal 34.

In the deshuffling circuit 19, the input image data is separated by the image data separation circuit 30 into image data used at the time of variable speed reproduction, which is alternately reproduced periodically, and other data. . Next, the separated data are input and stored in the memories 31 and 32, respectively. Then, in the image data synthesizing circuit 33, an operation reverse to the order in which the data is rearranged by the data rearranging circuit 27 in the shuffling circuit 13 at the time of recording is performed so that the original image data is stored in the memories 31 and 32. The data is read out as appropriate, combined, and output from the output terminal 34. After that, the image restoration circuit 2 uses the data decoded by the decoding circuit 20.
In 1, the original image is restored as a reproduced image, and the output terminal 22
Will be output.

During fast-forward reproduction and rewind reproduction, the tape feed speed changes, and the locus of the head 85 changes as indicated by the dotted line in FIG. 10B, for example. Further, at this time, it is considered that the head touch becomes worse than in the normal reproduction. In such a situation, with the above configuration, the data used for variable speed reproduction among the image data can be stably obtained because it is arranged near the center of the recording track where the reproduction output is most stable. By performing the same processing as in normal reproduction, a stable variable-speed reproduced image with few errors can be obtained.

The image data used at the time of variable speed reproduction is basically the low-frequency component or DC component of the recorded image, which is the basic component of the image, or the quantization width of the data in the amplitude direction. Image data larger than the quantization width in normal reproduction is recorded and reproduced.

(Second Embodiment) A second embodiment of the present invention will be described below with reference to the drawings. The configuration of the second embodiment is almost the same as that of the first embodiment, except for the internal configuration of the image signal conversion circuit for obtaining the recorded image data and the internal configuration of the image restoration circuit during reproduction.

In this embodiment, as an image signal converting circuit for obtaining a recorded image and a restoring circuit for restoring a reproduced image, intra-frame compression or inter-frame compression is performed on an input digital image signal to obtain an image. And means for obtaining image data to be compressed and recorded. Other configurations are the same as in the case of the first embodiment of FIG.

In the image signal conversion circuit of this embodiment,
The input image signal is compressed by performing an intra-frame compression (intra-frame compression) operation or a multi-frame compression in which an intra-frame compression once every several frames and another inter-frame compression (inter-frame compression) operation are appropriately performed.
An example of a block diagram of an image conversion circuit that performs each compression operation is shown in FIGS.

First, FIG. 5A shows an image signal conversion circuit for performing an intra-frame compression operation, in which an image is input from the input terminal 35 and is output to the output terminal 38 through the DCT circuit 36 and the quantization circuit 37. It The image signal output from the output terminal 38 is connected to the encoding circuit 12 in FIG.

The image signal input from the input terminal 35 is
A discrete cosine transform circuit (DCT circuit) 36 performs a two-dimensional discrete cosine transform on a certain block unit and decomposes it into horizontal and vertical frequency components. The image data subjected to the discrete cosine transform is quantized by the quantization circuit 37, and is sent from the output terminal 38 to the coding circuit 12. At this time, since the low-frequency component has an important meaning in the image signal, many bits are given to the low-frequency component, and image compression is performed by reducing the bit allocation of the high-frequency component.

FIG. 5B shows, as an example, a conceptual diagram of DCT coefficients when the discrete cosine transform is applied to a block unit of 8 × 8 pixels. The DC of the coefficient 39 at the upper left of the figure is a DC component, and represents the average value of the image data in the entire block. Further, the DCT coefficient represents how much data has a higher horizontal frequency component toward the right of the DC component, and more data having a higher vertical frequency component toward the bottom of the DC component. It represents the coefficient of the data containing the highest frequency component in both the horizontal and vertical directions. Of these, for example, low-frequency components including a DC component, which are surrounded by a dotted line 41, are important for image data, and these DC components and low-frequency components are used as data used during variable speed reproduction.

Next, as another example of the image signal conversion circuit, FIG. 6 shows an image signal conversion circuit for performing a multi-frame compression operation. The image input from the input terminal 42 is output to the output terminal 53 through the subtractor 43, the DCT circuit 44, and the quantization circuit 45. Further, the output signal is input to the subtractor 43 through the inverse quantization circuit 46, the IDCT circuit 47, the adder 48, the delay circuit 49, the motion compensation circuit 50, and the feedback loop including the refresh switches 51 and 52. .

The operation of each unit will be described below. The multi-frame compression is to repeatedly perform one intra-frame compression for every several frames and some inter-frame compression operations. When performing intra-frame compression, the refresh switches 51 and 52 are open. Therefore, as in the case of intra-frame compression shown in FIG. 5A, the image data is discrete cosine transformed by the DCT circuit 44 and the quantization circuit is used. Quantized at 45. The image data quantized at this time is always restored by the inverse quantization circuit 46 and the IDCT circuit 47, and the delay circuit 4
It is delayed by 1 frame by 9 and used to calculate a difference between frames as image data of 1 frame before.

After the intraframe compression operation for one frame is completed, the interframe compression operation is performed for several frames. In this case, refresh switches 51 and 5
2 closes. The restored image delayed by one frame by the delay circuit 49 has its motion compensated by the motion compensation circuit 50 and input to the subtractor 43 for use in inter-frame compression. In the inter-frame compression operation, the subtractor 43
In the same manner as the intra-frame compression, the DCT circuit 44 and the quantization circuit 45 are used to perform the compression on the difference value with respect to the one-frame-preceding signal that has been previously decompressed and motion-compensated. To do. By repeating these operations, the input image signal is multi-frame compressed, and the obtained image data is input to the encoding circuit 12 of FIG.

When multi-frame compression is performed, the difference between the inter-frame-compressed data and another frame is compressed and recorded / reproduced. Therefore, in order to restore the original image during reproduction, the difference is taken. Frame data is required. Therefore, in the case where all the recorded image data cannot be reproduced as in variable speed reproduction, the original image cannot be restored in many cases. Therefore, in the case of performing multi-frame compression, the data to be used at the time of variable speed reproduction is the intra-frame-compressed image data, or the DCT circuit 44 as in the case described in FIG. 5B.
The low frequency component or the direct current component of the image data that has been intra-frame compressed by.

The data obtained by the image signal conversion circuit as in the above two examples is encoded by the encoding circuit 12. The data encoded by the encoding circuit 12 is rearranged in order of data by the shuffling circuit 13. The shuffling circuit 13 shown in FIG.
Just as in (a), the data is rearranged so that the image data used for variable speed reproduction is arranged in the track center portion 3 near the center of the recording track in FIG. Also,
The shuffling circuit 13 rearranges the data so that error correction can be efficiently performed during recording and reproduction. Then, the data is recorded on the tape-shaped recording medium 16 through the ECC circuit 14 using the head 15 as in the first embodiment.

At the time of normal reproduction, the reproduction head 17 is used to read signals from the respective recording tracks and obtain reproduction signals. The image data, which has been subjected to error correction based on the reproduced image data, enters the deshuffling circuit 19, and based on the order rearranged by the shuffling circuit 13 at the time of recording, as in FIG. 4B of the first embodiment. The data is returned and decoded in the decoding circuit 20.

The decoded data is the image signal restoration circuit 21.
Restored in. In this embodiment, the decompression circuit when the intra-frame compression is performed is shown in FIG. 7A, and the decompression circuit when the multi-frame compression is performed is shown in FIG. 7B. Figure 7
In the decompression circuit in the case of performing the intra-frame compression of (a), 54 is an input terminal, and the reproduced image data input here passes through the inverse quantization circuit 55 and the IDCT circuit 56,
It is output from the output terminal 57.

When the intra-frame compression is performed, the decoded image data is input to the inverse quantization circuit 55 from the input terminal 54 of the image signal decompression circuit 21, and the quantization circuit 3 for recording is used.
The number of bits assigned to the DCT coefficient in 7 is returned to the original number of bits, and the IDCT (inverse discrete cosine transform) circuit 56
In, the reverse conversion to that at the time of recording is made and restored.

In the decompression circuit in the case of performing the multi-frame compression shown in FIG. 7B, 58 is an input terminal, and the reproduced image data input here is the inverse quantization circuit 59 and the IDC.
It is output to the output terminal 65 through the T circuit 60 and the adder 64. Further, the output signal is input to the adder 64 via a feedback loop including a delay circuit 61, a motion compensation circuit 62, and a switch 63.

In the case of multi-frame compression, when a compressed signal subjected to intra-frame compression is input, the switch 63 is opened and the signal after the inverse discrete cosine transform is output as it is to the output terminal 65. In the case of an inter-frame compressed signal, the switch 63 is closed, the decompression signal is delayed by one frame by the delay circuit 61, and the image data motion-compensated by the motion compensation circuit 62 is added by the adder 64 to the inter-frame decompression signal. Get the output signal.

The original image is restored as a reproduced image by performing the above-described processing, and is output from the output terminal 22.

During variable speed reproduction, the image data written near the center of the recording track can be reproduced stably,
By performing exactly the same processing as in normal reproduction based on this, it is possible to obtain a stable, variable-speed reproduced image with few errors.

In the present embodiment, the DC component and the low frequency component of the image data which is recorded in the center of the recording track and used at the time of variable speed reproduction is considered as the image data compressed as described above. In addition to this, in-frame compressed data, or mainly low-frequency components or DC components of recorded images, or image data whose quantization width in the amplitude direction of data is larger than the quantization width during normal reproduction At least one may be recorded and reproduced.

When multi-frame compression is performed as the compression means, the image data of the inter-frame-compressed frame records and reproduces the difference from the data of other frames, so that the image data is scattered like variable speed reproduction. A reproduced image cannot be formed in a situation where the image can only be taken. Therefore, when performing multi-frame compression, select the data to be used during variable speed reproduction as described above from the intra-frame-compressed image data, and select one intra-frame compressed data and It is efficient to rearrange the data in the shuffling circuit 13 together with the interframe-compressed data and record / reproduce in the center of the recording track for the period of recording the interframe-compressed data.

In this embodiment, the discrete cosine transform is used to transform the image data, but the Hadamard transform,
You may perform using other conversion methods, such as a wavelet conversion.

(Third Embodiment) A third embodiment of the present invention will be described below with reference to the drawings. The configuration of the third embodiment is almost the same as that of the first or second embodiment, except that dedicated data is created as data to be used at the time of variable speed reproduction, and the data is recorded / reproduced near the center of the recording track.

The structure of this embodiment is the same as that of FIG. 3 of the first embodiment, and as an image signal conversion circuit for obtaining a recorded image,
In addition to obtaining image data to be recorded with respect to the input digital image signal, a means is provided for producing image data used exclusively for variable speed reproduction.

A block diagram showing the configuration of the recording side of this embodiment is shown in FIG. In FIG. 8, reference numeral 66 is an input terminal, and the input image signal is sent to an image signal conversion circuit 67 and a variable speed reproduction dedicated data creation circuit 71. The signals output from the respective circuits pass through the encoding circuits 68 and 72, respectively, and are input to the memories 70 and 73 of the shuffling circuit 69. afterwards,
The data is sent to the data rearrangement circuit 74, then passes through the ECC circuit 75, passes through the recording amplifier, and is sent to the recording head 76.

Next, the operation of each section will be described. The image signal conversion circuit 67 converts the input image data into recording image data, and then the encoding circuit 68 converts the recording image data into recording code data, and the image data is stored in the memory 70.
Stored in. Separately from this, the variable-speed reproduction-dedicated data creation circuit 71 creates variable-speed reproduction-dedicated data only for use during variable-speed reproduction, which is encoded by the encoding circuit 72 and then stored in the memory 73. The data rearrangement circuit 74 periodically extracts these two data,
The data used at the time of variable speed reproduction is rearranged so as to be located near the center of the recording track at the time of recording and for easy error correction, and is sent to the ECC circuit 75. ECC
In the circuit 75, an error correction code is added to form a recording signal, which is recorded by the recording head 76 through a recording amplifier.

The reproducing operation and the variable speed reproducing operation are exactly the same as those in the first or second embodiment. Therefore, similar to the reproducing unit in FIG. 3, the deshuffling circuit 19 returns the order and the image restoring circuit 21 performs an operation reverse to that of the image signal converting circuit at the time of recording to restore the image to obtain a reproduced image.

In this way, by reproducing the variable speed reproduction exclusive data recorded in the center of the track during the variable speed reproduction, a stable and error-free variable speed reproduction image is obtained.

The image data conversion circuit may or may not perform compression as in the second embodiment. Further, the image data used at the time of variable speed reproduction may be only the data prepared for the variable speed reproduction, or the data prepared for the variable speed reproduction may be added to the basic components of the images used in the first and second embodiments. And it may be both.

(Fourth Embodiment) A fourth embodiment of the present invention will be described below with reference to the drawings. The configuration of the present embodiment is the same as that of any one of the first to third embodiments, except that the image data used during variable speed reproduction when recording on a tape recording medium is periodically selected. This is the point of recording and reproducing near the center of the recording track.

FIG. 9 shows a conceptual diagram of a recording pattern placed on a tape-shaped recording medium in the video signal recording / reproducing apparatus of this embodiment. In FIG. 9, reference numeral 77 is a tape-shaped recording medium, 78 is a recording track, and 81 is a reproducing head. Further, image data used at the time of variable speed reproduction is arranged in the track central portion 79 of the track selected periodically, and recording / reproduction is performed. A head locus during variable speed reproduction is as shown by a dotted line 80.

In this embodiment, of the recorded image data, the data used at the time of variable speed reproduction is the track center portion 7.
Recording / reproduction is performed in the vicinity of the center of the recording track that is periodically selected as shown in FIG. At the time of recording, as shown in the first to third embodiments, the shuffling circuit 13 rearranges the image data and records so as to obtain the above configuration.

Since the tape feed speed changes during variable speed reproduction, the reproducing head 81 scans diagonally as indicated by the dotted line 80. Therefore, in this embodiment, by controlling the head position by applying a servo so that the reproducing head 81 passes through the track central portion 79 in which the data used in the variable speed reproduction is recorded, the necessary image data is stably and efficiently produced. Obtained. As a result, an image can be stably obtained during variable speed reproduction.

By varying the pattern on the recording track of the track central portion 79 for recording the image data used for variable speed reproduction, variable speed reproduction at various tape feeding speeds can be supported. .

[0057]

As described above, according to the present invention, the image data used during variable speed reproduction is arranged near the center of the recording track where the reproduction output is stable, and recording / reproduction is performed, so that it is stable during variable speed reproduction. Output can be obtained, and variable-speed reproduction with few errors can be stably performed by forming a reproduced image from these outputs.

[Brief description of drawings]

FIG. 1 is a conceptual diagram of a tape pattern by a video signal recording / reproducing apparatus according to an embodiment of the present invention.

2A is a conceptual diagram of a helical scan recording system used in a video signal recording / reproducing apparatus, and FIG. 2B is a conceptual diagram showing reproduction output characteristics in a tape width direction.

FIG. 3 is a block diagram showing a video signal recording / reproducing apparatus according to a first embodiment.

4A is a block diagram showing a shuffling circuit, and FIG. 4B is a block diagram showing a deshuffling circuit.

5A is a block diagram showing a video signal conversion circuit according to a second embodiment, and FIG. 5B is a D diagram generated by the discrete cosine transform according to the second embodiment.
Conceptual diagram of CT coefficient

FIG. 6 is a block diagram showing a video signal conversion circuit according to a second embodiment.

7A is a block diagram of a video signal decompression circuit that performs intra-frame compression according to the second embodiment. FIG. 7B is a block diagram of a video signal decompression circuit that performs multi-frame compression according to the second embodiment.

FIG. 8 is a block diagram showing the configuration of the recording side of Example 3.

FIG. 9 is a conceptual diagram of a tape pattern by the video signal recording / reproducing apparatus of Example 4.

10A is a conceptual diagram of a tape pattern by a conventional video signal recording / reproducing apparatus, and FIG. 10B is a conceptual diagram showing a head locus during variable speed reproduction.

[Explanation of symbols]

 2 Video signal recording tracks 1, 7, 16, 77 Tape recording medium 4 Rotating cylinder 5 Fixed cylinder 6 Head 8 Reproduction output characteristic during normal reproduction 9 Reproduction output characteristic during variable speed reproduction 11,67 Image signal conversion circuit 12, 68, 72 encoding circuit 13,69 shuffling circuit 14,18,75 ECC circuit 15,76 recording head 17,81 reproducing head 19 deshuffling circuit 20 decoding circuit 21 image signal restoring circuit 24 variable speed reproduction data separating circuit 25, 26, 31, 32, 70, 73 Memory 27, 74 Data rearrangement circuit 30 Image data separation circuit 33 Image data synthesis circuit 36, 44 DCT (discrete cosine transform) circuit 37, 45 Quantization circuit 43 Subtractor 46, 55, 59 Reverse Quantization circuit 47, 56, 60 IDCT circuit 48, 64 Adder 49, First delay circuit 50, 62 the motion compensation circuits 51 and 52 refresh switch 71 the variable speed reproduction-only data creating circuit

Claims (8)

[Claims] 1. A means for converting an input digital image signal into image data for recording, and the obtained image data is recorded and reproduced on a tape-shaped recording medium by helical scanning using a rotary head. At this time, the basic component of the image data used at the time of variable speed reproduction is recorded near the center of the recording track on the recording medium, and the data near the center of the recording track is reproduced to obtain a variable speed reproduction image. Video signal recording / reproducing device. 2. A means for performing intra-frame compression or inter-frame compression on an input digital image signal to obtain image data for image compression and recording, or means for restoring reproduced image data. The video signal recording / reproducing apparatus according to claim 1, wherein 3. The video signal recording / reproducing according to claim 1, wherein the image data used in the variable speed reproduction is recorded / reproduced in the vicinity of the center of a recording track which is periodically selected on the recording medium. apparatus. 4. The video signal recording according to claim 1, wherein the image data recorded near the center of the track and used at the time of variable speed reproduction is image data compressed in a frame. Playback device. 5. The image data recorded near the center of the track and used at the time of variable speed reproduction is mainly a low frequency component or a direct current component of the recorded image, according to any one of claims 1 to 4. Video signal recording and reproducing device. 6. The image data recorded near the center of a track and used at the time of variable speed reproduction is image data whose quantization width in the amplitude direction of the data is larger than that at the normal reproduction. The video signal recording / reproducing apparatus according to claim 1. 7. The image data recorded near the center of the track and used for variable speed reproduction is image data added only for variable speed reproduction. Video signal recording / reproducing device. 8. The image data recorded near the center of a track and used for variable speed reproduction are data used also for normal reproduction and image data added only for variable speed reproduction. 7. The video signal recording / reproducing device according to any one of 1 to 6.