JPH06291448A - Circuit pattern forming method by direct joining copper - Google Patents

Circuit pattern forming method by direct joining copper

Info

Publication number
JPH06291448A
JPH06291448A JP1207591A JP1207591A JPH06291448A JP H06291448 A JPH06291448 A JP H06291448A JP 1207591 A JP1207591 A JP 1207591A JP 1207591 A JP1207591 A JP 1207591A JP H06291448 A JPH06291448 A JP H06291448A
Authority
JP
Japan
Prior art keywords
circuit pattern
copper
ceramic substrate
parts
copper plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1207591A
Other languages
Japanese (ja)
Inventor
Takao Okada
孝夫 岡田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1207591A priority Critical patent/JPH06291448A/en
Publication of JPH06291448A publication Critical patent/JPH06291448A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To efficiently manufacture the title copper-joined circuit pattern with high precision on a ceramic substrate. CONSTITUTION:A copper plate comprising the electrically isolated parts 14 in strip shape in the circuit pattern completion time and the other parts 11, 12 in the circuit pattern shape joined to a ceramic substrate 2 are heated at the temperature near the copper melting point in the atmosphere containing oxygen. Thus, the stip shape parts 14 of the copper plate are melted away while the other parts 11, 12 are fusion-welded to the ceramic substrate 2. Through these procedures, the efficiency in the circuit pattern manufacturing step can be improved simultaneously exercising the effect of enhancing the dimensional precision and insulating characteristics of the completed circuit pattern.

Description

【発明の詳細な説明】Detailed Description of the Invention

[発明の目的] [Object of the Invention]

【0001】[0001]

【産業上の利用分野】本発明は、直流や高周波の電気回
路を形成するアルミナやフェライト等のセラミック基板
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic substrate such as alumina or ferrite forming an electric circuit of direct current or high frequency.

【0002】[0002]

【従来の技術】プラスチックやセラミック製の基板を使
用した、いわゆる平面回路は小形化に有利なため多く使
用されている。特にセラミック基板は高耐圧,低損失,
高耐熱の点で直流から高周波領域まで広く用いられてい
る。セラミック基板面に回路パターンを形成する方法は
種々あるが、代表的なものは金属蒸着法や金属ペースト
焼結法であり、いずれもマスクを使用して所望の形状の
回路パターンを形成する。これらの方法による回路パタ
ーンは第5図に示すように各回路パターン11,12等
を互いに電気的に独立させることができた。ここで2は
セラミック基板を示す。
2. Description of the Related Art A so-called plane circuit using a plastic or ceramic substrate is often used because it is advantageous for miniaturization. Especially ceramic substrates have high breakdown voltage, low loss,
Widely used from direct current to high frequency range in terms of high heat resistance. Although there are various methods of forming a circuit pattern on the surface of a ceramic substrate, a typical method is a metal vapor deposition method or a metal paste sintering method, and any of them forms a circuit pattern having a desired shape using a mask. The circuit patterns obtained by these methods can electrically separate the circuit patterns 11, 12 and the like from each other as shown in FIG. Here, 2 indicates a ceramic substrate.

【0003】近年、上記二つの方法の他に、量産的でか
つセラミックとの接合強度の大きい新しい回路パターン
形成法が行われるようになってきた。これは、銅と酸素
の共晶作用を利用し、温度(1065〜1085℃)と
酸素量(約0.4重量%)を制御することによって銅の
表面のみを溶融させてセラミックとの直接接合(以下、
「DBC」と呼ぶ)を実現する技術である。
In recent years, in addition to the above two methods, a new circuit pattern forming method which is mass-produced and has a large bonding strength with ceramics has come into use. This utilizes the eutectic effect of copper and oxygen and controls the temperature (1065 to 1085 ° C) and the amount of oxygen (about 0.4% by weight) to melt only the surface of copper and directly bond it to the ceramic. (Less than,
This is a technology for realizing "DBC").

【0004】DBCによって第5図のような銅板から成
る回路パターンを形成するためには、予め回路パターン
11及び12相互の位置関係を設定しておき、高温に加
熱する必要がある。この位置設定のためには、ジグ等が
使用されたが、高温に加熱されるため変形や癒着を生
じ、満足できる寸法の回路パターンが得られなかった。
In order to form a circuit pattern made of a copper plate as shown in FIG. 5 by the DBC, it is necessary to set the positional relationship between the circuit patterns 11 and 12 in advance and heat them to a high temperature. A jig or the like was used for this position setting, but since it was heated to a high temperature, deformation or adhesion occurred, and a circuit pattern having a satisfactory size could not be obtained.

【0005】これを改善するために、第6図に示すよう
に回路パターン11と12が細いブリッジ13によって
予め一体とされているパターンをDBCによってセラミ
ックに接合していた。次にこの接合されたブリッジ13
をナイフやレーザーで切断除去していた。
In order to improve this, as shown in FIG. 6, the pattern in which the circuit patterns 11 and 12 are previously integrated by the thin bridge 13 is bonded to the ceramic by the DBC. Then this joined bridge 13
Had been cut and removed with a knife or laser.

【0006】[0006]

【発明が解決しようとする課題】この方法では、不用な
ブリッジ13を切断除去するという作業が必要である。
もし、完全に切断除去されないで銅の付着物が残留して
いる状態で、高電圧を回路パターン11と12の間に印
加した場合、絶縁破壊を生じる欠点を有する。
This method requires the work of cutting and removing the unnecessary bridge 13.
If a high voltage is applied between the circuit patterns 11 and 12 in a state where copper deposits remain without being completely cut and removed, there is a drawback that dielectric breakdown occurs.

【0007】本発明は、上記欠点を解消し、DBC技術
によって形成される回路パターンの中で、互いに分離し
た回路パターンを、それらの位置がずれることなく、か
つブリッジ等の切断作業なしに形成することを目的とす
る。 [発明の構成]
The present invention solves the above drawbacks and forms circuit patterns separated from each other among the circuit patterns formed by the DBC technique without shifting their positions and without cutting work such as a bridge. The purpose is to [Constitution of Invention]

【0008】[0008]

【課題を解決するための手段】本発明は、上記事情を考
慮してなされたもので、完成時に電気的に分離すべき部
分を細い形状とし、それ以外の部分は回路パターンの形
状とした銅板の一面と、セラミック基板の一面とを接触
させた状態で酸素を含む雰囲気中で加熱し、前記銅板の
前記細い形状部分を溶融消滅させ、この細い形状部分以
外の銅板表面を溶融して前記セラミック基板と接合させ
ることを特徴とする回路パターン形成法である。
SUMMARY OF THE INVENTION The present invention has been made in consideration of the above circumstances, and a copper plate in which a portion to be electrically separated upon completion has a thin shape and the other portions have a circuit pattern shape. One surface and one surface of the ceramic substrate are heated in an atmosphere containing oxygen to melt and extinguish the thin shaped portion of the copper plate, and the copper plate surface other than the thin shaped portion is melted to melt the ceramic. It is a circuit pattern forming method characterized in that it is bonded to a substrate.

【0009】[0009]

【作用】銅板の細い形状の部分を溶融消滅させ、回路パ
ターンの形状部分の銅板表面を溶融してセラミック基板
と融着させて回路パターンを形成する。
The thin pattern portion of the copper plate is melted and extinguished, and the copper plate surface of the circuit pattern shaped portion is melted and fused with the ceramic substrate to form a circuit pattern.

【0010】[0010]

【実施例】以下、本発明の一実施例を図面を参照して説
明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0011】第1図は、第6図におけるブリッジ13の
幅を、回路パターン11と12の位置関係を損わない程
度の強度を有する幅まで狭くしたブリッジ(以下ヒュー
ズパターンと呼ぶことにする)14を備えた銅板製の回
路パターンである。これをセラミック基板2上に密着さ
せてDBC条件に合った炉に入れると、ヒューズパター
ン14は幅が狭いため、他の幅の広い回路パターン1
1,12より熱容量がわずかな差だけ小さく、ここだけ
溶断してしまう。炉を通過した後の回路パターンを示し
たのが第2図である。ヒューズパターン14は溶断して
それぞれ回路パターン11及び12の方へ表面張力によ
って引き寄せられる。溶断個所のセラミック板上にはヒ
ューズパターンの銅の付着物は残存せずに、完全に絶縁
状態が作り出される。
FIG. 1 shows a bridge in which the width of the bridge 13 in FIG. 6 is narrowed to a width having a strength that does not impair the positional relationship between the circuit patterns 11 and 12 (hereinafter referred to as a fuse pattern). It is a circuit pattern made of a copper plate provided with 14. When this is put in close contact with the ceramic substrate 2 and put in a furnace that meets the DBC conditions, the fuse pattern 14 has a narrow width, so that another wide circuit pattern 1
The heat capacities are smaller than those of Nos. 1 and 12 by a slight difference, and only this part is fused. FIG. 2 shows the circuit pattern after passing through the furnace. The fuse pattern 14 is melted and drawn toward the circuit patterns 11 and 12 by surface tension. No copper deposit of the fuse pattern remains on the ceramic plate at the blowout point, and a completely insulated state is created.

【0012】回路パターン11及び12の方へ引き寄せ
られたヒューズパターン14の溶融銅は、回路パターン
11及び12の表面のみ溶融している銅と混合し、その
表面張力によってその根元は丸味を帯びた形状となり、
絶縁にとっては都合のよい形状となる。以上の現象は、
次のように説明される。第3図は、銅と酸素系の状態図
を示したもので、縦軸は温度、横軸は酸素濃度(重量
%)を示している。領域Aは液相、Bは固相、C,Dは
液相と固相の混在相である。
The molten copper of the fuse pattern 14 attracted toward the circuit patterns 11 and 12 mixes with the molten copper only on the surface of the circuit patterns 11 and 12, and its root is rounded due to its surface tension. Shape,
The shape is convenient for insulation. The above phenomenon is
It is explained as follows. FIG. 3 shows a state diagram of copper and oxygen, in which the vertical axis represents temperature and the horizontal axis represents oxygen concentration (wt%). Region A is a liquid phase, B is a solid phase, and C and D are mixed phases of liquid phase and solid phase.

【0013】銅の融点は1083℃,銅と酸化第二銅の
共晶温度は1065℃であり、DBCは領域Cの温度と
酸素濃度条件の下で可能である。炉中における銅板の温
度分布を細かく見ると、厚さが一定ならば熱容量の差に
よって幅の広い部分の温度は低く、幅の狭い部分の温度
はより高くなる。そこで、幅の狭い回路パターン部は液
相となり溶融してしまう。しかし、幅の広い回路パター
ン部は溶融した表面の銅とセラミックの直接結合が行わ
れ、その位置がずれることはない。
The melting point of copper is 1083 ° C., the eutectic temperature of copper and cupric oxide is 1065 ° C., and DBC is possible under the temperature of region C and oxygen concentration conditions. Looking closely at the temperature distribution of the copper plate in the furnace, if the thickness is constant, the temperature of the wide part is low and the temperature of the narrow part is higher due to the difference in heat capacity. Therefore, the narrow circuit pattern portion becomes a liquid phase and melts. However, in the wide circuit pattern portion, the copper and the ceramic on the melted surface are directly bonded to each other, and the position is not displaced.

【0014】この実施例の応用として、例えばマイクロ
波集積回路に用いられるアルミナ基板やフェライト基板
における特性調整用トリミング回路がある。第4図はそ
の回路パターンを示したもので、使用するトランジスタ
などの特性のバラツキを補正するために主回路パターン
15とトリミング回路パターン16を、必要に応じて導
体片等で接続する。
An application of this embodiment is, for example, a trimming circuit for characteristic adjustment on an alumina substrate or a ferrite substrate used in a microwave integrated circuit. FIG. 4 shows the circuit pattern, and the main circuit pattern 15 and the trimming circuit pattern 16 are connected by a conductor piece or the like as necessary in order to correct the variations in the characteristics of the transistors used.

【0015】[0015]

【発明の効果】本発明によればジグを用いることなく、
必要な回路パターンの位置ずれがなく、また接合した不
要部パターンを切除することなしに、互いに分離した回
路パターンを有するDBCセラミック基板を得ることが
できる。これにより、回路パターン形成工程の歩留や位
置精度を向上し、さらに切除工程をなくすことができる
ため、より安価なDBCセラミック基板を提供すること
ができる。また、従来の切除法より絶縁性を高めること
ができる。
According to the present invention, without using a jig,
It is possible to obtain a DBC ceramic substrate having circuit patterns separated from each other without removing the necessary displacement of the circuit pattern and without cutting off the bonded unnecessary portion pattern. As a result, the yield and position accuracy of the circuit pattern forming process can be improved, and the cutting process can be eliminated, so that a cheaper DBC ceramic substrate can be provided. In addition, the insulating property can be improved as compared with the conventional cutting method.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例を説明する斜視図である。FIG. 1 is a perspective view illustrating an embodiment of the present invention.

【図2】本発明の実施例を説明する斜視図である。FIG. 2 is a perspective view illustrating an embodiment of the present invention.

【図3】銅−酸素系の状態図である。FIG. 3 is a phase diagram of a copper-oxygen system.

【図4】本発明の一応用例を示す斜視図である。FIG. 4 is a perspective view showing an application example of the present invention.

【図5】従来例を示す斜視図である。FIG. 5 is a perspective view showing a conventional example.

【図6】従来例の途中工程を示す斜視図である。FIG. 6 is a perspective view showing an intermediate step of a conventional example.

【符号の説明】[Explanation of symbols]

2…………………セラミック基板 11,12………回路パターン 13………………ブリッジ 14………………ヒューズパターン 15………………主回路パターン 16………………トリミング回路パターン 2 …………………… Ceramic board 11,12 ………… Circuit pattern 13 ……………… Bridge 14 ……………… Fuse pattern 15 ……………… Main circuit pattern 16 ………… ...... Trimming circuit pattern

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 完成時に電気的に分離すべき部分を細い
形状とし、それ以外の部分は回路パターンの形状とした
銅板の一面と、セラミック基板の一面とを接触させた状
態で酸素を含む雰囲気中で加熱し、前記銅板の前記細い
形状部分を溶融消滅させ、この細い形状部分以外の銅板
表面を溶融して前記セラミック基板と接合させることを
特徴とする回路パターン形成法。
1. An atmosphere containing oxygen in a state where a portion to be electrically separated at the time of completion has a thin shape and the other portions have a circuit pattern shape and one surface of the copper plate and one surface of the ceramic substrate are in contact with each other. A method for forming a circuit pattern, characterized in that the thin plate-shaped portion of the copper plate is melted and extinguished by heating inside, and the surface of the copper plate other than the thin-shaped portion is melted and joined to the ceramic substrate.
JP1207591A 1991-02-01 1991-02-01 Circuit pattern forming method by direct joining copper Pending JPH06291448A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1207591A JPH06291448A (en) 1991-02-01 1991-02-01 Circuit pattern forming method by direct joining copper

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1207591A JPH06291448A (en) 1991-02-01 1991-02-01 Circuit pattern forming method by direct joining copper

Publications (1)

Publication Number Publication Date
JPH06291448A true JPH06291448A (en) 1994-10-18

Family

ID=11795470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1207591A Pending JPH06291448A (en) 1991-02-01 1991-02-01 Circuit pattern forming method by direct joining copper

Country Status (1)

Country Link
JP (1) JPH06291448A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006511937A (en) * 2002-12-23 2006-04-06 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Electronic device and its use
JP2018148164A (en) * 2017-03-09 2018-09-20 株式会社東芝 Power semiconductor module

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006511937A (en) * 2002-12-23 2006-04-06 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Electronic device and its use
JP4653493B2 (en) * 2002-12-23 2011-03-16 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Electronic device and its use
JP2018148164A (en) * 2017-03-09 2018-09-20 株式会社東芝 Power semiconductor module

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