JPH0628753U - Jitter measuring device - Google Patents

Abstract

(57) [Abstract] [Purpose] For measuring signals including jitter, PLL
To realize easy measurement with a simplified structure without being affected by the nonlinearity and loop characteristics of the phase comparator of the structure. [Structure] The jitter measuring device 15 is a device for inputting a reference signal 21 and a signal under measurement 23 to measure the amount of jitter of the signal under measurement 23, and includes a frequency divider 11 and an oscilloscope 12.
It is composed by. The frequency divider 11 has a signal under measurement 23.
Is a frequency divider that divides this signal into 1 / N (N is a natural number) according to the measurement range. Oscilloscope 12
Is a measuring instrument for measuring the amount of jitter contained in the frequency-divided signal 24 by inputting the frequency-divided signal 24 and the reference signal 21 and using the reference signal 21 as a trigger input. In this embodiment, the measured signal 23 is divided by the frequency divider 11 by 1 / N, so that the oscilloscope 12 can measure a jitter amount smaller than N / 2 cycles.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a jitter measuring device that measures the amount of jitter of a signal under measurement that includes jitter.

[0002]

[Prior art]

 Conventionally, when measuring the amount of jitter of a signal generated by a jitter generating circuit, a jitter measuring circuit using a PLL method has been used. FIG. 2 is a functional block diagram showing the configuration of the jitter measurement system according to the conventional technique.

The jitter generation circuit 5 is a signal generation circuit that inputs a reference signal 21 and a jitter signal 22 and generates a signal under measurement 23 including jitter, and includes a phase comparator 1, an adder 2, a loop filter 3 and a voltage. It is composed of a controlled oscillator 4. The jitter measuring circuit 11 is a measuring circuit for measuring the amount of jitter of the signal under measurement 23 by the PLL method, and is composed of the frequency dividers 6 and 10, the phase comparator 7, the loop filter 8 and the voltage controlled oscillator 9. There is.

The jitter generating circuit 5 receives the reference signal 21 and the jitter signal 22 and generates a signal under measurement 23 having a jitter amount proportional to the level of the jitter signal 22. The signal under measurement 23 generated by the jitter generating circuit 5 is sent to the jitter measuring circuit 11, is frequency-divided by the frequency divider 6 according to the measurement range, and is sent to the phase comparator 7.

The phase comparator 7 also receives the reference signal 25, compares these two signals, and measures the amount of jitter from the phase difference. Then, the measured jitter amount is output from the jitter measuring circuit 11 as an output signal 26. The reference signal 25 is generated by the loop filter 8 that inputs the output signal 26, the voltage controlled oscillator 9 that inputs the signal from the loop filter 8, and the frequency divider 10 that inputs the output from the voltage controlled oscillator 9. To be done.

[0006]

[Problems to be solved by the device]

 In the prior art as shown in FIG. 2, since the PLL method is used for the jitter measuring circuit 11, in addition to the phase comparator 7, the loop filter 3 and the voltage controlled oscillator 4 in the jitter generating circuit 5, the jitter measuring circuit 11 has Since the second phase comparator 7, the second loop filter 8 and the second voltage controlled oscillator 9 are required, there is a drawback that the circuit configuration becomes complicated as the number of components increases. Furthermore, the conventional technique has a problem that it is affected by the nonlinearity of the phase comparator 7 and the loop characteristics of the PLL.

The present invention solves the drawbacks of the prior art, simplifies the circuit configuration, and is not affected by the nonlinearity of the phase comparator or the loop characteristics of the PLL. The purpose is to provide.

[0008]

[Means for Solving the Problems]

 In order to achieve this object, according to the present invention, a reference signal 21 and a jitter signal 22 are input and a jitter signal included in the measured signal 23 of a jitter generation circuit 5 that generates a measured signal 23 including jitter is generated. A jitter measuring apparatus for measuring a quantity inputs a signal under measurement 23, divides the signal under measurement 23 to an arbitrary frequency division ratio, and divides the signal under measurement 23 by the frequency dividing means 11. The reference signal 21 is input together with the signal 24, and the reference signal 21 is used as a trigger input to measure the jitter amount of the signal under measurement 23. Then, the division ratio divided by the dividing means 11 is selected according to the amount of jitter of the signal under measurement 23.

[0009]

[Action]

 According to this invention, the signal to be measured 23 containing the jitter output from the jitter generating circuit 5 is sent to the frequency dividing means 11 and is divided by the frequency dividing means 11 at a frequency dividing ratio according to the amount of jitter. The measuring means 12 inputs the divided signal 24 of the measured signal 23 divided by the dividing means 11 and the reference signal 21, and observes the amount of jitter contained in the measured signal 23.

[0010]

【Example】

 Next, an embodiment of the jitter measuring apparatus according to the present invention will be described in detail with reference to FIG. FIG. 1 is a functional block diagram showing the configuration of the jitter measuring system in this embodiment. In FIG. 1, the jitter generating circuit 5 is a circuit having the same structural elements and the same function as the jitter generating circuit 5 shown in FIG. That is, the jitter generating circuit 5 inputs the reference signal 21 and the jitter signal 22, and generates and outputs the signal under measurement 23 having a jitter amount proportional to the level of the jitter signal 22.

The jitter measuring device 15 is a device for measuring the jitter amount of the signal under measurement 23 by inputting the reference signal 21 and the signal under measurement 23, and is composed of the frequency divider 11 and the oscilloscope 12. There is. The frequency divider 11 is a frequency divider that inputs the signal under measurement 23 and divides this signal into 1 / N (N is a natural number) according to the measurement range. The measured signal 23 divided by the frequency divider 11 is sent to the oscilloscope 12 as a divided signal 24.

The oscilloscope 12 is a measuring instrument for measuring the amount of jitter contained in the divided signal 24 by inputting the divided signal 24 and the reference signal 21 and using the reference signal 21 as a trigger input. In the present embodiment, the measured signal 23 is divided by 1 / N by the frequency divider 11, so that the amount of jitter smaller than N / 2 cycles can be measured using the oscilloscope 12.

Next, the operation of the embodiment shown in FIG. 1 will be described with reference to FIGS. 3 and 4. FIG. 3 shows a case where the frequency division ratio of the frequency divider 11 in FIG. 1 is 1/1. FIG. 3 (a) is a waveform diagram of the reference signal 21 and FIG. 3 (b) is a waveform of the signal under measurement 23. FIG. 3C is a waveform diagram of the divided signal 24.

The jitter generation circuit 5 of FIG. 1 receiving the reference signal 21 of FIG. 3A and the jitter signal 22 of an arbitrary waveform has a jitter amount proportional to the level of the jitter signal 22 of FIG. 3B. To generate the signal under measurement 23.

The signal under measurement 23 is divided by the frequency divider 11 shown in FIG. At this time, since the frequency division ratio is 1/1, the frequency division signal 24 in FIG. 3C becomes the same signal as the signal under measurement 23 and is observed by the oscilloscope 12 using the reference signal 21 as a trigger input.

Next, a case where the level of the jitter signal 22 is further increased will be described with reference to FIG. 4A and 4B show waveform diagrams at this time. FIG. 4A is a waveform diagram of the reference signal 21, FIG. 4B is a waveform diagram of the signal under measurement 23, and FIG. 4C is a divided signal. 24 waveform diagrams are shown respectively.

When the level of the jitter signal 22 is increased, the jitter generating circuit 5 generates the signal under measurement 23 as shown in FIG. 4B. Thus, when the level of the jitter signal 22 is high, the measured signal 23 is divided by the frequency divider 11 having a division ratio of 1/1 and observed by the oscilloscope 12, as shown in FIG. As shown in, it is difficult to measure the amount of jitter because the rising and falling edges of jitter overlap. Therefore, the frequency division ratio of the frequency divider 11 is halved to obtain the frequency division signal 24 as shown in FIG. 4C, and the jitter amount can be observed.

In this way, when the jitter amount increases, the frequency division ratio 1 / N of the frequency divider 11 is changed to measure the jitter amount. At this time, the amount of jitter of the signal under measurement 23 can be calculated by (τ / T ₀ × 2π) × N [rad].

[0019]

[Effect of device]

 According to this invention, when the amount of jitter increases, the frequency division ratio N of the frequency divider 11 can be changed to remove the overlap of the measurement signals, and the amount of jitter can be easily measured. That is, in the present invention, the signal including the jitter generated by the jitter generating circuit 5 is divided into 1 / N by the frequency dividing means 11 to measure the jitter amount smaller than N / 2 cycles. It can be easily measured by means 12.

[Brief description of drawings]

FIG. 1 is a functional block diagram showing an embodiment of a jitter measuring apparatus according to the present invention.

FIG. 2 is a configuration example of a jitter measuring system according to a conventional technique.

FIG. 3 is a waveform diagram for explaining the embodiment of FIG.

FIG. 4 is a waveform diagram for explaining the embodiment of FIG.

[Explanation of symbols]

 5 Jitter generation circuit 11 Divider 12 Oscilloscope 21 Reference signal 22 Jitter signal 23 Signal under test 24 Divided signal

Claims (1)

[Scope of utility model registration request] 1. A signal to be measured (23) of a jitter generation circuit (5) for inputting a reference signal (21) and a jitter signal (22) to generate a signal to be measured (23) including jitter. In the jitter measuring device for measuring the amount of jitter, the signal under measurement (23) is input, and the frequency dividing means (11) for dividing the signal under measurement (23) to an arbitrary frequency division ratio is used. From the means (11), the frequency-divided signal (2
4) and the reference signal (21) is input, and the reference signal (21) as a trigger input and has a measuring means (12) for measuring the amount of jitter of the signal under measurement (23), The dividing ratio divided by the dividing means (11) is the signal under measurement.
A jitter measuring device characterized by being selected according to the amount of jitter of (23).