JPH06283540A - Hetero-junction bipolar transistor - Google Patents

Abstract

PURPOSE:To enable a high current gain to be made by a method wherein the first conductivity type imprities forming a shallow energy level on the outer base surface are to be led in high concentration so as to suppress the surface recoupling by deeper energy level on the outer base surface. CONSTITUTION:A base 4 to be the first conductivity type semiconductor region is composed of a true base region 11 in an active region and an outer base region 12 to be the region for lead-out a base electrode 9. Within the hetero-junction bipolar transistor comprising III-V group compound semiconductor material, the first conductivity type impurities forming the shallow energy level are led in the outer base surface 12 in high concentration. For example, II group Zn or Mg ions forming the shallow energy level are implanted in the outer base surface 13 only using a base electrode 9 and an emitter electrode 8 as masks in high dosage and low energy level e.g. 1X10<15>cm<-2>, 10kev to be annealed at 650 deg.C later.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heterojunction bipolar transistor having excellent current gain characteristics.

[0002]

2. Description of the Related Art A heterojunction bipolar transistor has a high emitter injection efficiency due to a difference in bandgap between a base region and an emitter region, a low base resistance due to a high impurity concentration in the base region, and a low emitter junction capacitance due to a low impurity concentration in the emitter region. Due to its excellent device characteristics, it has been attracting attention as a millimeter-wave and microwave device and has been actively developed in recent years. FIG. 2 shows the structure of a typical conventional heterojunction bipolar transistor. 1 is a semi-insulating substrate, on which a high concentration second conductivity type GaA
s sub-collector layer 2, low concentration second conductivity type GaAs collector layer 3, high concentration first conductivity type base layer 4, GaAs spacer layer 5 close to the intrinsic carrier concentration, second conductivity type AlG
An aAs emitter layer 6 and a high concentration second conductivity type GaAs emitter cap layer 7 are sequentially laminated. The base layer 4 is composed of an intrinsic base region 11 of an active region and an external base region 12 which is a region for taking out a base electrode.
Reference numeral 8 is an emitter electrode, 9 is a base electrode, and 10 is a collector electrode. In the heterojunction bipolar transistor having such a structure, the majority carriers of the second conductivity type injected from the emitter to the base mostly flow by diffusion in the intrinsic base region to the collector depletion layer, but some carriers Are injected into the extrinsic base region and recombine with majority carriers in that region. In particular, it has been reported that the recombination occurs at a high rate on the surface of the extrinsic base. (YS Shiraoka, et al., IEEE Tran
s. Electron Devices, vol. Three
5, July, 1988, pp857-862). The recombination in the extrinsic base region causes a problem that the base current increases and the current gain decreases.

[0003]

As a result of performing a two-dimensional simulation in order to study the above-mentioned recombination mechanism on the surface of the external base in more detail, the following points were revealed.
FIG. 3 shows the npn heterojunction bipolar transistor having the structure of FIG. 2 analyzed by two-dimensional simulation, and three-dimensionally shows the energy distribution of the conduction band in the left half structure. The external base region 12 in the heterojunction bipolar transistor is likely to have a deep surface level on its surface by a manufacturing process such as etching. External base 1
When the deep impurity level is distributed on the surface of No. 2, the surface Fermi level is pinned to the position of the deep level, and a potential well 14 is formed in that portion. When the transistor is turned on by the application of an external bias, a part of the majority carriers of the second conductivity type, which is injected from the emitter to the intrinsic base, is injected into the well by the local electric field generated by the potential gradient of the well and is accumulated therein. It When the carriers are injected into the well, the deep impurity level there acts as a recombination center, causing surface recombination with majority carriers of the first conductivity type. It was found that the required majority carriers of the first conductivity type were supplied from the base electrode, and as a result, the base current increased and the current gain decreased.

An object of the present invention is to solve the above-mentioned conventional problems and provide a heterojunction bipolar transistor having a high current gain.

[0005]

In the transistor of the present invention, the base, which is the first semiconductor region having the first conductivity type, is the external base region, which is the region for taking out the intrinsic base region of the active region and the base electrode. III- composed of
A heterojunction bipolar transistor made of a Group V compound semiconductor material is characterized in that impurities of the first conductivity type that form a shallow energy level on the surface of the external base are introduced at a high concentration.

[0006]

[Function] When an impurity of the first conductivity type that forms a shallow energy level is introduced at a high concentration and activated on the surface of the external base where the deep surface level is distributed, the deep surface becomes a recombination center in the conductive state. A part of the levels is compensated by the introduced shallow impurity levels, and the occupation ratio of the deep surface levels by the majority carriers in the second conductivity type injected into the potential well is reduced. When the carrier occupancy of the deep surface level becomes low, the probability of recombination due to the level becomes low. As a result, surface recombination can be suppressed, the base current component supplied thereby can be reduced, and high current gain characteristics can be obtained.

[0007]

EXAMPLES Examples of the present invention will be described below. AlGa
An As / GaAs type heterojunction bipolar transistor structure is shown in FIG. The impurity concentration and thickness of each layer are n ⁺ -G
aAs layer sub-collector 2 is 400 nm and Si 3 × 10
¹⁸ cm ⁻³ doped, n-GaAs collector layer 3 is 50
Si doped at 5 nm × 10 ¹⁶ cm ⁻³ at 0 nm, p ⁺ −G
aAs base layer 4 is 80 nm and Be is 2 × 10 ¹⁹ cm
^-3 doped, i-GaAs spacer layer 5 is undoped. The n-Al _x Ga _{1 -x} As emitter layer 6 is a grading layer in which x continuously changes from 0 to 0.25 at a boundary portion 20 nm with the i-GaAs layer 5 from the substrate side, 100 nm Al _{0 .. 2 5} Ga _{0. 7 5} As
The layer is composed of a grading layer in which x continuously changes from 0.25 to 0 at a boundary portion of 30 nm with the emitter cap layer 7 and is doped with Si at 3 × 10 ¹⁷ cm ⁻³ . Then, the n ⁺ -GaAs emitter cap layer 7
Is 200 nm and is 6 × 10 ¹⁸ cm ⁻³ doped with Si. In the structure of this embodiment, the group II ions Zn or M that form a shallow energy level only on the outer base surface 13 using the base electrode and the emitter electrode as a mask.
g ion with high dose and low energy, for example, 1 × 10
After implantation at ¹⁵ cm ^-2 and 10 keV, annealing was performed at 650 ° C. The group II impurities form shallow levels on the outer base surface 13, while the group II impurity surface densities are deep surface levels distributed therein (usually 2 × 10 ¹³
cm ^-2 )).

FIG. 4 shows the DC current gain characteristic of the hetero bipolar transistor according to this embodiment. The solid line is the result of this embodiment, and the broken line is the result when the high concentration external base surface 13 is not provided and the other portions have the same structure as this embodiment. As is clear from FIG. 4, a considerable improvement in the DC current gain was obtained by introducing a high-concentration impurity forming a shallow level on the surface of the external base.

In this embodiment, the highly concentrated external base surface 1
Although ion implantation was performed to form No. ₃ , diffusion may be performed at about 550 ° C. using a Zn diffusion source AsZn ₂ or the like.

[0010]

As described above, according to the present invention, the surface recombination due to the deep surface level on the surface of the external base can be suppressed and a higher current gain can be obtained.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a heterojunction bipolar transistor structure of the present invention.

FIG. 2 is a cross-sectional view showing a conventional heterojunction bipolar transistor structure.

3 is a two-dimensional numerical simulation analysis of the right half structure of the heterojunction bipolar transistor of FIG.
It is the figure which expressed three-dimensionally the energy distribution of the conduction band in the area | region of an emitter and a base.

FIG. 4 is a diagram showing the dependence of the DC current gain on the collector current density in an example of the present invention and an example of a conventional structure.

[Explanation of symbols]

1 semi-insulating GaAs substrate 2 n ⁺ -GaAs subcollector layer 3 n-GaAs collector layer 4 p ⁺ GaAs base layer 5 i-GaAs spacer layer 6 n-AlGaAs emitter layer 7 n ⁺ GaAs emitter cap layer 8 emitter electrode 9 base Electrode 10 Collector electrode 11 Intrinsic base region 12 External base region 13 External base surface with high impurity concentration 14 Potential well

Claims (1)

[Claims] 1. A III-V group compound in which a base which is a first semiconductor region having a first conductivity type is composed of an intrinsic base region of an active region and an external base region which is a region for taking out a base electrode. A heterojunction bipolar transistor made of a semiconductor material, characterized in that impurities of the first conductivity type that form a shallow energy level on the surface of the external base are introduced at a high concentration.