JPH0628016B2 - Initial discrimination circuit - Google Patents

Description

The present invention relates to an initial discriminating circuit, and more particularly to an initial discriminating circuit that uses a logic circuit to determine whether the power is initially turned on or after a momentary power failure. .

[Conventional technology]

In a logic circuit using a flip-flop circuit, a RAM (random access memory), etc., a part of the circuit may be backed up by a large-capacity capacitor in order to retain the state immediately before that even if the power supply is temporarily cut off. is there. In this case, it is necessary to select whether or not to initialize the circuit depending on whether or not the state is retained when the power is restored. As a conventional technique, there is adopted a method of providing a voltage detection circuit and a timer circuit for the above selection and monitoring a power input or a time when the power is cut off.

[Problems to be solved by the invention]

In the above-mentioned conventional method, it is necessary to provide a power supply for driving the voltage detection circuit or the timer circuit with a power supply in a system different from the power supply for the logic circuit described above, or to provide uninterruptible power supply. There is a drawback that it cannot be avoided.

An object of the present invention is to eliminate the above-mentioned drawbacks and to provide an initial determination circuit having a simple configuration that does not require a separate power supply or an uninterruptible power supply.

[Means for solving problems]

The circuit of the present invention is a D-type flip-flop circuit having a data input and a latching clock input for latching the data input in an initial determination circuit for determining whether the DC power supply is initially turned on or after a momentary power failure. And the terminal voltage of the capacitor charged and discharged depending on the presence or absence of the application of the DC power supply to the time constant circuit formed by the capacitor and the resistor is not a state voltage expressing the applied state of the DC power supply. Even if the terminal voltage of the capacitor is set to maintain a state in which the terminal voltage exceeds a predetermined threshold value for a certain period of time for determining the instantaneous power failure of the DC power supply by the time constant of the time constant circuit, the state voltage is set to the D-type flip-flop. Power state input circuit to be supplied as the data input of the flip-flop circuit, and the D-type flip circuit by turning on the DC power source. An initial for generating a latching clock pulse for latching the data input of the drop circuit and supplying it as the latching clock input of the D-type flip-flop circuit to determine whether the DC power is initially turned on or after a momentary power failure. And a clock pulse generation circuit for transmitting a discrimination signal as an output of the D-type flip-flop circuit.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG.
FIG. 7 is a waveform chart for explaining the operation in the embodiment in the figure.

The initial discrimination circuit of FIG. 1 has a CMOS configuration as a whole, and the capacitor 24 of the power supply state input circuit 2 has a resistor 21
Is charged by the power supply input via the diode 25, and this terminal voltage is supplied to the inverter 27 via the diode 26. In addition, the resistor 22 is an inverter 27 that is apt to occur in the case of a CMOS structure and is for applying a pull-up voltage for avoiding a high input impedance. With such a circuit configuration, a superimposed voltage obtained by adding a slight forward voltage drop of the diode 26 to the terminal voltage of the capacitor 24 is applied to the input of the inverter 27.
The diodes 25 and 26 are for preventing the charge of the capacitor 24 from leaking to the power supply side when the power supply is cut off. The resistor 23 is a high resistance for discharging and discharges the electric charge of the capacitor 24 with a time constant determined together with the capacitor 24. The inverter 27 mainly receives the terminal voltage of the capacitor 24, and sets the low level when the terminal voltage exceeds a predetermined threshold value and the high level when the terminal voltage is less than the predetermined threshold value as the state voltage. It is given as a data input to the input terminal D of. The resistor 34 and the capacitor 35 of the clock pulse generation circuit 3, and the inverters 31 and 32 generate a latch pulse when the power is turned on to generate the D-type flip-flop circuit 1.
Is applied to the clock terminal CK as the latch clock input. By this clock pulse, the D-type flip-flop circuit 1 outputs the output of the inverter 27, that is, the capacitor 2
The state of the terminal voltage of 4 is latched and output. D in this case
The output of the type flip-flop circuit 1 is high level when the output of the inverter 27 is low level, that is, the terminal voltage of the capacitor 24 exceeds a predetermined threshold value, and the output of the inverter 27 is high level, that is, the terminal voltage of the capacitor 24 is predetermined. When it is less than or equal to the threshold of, the low level output is sent as the initial determination output.

FIG. 2 shows the state of this operation. When (a) the power supply input is, (d) the input of the inverter 27 is below the threshold level, (f) the initial determination output is low level, and (a) the power supply is When the input is, (d) the input of the inverter 27 exceeds the threshold level, so (f) the initial determination output outputs a high level. Further, if the power is turned on again after (a) the power input, (d) the input of the inverter 27 is further lowered by the discharge, as shown by the broken line, and the terminal voltage of the capacitor 24 is lower than the threshold of the inverter 27. Then, the low level is output again as the (f) initial determination output. In this way, a high-level initial determination output is output for early recovery after the momentary power failure of the power supply, and a low-level initial determination output for initial power-on. It should be noted that (a) power input indicates a power-off state, and indefinite indicates a Kogic indefinite state corresponding to this power-off. Further, FIG. 2 relates to the operation described above. (B) The terminal voltage of the capacitor 35, (c) the output of the inverter 32, and (e) the output of the inverter 31 are shown together. The diode 36 discharges the electric charge of the capacitor 36 when the power supply is cut off, and the inverter 33 is provided to keep the anode of the diode 25 at a low level in order to inhibit the discharge of the capacitor 24 until the rise of the clock pulse. is there.

〔The invention's effect〕

As described above, according to the present invention, the discharging state of the capacitor terminal voltage from when the power is turned off to when the power is turned on is latched in the D-type flip-flop circuit when the power is turned on, so that it is determined by the capacitor and the discharging resistor. There is an effect that it is possible to obtain status information for determining whether or not an initial is applied according to a time constant, without requiring a separate system power supply or an uninterruptible power supply.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG.
FIG. 7 is a waveform chart for explaining the operation in the embodiment in the figure. 1 ... D-type flip-flop circuit, 2 ... Power supply state input circuit, 3 ... Clock pulse generation circuit, 21-23 ... Resistor,
24 ... Capacitor, 25, 26 ... Diode, 27 ... Inverter, 31-33 ... Inverter, 34 ... Resistor, 35
... capacitor, 36 ... diode.

Claims (1)

[Claims] 1. A D-type flip-flop circuit having a data input and a latch clock input for latching the data input in an initial determination circuit for determining whether the DC power supply is initially turned on or after a momentary power failure. ,
The terminal voltage of the capacitor charged and discharged depending on the presence or absence of the application of the DC power supply to the time constant circuit formed by the capacitor and the resistor is not a state voltage expressing the applied state of the DC power supply, even if the DC power supply is disconnected. The D-type flip-flop circuit is provided with the state voltage that ensures that the terminal voltage of the capacitor exceeds a predetermined threshold value for a certain period of time to determine an instantaneous power failure of the DC power supply according to the time constant of the time constant circuit. And a power supply state input circuit for supplying the data input, and a clock pulse for latch for latching the data input of the D-type flip-flop circuit is generated by turning on the DC power supply.
Type flip-flop circuit, and a clock pulse generation circuit for supplying an initial determination signal as the output of the D-type flip-flop circuit, which is supplied as the latch clock input and determines whether the DC power source is initially turned on or after a momentary power failure. An initial discriminating circuit, comprising: