JPH0627957Y2 - Power transistor - Google Patents
Power transistorInfo
- Publication number
- JPH0627957Y2 JPH0627957Y2 JP1988103064U JP10306488U JPH0627957Y2 JP H0627957 Y2 JPH0627957 Y2 JP H0627957Y2 JP 1988103064 U JP1988103064 U JP 1988103064U JP 10306488 U JP10306488 U JP 10306488U JP H0627957 Y2 JPH0627957 Y2 JP H0627957Y2
- Authority
- JP
- Japan
- Prior art keywords
- emitter
- output terminal
- collector
- electrode
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
【考案の詳細な説明】 〔産業上の利用分野〕 本考案は、トランジスタチップのエミッタ電極と外部出
力端子との接続がアルミニウム導線のボンディングによ
って行われるパワートランジスタに関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial field of use] The present invention relates to a power transistor in which an emitter electrode of a transistor chip and an external output terminal are connected by bonding an aluminum conductor wire.
パワートランジスタのチップに大きな電流を流すために
は断面積の大きい導体によって出力端子とチップのエミ
ッタおよびコレクタ電極とを接続しなければならない。
チップ裏面側に露出するコレクタ層に断面積の大きい、
すなわち表面積の大きい導体を直接ろう付けすることが
できるが、ベース層に囲まれるエミッタ層にはそのよう
なことは不可能である。特にエミッタ層とベース層とを
近接させるためにエミッタ層はベース層中に分散配置す
るメッシュ形あるいは櫛形にされるため、エミッタ電極
と外部出力端子との接続は帯状導体と電極とに細いAl線
をボンディングすることによって行われる。第２図はそ
のようなパワートランジスタの配線を示し、トランジス
タチップ１の表面の図示しない多数のエミッタ電極とエ
ミッタ出力端子21に連結された銅よりなる帯状配線31と
は、細いAl線41を多数ボンディングすることにより接続
されている。この際、Al線41は多数であり、図のように
平行に走っている。コレクタ電極はチップ１の裏面にあ
るので、コレクタ出力端子23に連結された帯状銅配線33
の端部の大面積部に直接ろう付けされている。ベース電
極もエミッタ電極と同じくチップ１の表面に設けられる
が、ベース電流はエミッタ電流に比して小さく、一つの
ベース電極から取り出せるので、ベース出力端子22に連
結された帯状銅配線32とチップ１上に図示しないベース
電極との間はAl線42の１本のみで接続されている。In order to pass a large current through the chip of the power transistor, the output terminal and the emitter and collector electrodes of the chip must be connected by a conductor having a large cross-sectional area.
The collector layer exposed on the back side of the chip has a large cross-sectional area,
That is, a conductor having a large surface area can be directly brazed, but this is not possible in the emitter layer surrounded by the base layer. In particular, since the emitter layer and the base layer are brought close to each other, the emitter layer is formed into a mesh shape or a comb shape in which the emitter layer and the base layer are dispersed. Therefore, the connection between the emitter electrode and the external output terminal is a thin Al wire between the strip conductor and the electrode. By bonding. FIG. 2 shows the wiring of such a power transistor, and a large number of thin Al wires 41 are provided in a large number of emitter electrodes (not shown) on the surface of the transistor chip 1 and the strip-shaped wiring 31 made of copper connected to the emitter output terminal 21. They are connected by bonding. At this time, the Al wires 41 are numerous and run in parallel as shown in the figure. Since the collector electrode is on the back surface of the chip 1, the strip-shaped copper wiring 33 connected to the collector output terminal 23 is provided.
It is brazed directly to the large area at the end of. The base electrode is also provided on the surface of the chip 1 like the emitter electrode, but the base current is smaller than the emitter current and can be taken out from one base electrode. Therefore, the strip-shaped copper wiring 32 connected to the base output terminal 22 and the chip 1 are provided. Only one Al wire 42 is connected to the base electrode (not shown).
第２図に示したようなパワートランジスタでチップが破
損して短絡状態になり、コレクタ・エミッタ間に過電流
が流れた場合、帯状銅配線31よりAl線41方が電流容量が
小さいため、Al線が溶断する。その結果ベースAl線42を
通してコレクタからベースに大電流が流れこみ、コレク
タ・ベース間に接続されるこのパワートランジスタを駆
動するためのドライブ回路が破損するという問題があっ
た。When the chip is damaged by the power transistor as shown in Fig. 2 and short-circuited, and an overcurrent flows between the collector and the emitter, the Al wire 41 has a smaller current capacity than the strip copper wiring 31. The wire melts. As a result, a large current flows from the collector to the base through the base Al line 42, and there is a problem that the drive circuit for driving the power transistor connected between the collector and the base is damaged.
本考案の課題は、トランジスタチップが破損して過電流
がチップに流れ込んだ場合にもコレクタ・ベース間に接
続された周辺回路の破損することのないパワートランジ
スタを提供することにある。An object of the present invention is to provide a power transistor in which a peripheral circuit connected between a collector and a base is not damaged even when a transistor chip is damaged and an overcurrent flows into the chip.
上記の課題の解決のために、本発明のパワートランジス
タは、下面にコレクタ電極、上面にエミッタおよびベー
ス電極を有するトランジスタチップのコレクタ電極が金
属支持板上に固着され、エミッタ電極はエミッタ出力端
子と、ベース電極はベース出力端子と、金属支持板はコ
レクタ出力端子と複数の同一材料の導線によって接続さ
れ、その際金属支持板とコレクタ出力端子とを接続する
導線の総断面積がエミッタ電極とエミッタ出力端子とを
接続する導線の総断面積より小さいものとする。In order to solve the above problems, in the power transistor of the present invention, a collector electrode of a transistor chip having a collector electrode on the lower surface and an emitter and a base electrode on the upper surface is fixed on a metal supporting plate, and the emitter electrode serves as an emitter output terminal. , The base electrode is connected to the base output terminal and the metal support plate is connected to the collector output terminal by a plurality of conductors made of the same material, and the total cross-sectional area of the conductor connecting the metal support plate and the collector output terminal is the emitter electrode and the emitter. It shall be smaller than the total cross-sectional area of the conductor that connects to the output terminal.
トランジスタチップが破損して短絡状態になり、コレク
タ・エミッタ間に過電流が流れた場合、エミッタ電極と
エミッタ出力端子を接続する導線よりも、総断面積の小
さい、チップ支持板とコレクタ出力端子とを接続する導
線が先に溶断する。その結果、コレクタ・ベース間に接
続されたドライブ回路に大電流が流れ込むことはない。If the transistor chip is damaged and short-circuited, and an overcurrent flows between the collector and emitter, the chip support plate and collector output terminal, which have a smaller total cross-sectional area than the conductor connecting the emitter electrode and the emitter output terminal, The lead wire that connects is melted first. As a result, no large current flows into the drive circuit connected between the collector and the base.
第１図は本考案の一実施例を示し、第２図と共通の部分
には同一の符号が付されている。図から明らかなよう
に、コレクタ出力端子23に連結された帯状銅配線33は中
間で切断され、チップ１は銅からなるチップ支持板５に
ろう付され、チップ支持板５と帯状銅配線33の間もAl線
43をボンディングすることにより接続されている。この
Al線43はエミッタ電極と帯状銅配線31を接続するAl線41
と同じ線であるが、本数が銅配線31に接続される41の本
数より１本少ない。従ってコレクタ・エミッタ間に過電
流が流れた際、帯状銅配線31に接続されたAl線42より先
に帯状銅配線33に接続されたAl線43が溶断し、コレクタ
出力端子23からベース出力端子22にチップの短絡個所を
介して大電流が流れることがない。従ってコレクタ・ベ
ース間に接続されるドライブ回路のような周辺回路を保
護することができる。FIG. 1 shows an embodiment of the present invention, and the same parts as those in FIG. 2 are designated by the same reference numerals. As is apparent from the figure, the strip-shaped copper wiring 33 connected to the collector output terminal 23 is cut in the middle, the chip 1 is brazed to the chip supporting plate 5 made of copper, and the chip supporting plate 5 and the strip-shaped copper wiring 33 are separated. Al line between
43 is connected by bonding. this
The Al wire 43 is an Al wire 41 that connects the emitter electrode and the strip-shaped copper wiring 31.
However, the number is 41 less than the number of 41 connected to the copper wiring 31. Therefore, when an overcurrent flows between the collector and the emitter, the Al wire 43 connected to the strip copper wiring 33 is blown before the Al wire 42 connected to the strip copper wiring 31, and the collector output terminal 23 to the base output terminal No large current flows through the short-circuited part of the chip. Therefore, peripheral circuits such as a drive circuit connected between the collector and the base can be protected.
本考案によれば、エミッタ・ベースばかりでなくトラン
ジスタチップの下面に電極を備えたコレクタも出力端子
との間に複数の導線で接続される個所を設け、コレクタ
出力端子とコレクタ電極との間の接続導線の総断面積を
エミッタ出力端子とエミッタ電極との間の接続導線の総
断面積より小さくする。この結果、チップの破損により
エミッタ・コレクタ間に過電流が流れたとき、コレクタ
端子との接続導線が最初に溶断し、コレクタ・ベース間
に接続される周辺回路に大電流が流れこんでそれを破壊
することがなくなる。According to the present invention, not only the emitter / base but also the collector provided with an electrode on the lower surface of the transistor chip are provided with a portion connected to the output terminal by a plurality of conducting wires, and a portion between the collector output terminal and the collector electrode is provided. The total cross-sectional area of the connecting conductor is made smaller than the total cross-sectional area of the connecting conductor between the emitter output terminal and the emitter electrode. As a result, when an overcurrent flows between the emitter and collector due to damage to the chip, the connecting wire connecting to the collector terminal first melts, causing a large current to flow into the peripheral circuit connected between the collector and base and causing it to flow. It will not be destroyed.
第１図は本考案の一実施例のパワートランジスタの要部
平面図、第２図は従来のパワートランジスタの要部平面
図である。 １：トランジスタチップ、21：エミッタ出力端子、22：
ベース出力端子、23：コレクタ出力端子、31，32，33：
帯状銅配線、41，42，43：Al線、５：チップ支持板。FIG. 1 is a plan view of an essential part of a power transistor according to an embodiment of the present invention, and FIG. 2 is a plan view of an essential part of a conventional power transistor. 1: Transistor chip, 21: Emitter output terminal, 22:
Base output terminal, 23: Collector output terminal, 31, 32, 33:
Strip copper wiring, 41, 42, 43: Al wire, 5: chip support plate.
Claims (1)
びベース電極を有するトランジスタチップのコレクタ電
極が金属支持板上に固着され、エミッタ電極はエミッタ
出力端子と、ベース電極はベース出力端子と、金属支持
板はコレクタ出力端子とそれぞれ複数の同一材料の導線
によって接続され、その際金属支持板とコレクタ出力端
子とを接続する導線の総断面積がエミッタ電極とエミッ
タ出力端子とを接続する導線の総断面積より小さいこと
を特徴とするパワートランジスタ。1. A collector electrode of a transistor chip having a collector electrode on a lower surface and an emitter and a base electrode on an upper surface is fixed on a metal supporting plate, the emitter electrode is an emitter output terminal, the base electrode is a base output terminal, and a metal supporting member. The plate is connected to the collector output terminal by a plurality of conductors of the same material, and the total cross-sectional area of the conductor connecting the metal support plate and the collector output terminal is the total disconnection of the conductor connecting the emitter electrode and the emitter output terminal. A power transistor that is smaller than the area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988103064U JPH0627957Y2 (en) | 1988-08-03 | 1988-08-03 | Power transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988103064U JPH0627957Y2 (en) | 1988-08-03 | 1988-08-03 | Power transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0224559U JPH0224559U (en) | 1990-02-19 |
| JPH0627957Y2 true JPH0627957Y2 (en) | 1994-07-27 |
Family
ID=31333545
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988103064U Expired - Fee Related JPH0627957Y2 (en) | 1988-08-03 | 1988-08-03 | Power transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0627957Y2 (en) |
-
1988
- 1988-08-03 JP JP1988103064U patent/JPH0627957Y2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0224559U (en) | 1990-02-19 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |