JPH06276444A - Video camera - Google Patents

Abstract

PURPOSE:To stabilize the iris operation of a lens in the high sensitivity mode applying exposure for an exposure time in excess of one field. CONSTITUTION:An iris control signal control circuit 11 is provided between an iris control signal generating circuit 2 and a lens 1, and when a high sensitivity mode discrimination signal n1 from an exposure time control circuit 4 indicates the usual mode, an iris control signal a1 from the iris control signal generating circuit 2 is fed to the lens 1 as an iris control signal p1 as it is, and when the high sensitivity mode discrimination n1 indicates the high sensitivity mode, the iris control signal used to fix the iris of the lens in the open state is fed to the lens 1 as the iris control signal p1. Thus, the iris operation of the lens is made stable in the high sensitivity mode where the exposure is executed for an exposure time in excess of one field.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video camera which switches an exposure time to pick up an image, and more particularly to a video camera which can prevent hunting in a high sensitivity mode.

[0002]

2. Description of the Related Art Conventionally, in a single-chip video camera, a CCD (Charge Coupling) is generally used as a solid-state image sensor.
correlative double sampling (hereinafter C
DS) was performed, and the CDS-processed signal was subjected to analog signal processing to obtain a video signal. As such a video camera, a video camera that operates in a high-sensitivity mode by long-time exposure has been put into practical use when capturing an image in a low light amount state such as at night.

FIG. 2 is a block diagram showing such a conventional video camera.

In FIG. 2, reference numeral 51 is a lens of a video camera, and the iris (aperture) of the lens 51 is adjusted by an iris control signal a2 from an iris control signal generating circuit 52 described later. . A CCD 53 is provided at the back of the lens 51, and the imaging light b2 passing through the lens 51 receives the CCD 53.
Image on.

On the other hand, the exposure time control circuit 54
The illuminance of the imaging light b2 that has passed through the lens 51 is detected by the CCD output signal c2 from the signal processing circuit 55 described later, the exposure time is set based on the detection result, and the exposure time control that indicates the number of fields of the exposure time is set. The signal d2 is supplied to the CCD drive circuit 56. The CCD drive circuit 56 is also supplied with the vertical drive pulse e2 from the input terminal 58,
Based on the exposure time control signal d2 and the vertical drive pulse e2, a horizontal transfer pulse, a vertical transfer pulse, and an exposure time setting field shift pulse f2 are created to generate the CCD 5
Supply to 3.

The CCD 53 is driven by the horizontal transfer pulse, the vertical transfer pulse, and the field shift pulse f2 from the CCD drive circuit 56, so that the C having an exposure signal for each field to which the field shift pulse f2 is input.
The CD output signal g2 is supplied to the CDS circuit 57. CDS
The circuit 57 performs the CDS processing on the CCD output signal g2 and supplies it to the signal processing circuit 55 as the CDS-processed CCD output signal h2. The signal processing circuit 55 is a CCD
The output signal h2 is supplied to the exposure time control circuit 54 as the CCD output signal c2, the CCD output signal h2 of the field having the exposure signal is stored, and the field having no exposure signal is interpolated by the stored CCD output signal h2 of the field. , And the CCD output signal i2 obtained by field interpolation is supplied to the iris control signal generation circuit 52. The iris control signal generation circuit 52 is
CCD output signal i2 to iris control signal a2
And adjust the iris of the lens 51 to make the lens 5
The light amount of the imaging light b2 passing through 1 is controlled. Further, the signal processing circuit 55 performs analog signal processing on the CCD output signal i2 in which the field is interpolated to generate a video signal j2 and leads it to the video signal output terminal 59. Video signal j led to the video signal output terminal 59
2 is supplied to video equipment such as a video tape recorder and a television receiver connected to the video signal output terminal 59.

FIG. 3 is a block diagram for explaining the CCD 53 of FIG. 2 in more detail.

In FIG. 3, the CCD 53 has a form in which photoelectric conversion units 61 corresponding to pixels arranged in the vertical direction and vertical transfer units 62 are alternately arranged in the horizontal direction. The signal charges accumulated in the photoelectric conversion unit 61 are transferred to the vertical transfer unit 62 by the field shift pulse. The charges transferred to the vertical transfer unit 62 are transferred to the horizontal transfer unit 63 for each horizontal line by supplying a vertical transfer pulse. The charges transferred to the horizontal transfer unit 63 are supplied to the charge detection unit 64 by being supplied with the horizontal transfer pulse. The charge detection unit 64 creates an exposure signal by detecting the signal charge from the horizontal transfer unit 63, and supplies this exposure signal to the CDS circuit 57 as a CCD output signal g2.

In such a conventional video camera,
The level of the CCD output signal c2 from the signal processing circuit 55 is proportional to the illuminance of the imaging light b2. The exposure time control circuit 54 detects the level of the CCD output signal c2 after the CCD output signal c2 from the signal processing circuit 55 is stabilized, and if the detected level is larger than a predetermined value, the exposure time is 1 field. An exposure time control signal d2 indicating that there is is supplied to the CCD drive circuit 56 to cause the CCD 53 to perform a normal exposure operation, and when the detected level is equal to or lower than a predetermined value, it indicates that the exposure time is 4 fields. The exposure time control signal d2 is supplied to the CCD drive circuit 56, and C
The CD 53 is caused to perform a long-time exposure operation as an operation in the high sensitivity mode. In this case, the reason why the level of the CCD output signal c2 is detected after the CCD output signal c2 is stabilized is to prevent the malfunction due to the iris change of the lens 51.

FIG. 4 is a timing chart for explaining the long-time exposure operation in the high-sensitivity mode of such a conventional video camera, taking the case where the exposure time is 4 fields as an example.
FIG. 4A shows the vertical drive pulse e2.
4B shows the field shift pulse f2, which is shown in FIG.
(C) shows the CCD output signal g2.

When performing a long-time exposure operation with an exposure time of 4 fields in the high sensitivity mode, the exposure time control circuit 54 outputs an exposure time control signal d2 indicating that the exposure time is 4 fields to the CCD drive circuit 52. Supply to. The CCD drive circuit 52 uses the exposure time control signal d2 and the vertical drive pulse e2 whose cycle shown in FIG. 4 (a) is one field, and the horizontal transfer pulse, vertical transfer pulse and the cycle shown in FIG. 4 (b) are four fields. An exposure time setting field shift pulse f2 is created and supplied to the CCD 53.

The signal charge accumulated in the photoelectric conversion section 61 is
It is transferred to the vertical transfer unit 62 every four fields by the field shift pulse f2. The charges transferred to the vertical transfer unit 62 are transferred to the horizontal transfer unit 63 by being supplied with the vertical transfer pulse, and the charges transferred to the horizontal transfer unit 63 are the horizontal transfer pulse synchronized with the vertical drive pulse e2. By being supplied, it is supplied to the charge detection unit 64, and the charge detection unit 64 outputs the CD as the CCD output signal g2.
It is supplied to the S circuit 57. In this case, CCD output signal g
As shown in FIG. 4C, 2 has an exposure signal in the period T1 of the field to which the field shift pulse f2 is supplied, but performs vertical and horizontal transfer to the CCD 53 in the period T2 in which the field shift pulse f2 is not supplied. Although a pulse is supplied, the charge from the pixel is not transferred to the vertical transfer unit 62, so that the field has no exposure signal.

The CDS circuit 57 performs CDS processing on the CCD output signal g2 and supplies it to the signal processing circuit 55 as a CCD output signal h2. The signal processing circuit 55 has a CC
The D output signal h2 is supplied to the exposure time control circuit 54 as the CCD output signal c2, and the CCD output signal h2 of the period T1 with the exposure signal is stored and stored for the field of the period T2 without the exposure signal. T1
The iris control signal generation circuit 5 interpolates with the CCD output signal h2 of the field
Supply to 2. Iris control signal generation circuit 52
Generates an iris control signal a2 from the CCD output signal i2 and adjusts the iris of the lens 51. As a result, the exposure time from the video signal output terminal 59 is 4
In the field, the video signal j2 whose output level has been adjusted by the iris adjustment is output while switching the image by 4 fields.

When operating in the normal mode, the exposure time control circuit 54 supplies an exposure time control signal d2 indicating that the exposure time is one field to the CCD drive circuit 52. The CCD drive circuit 52 creates a horizontal transfer pulse, a vertical transfer pulse, and an exposure time setting field shift pulse f2 having a cycle of 1 field to generate the CCD 5
Supply to 3. Then, the CCD output signal g2 has an exposure signal in all fields. Even in this state, the iris control signal generation circuit 52
Generates an iris control signal a2 from the CCD output signal i2 and adjusts the iris of the lens 51. As a result, the exposure time from the video signal output terminal 59 is 1
In the field, the video signal j2 whose output level is adjusted by the iris adjustment is output while the video is switched field by field.

The iris control circuit system of the conventional video camera will be described in more detail below.

FIG. 5 is a block diagram showing an iris control circuit system of the video camera of FIG. 2, and shows other circuits in a simplified manner.

The CCD output circuit 71 is the CCD 5 of FIG.
3, the CDS circuit 57 and the signal processing circuit 55 are combined, and the horizontal transfer pulse from the CCD drive circuit 56,
The CCD output signal c2 is controlled by the vertical transfer pulse and the exposure time setting field shift pulse f2 and is supplied to the iris control signal generating circuit 52.

The iris control signal generating circuit 52 will be described below.

The CCD output signal c2 from the CCD output circuit 71 is amplified by the amplifier 72, and the CCD output signal k
Is supplied to the reference black level clamp circuit 73. The reference black level clamp circuit 73 clamps the black level DC voltage value of the CCD output signal k, and clamps the clamped CC.
The D output signal is supplied to the non-inverting input terminal (+) of the comparator 74 as the CCD output integrated signal m through the integrating circuit including the resistor R and the capacitor C. The reference voltage V0 from the voltage setting circuit 75 is supplied to the inverting input terminal (−) of the comparator. The comparator 74 compares the CCD output integrated signal m with the reference voltage V0 and supplies the output voltage V1 of the comparison result to the diaphragm control circuit 76. The diaphragm control circuit 76 creates an iris control signal a2 from the output voltage V1 of the comparator 74 and controls the lens 51. Accordingly, the diaphragm control circuit 76 controls the light amount of the imaging light b2 that passes through the lens 51.

In such an iris control circuit system, when the CCD output signal c2 is higher than the desired level, the CCD output integrated signal m supplied to the comparator 74 becomes larger than the reference voltage V0 and the comparator 74 Output voltage V1 becomes high level, and the diaphragm control circuit 76 creates an iris control signal a2 for reducing the iris of the lens 51 and controls the lens 51, so that the imaging light b2 passing through the lens 51 is changed. The amount of light will be reduced.

When the CCD output signal c2 is lower than the desired level, the CCD output integrated signal m supplied to the comparator 74 becomes lower than the reference voltage V0, and the output voltage V1 of the comparator 74 becomes low level. The iris control circuit 76 creates an iris control signal a2 for increasing the iris of the lens 51,
Since the control of 1 is performed, the light amount of the imaging light b2 passing through the lens 51 increases.

In this way, the conventional video camera automatically controls the iris of the lens, adjusts the level of the video signal j2 guided to the video signal output terminal 59 to an appropriate value, and the iris adjustment is sufficient. When the light amount of the image pickup light b2 is reduced to a level at which the proper video signal j2 cannot be obtained, the level of the CCD output signal c2 becomes a predetermined value or less, and the exposure time control circuit 54
An exposure time control signal d2 indicating that the exposure time is 4 fields is supplied to the CCD drive circuit 56 to cause the CCD 53 to perform a long-time exposure operation.

According to such a conventional video camera,
When capturing an image in a low light amount state such as at night, high-quality images can be obtained by long-time exposure. However,
When the exposure time is automatically switched according to the light quantity of the object to be imaged, the CCD output signal i2 becomes an intermittent signal with a large instantaneous change amount, so that the iris operation becomes unstable and hunting occurs. And the screen becomes unstable.

[0024]

In the above-mentioned conventional video camera, in the high sensitivity mode in which the exposure time is longer than one field, the output signal of the solid-state image pickup device is an intermittent signal with a large instantaneous change amount. Therefore, the operation of the iris becomes unstable, hunting occurs, and the screen becomes unstable.

Therefore, it is an object of the present invention to provide a video camera capable of stabilizing the operation of the iris of a lens in a high sensitivity mode in which exposure is performed for an exposure time exceeding one field.

[0026]

According to the video camera of the present invention, the charge of the photoelectric conversion portion is accumulated in the field to which the field shift pulse is not supplied, and is accumulated in the photoelectric conversion portion in the field to which the field shift pulse is supplied. The solid-state imaging device that transfers the generated signal charge to the charge detection unit and outputs the signal charge as an output signal by the charge detection unit, and allows light from the subject to pass with the iris adjusted, A lens for forming an image of a subject on the photoelectric conversion unit, an exposure time control circuit for setting an exposure time, and a field shift pulse having a cycle set based on the setting of the exposure time control circuit are supplied to the solid-state image sensor. The field shift pulse is supplied to the output signal from the solid-state image sensor drive circuit and the solid-state image sensor. An interpolating means for interpolating the field to which the field shift pulse is not supplied by the signal of the generated field, and an iris control signal for controlling the iris of the lens corresponding to the output signal from the solid-state image sensor And an iris control signal generating circuit for supplying the iris control signal from the iris control signal generating circuit to the lens, and the iris control signal generating circuit when the exposure time control circuit is set to 1 field. The iris control signal from the lens is supplied to the lens as it is, and the iris control signal that opens the iris when the setting of the exposure time control circuit exceeds 1 field is supplied to the lens. And No. control circuit, characterized by comprising a video signal processing circuit for generating a video signal by performing predetermined signal processing on the sample-and-hold signal from the automatic gain control circuit.

[0027]

According to this structure, the iris control signal control circuit supplies the iris control signal from the iris control signal generation circuit as it is to the lens when the exposure time control circuit is set to 1 field, When the setting of the exposure time control circuit exceeds 1 field, the iris control signal that opens the iris is supplied to the lens, so the iris of the lens is opened in the high-sensitivity mode in which the exposure time exceeds 1 field. Then, the iris can be stabilized by fixing it.

[0028]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a video camera according to the present invention.

In FIG. 1, the video camera of this embodiment is provided with an iris control signal control circuit 11 between the iris control signal generation circuit 2 and the lens 1, and the iris control signal control circuit 11 is connected to the exposure time control circuit 4 from the exposure time control circuit 4. The iris of the lens 1 is fixed in the open state in the high sensitivity mode by controlling the high sensitivity mode determination signal n1.

More specifically, the iris of the lens 1 is adjusted by the iris control signal p1 from the iris control signal control circuit 11. A CCD 3 is provided behind the lens 1. As a result, the light from the subject passes through the iris-adjusted lens 1 and becomes C as the imaging light b1.
Image on CD3.

On the other hand, the exposure time control circuit 4 receives the CCD output signal c1 from the signal processing circuit 5 and the lens 1
After detecting the illuminance of the imaging light b1 that has passed through the CCD output signal c1 and stabilizing the CCD output signal c1, the exposure time control signal indicating the number of fields of the exposure time based on the detection result of the illuminance of the imaging light b1. d1 is created and supplied to the CCD drive circuit 6. In addition, the exposure time control circuit 4
After the CCD output signal c1 is stabilized, it is determined whether to set the normal mode or the high sensitivity mode based on the detection result of the illuminance of the imaging light b1, and the high sensitivity mode determination signal is created based on this determination result. To the iris control signal control circuit 11. On the other hand, the vertical drive pulse e1 generated by the crystal oscillator is guided to the input terminal 8. The vertical drive pulse e1 guided to the input terminal 8 is supplied to the CCD drive circuit 6. The CCD drive circuit 6 creates a horizontal transfer pulse, a vertical transfer pulse, and an exposure time setting field shift pulse f1 based on the exposure time control signal d1 and the vertical drive pulse e1 and supplies them to the CCD 3.

The CCD 3 is driven by the horizontal transfer pulse, the vertical transfer pulse and the field shift pulse f1 from the CCD drive circuit 6 so that the CCD having an exposure signal for each field to which the field shift pulse f1 is input.
The output signal g1 is supplied to the CDS circuit 7 by the CDS circuit 7. The CDS circuit 7 is a CD for the CCD output signal g1.
The S processing is performed, and the signal is supplied to the signal processing circuit 5 as the CCD output signal h1 which is CDS processed. Signal processing circuit 5
Supplies the CCD output signal h1 as the CCD output signal c1 to the exposure time control circuit 4 and stores the CCD output signal h1 of the field having the exposure signal,
A field having no exposure signal is interpolated by the stored CCD output signal h1 of the field, and the CCD output signal i1 obtained by interpolating the field is supplied to the iris control signal generation circuit 2. Iris control signal generation circuit 2
Generates an iris control signal a1 from the CCD output signal i1 and supplies it to the iris control signal control circuit 11. When the high sensitivity mode determination signal from the exposure time control circuit 4 indicates the normal mode, the iris control signal control circuit 11 keeps the iris control signal a1 from the iris control signal generation circuit 2 as it is.
1 is supplied to the lens 1, and the iris control signal for fixing the iris of the lens in the open state when the high sensitivity mode determination signal indicates the high sensitivity mode is supplied to the lens 1 as the iris control signal p1. Lens 1
The iris control signal p1 from the iris control signal control circuit 11 adjusts the iris of the lens 1 to control the amount of the imaging light b1 passing therethrough.

The signal processing circuit 5 performs analog signal processing on the CCD output signal i1 in which the field is interpolated to generate a video signal j1 and leads it to the video signal output terminal 9.

The operation in the normal mode of such an embodiment will be described.

When the level of the light incident on the lens 1 is sufficient in the normal mode, the exposure time control circuit 4 is initially set in the normal mode.
Therefore, the high sensitivity mode determination signal n1 from the exposure time control circuit 4 indicates the normal mode, and the iris control signal control circuit 11 controls the iris control signal a from the iris control signal generation circuit 2.
1 is directly supplied to the lens 1 as the iris control signal p1. As a result, the lens 1 is adjusted according to the level of light whose iris is incident on the lens 1, and the level of the video signal j1 guided to the video signal output terminal 9 is adjusted to an appropriate value.

When the level of the light incident on the lens 1 is switched from a sufficient state to an insufficient level in the normal mode, first, the exposure time control circuit 4 is initialized to the normal mode. Therefore, the exposure time control circuit 4
The high-sensitivity mode determination signal n1 from indicates the normal mode,
The iris control signal control circuit 11 supplies the iris control signal a1 from the iris control signal generation circuit 2 as it is to the lens 1 as the iris control signal p1 to adjust the iris of the lens 1. In this state, the signal processing circuit 5 CCD from
Since the output signal i1 falls below the reference value even if the iris of the lens 1 is completely opened, the iris of the lens 1 is completely opened. When the iris of the lens 1 is stabilized in a completely open state, the CCD output signal c1 is stabilized, so that the exposure time control circuit 4 causes the exposure time control signal d1 indicating that the exposure time is 4 fields.
Is generated and supplied to the CCD drive circuit 6, and at the same time, a high sensitivity mode determination signal n1 indicating the high sensitivity mode is supplied to the iris control signal control circuit 11. Then, the CCD drive circuit 6 controls the CCD 3 to operate in the exposure time of 4 fields. As a result, the video camera operates in the high sensitivity mode. Also, the iris control signal control circuit 11
Supplies an iris control signal for fixing the iris of the lens in an open state to the lens 1 as an iris control signal n1. As a result, the iris of the lens 1 is fixed in the open state.

According to such an embodiment, the iris of the lens 1 can be automatically and variably adjusted in the normal mode, and the iris of the lens can be fixed in the open state in the high sensitivity mode. Therefore, hunting in the high sensitivity mode is possible. And the image can be stabilized by the video signal j1 displayed on the image display device such as a television receiver.

Although the exposure time in the high sensitivity mode is set to 4 fields in the embodiment of FIG. 1, another exposure time such as 2 fields or 5 fields may be used. Also,
The exposure time in the high-sensitivity mode is not limited to one type, but a plurality of types may be prepared so that the exposure can be performed with an appropriate exposure time corresponding to the CCD output signal c2.

[0040]

As described above, according to the present invention, 1
In the high-sensitivity mode in which the exposure time exceeds the field, the operation of the iris can be stabilized, so that hunting in the high-sensitivity mode can be prevented and the image of the video camera displayed on the image display device can be stabilized.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a video camera according to the present invention.

FIG. 2 is a block diagram showing a conventional video camera.

3 is a block diagram showing a CCD of the video camera of FIG.

4 is a timing chart explaining the operation of the conventional video camera of FIG.

5 is a block diagram showing an iris control circuit system of the video camera of FIG.

[Explanation of symbols]

 1 lens 2 iris control signal generation circuit 3 CCD 4 exposure time control circuit 6 CCD drive circuit 5 signal processing circuit 7 CDS circuit 11 iris control signal control circuit

Claims (1)

[Claims] 1. The charge of the photoelectric conversion unit is accumulated in the field to which the field shift pulse is not supplied, and the signal charge accumulated in the photoelectric conversion unit in the field to which the field shift pulse is supplied is transferred to the charge detection unit. , A solid-state imaging device that outputs this signal charge as an output signal by a charge detection unit, and allows light from the subject to pass in a state where the iris is adjusted to form an image of the subject on the photoelectric conversion unit of the solid-state imaging device A lens; an exposure time control circuit for setting an exposure time; a solid-state image sensor drive circuit for supplying a field shift pulse whose period is set based on the setting of the exposure time control circuit to the solid-state image sensor; To the output signal from the field shift pulse, the field shift pulse is supplied to the field signal. An interpolator for interpolating a field to which no shift pulse is supplied, and an iris control signal generator for generating an iris control signal for controlling the iris of the lens in response to the output signal from the solid-state image sensor The circuit and the path that supplies the iris control signal from this iris control signal generation circuit to the lens,
When the setting of the exposure time control circuit is 1 field, the iris control signal from the iris control signal generating circuit is directly supplied to the lens,
An iris control signal control circuit that supplies an iris control signal for opening the iris to the lens when the setting of the exposure time control circuit exceeds 1 field, and a predetermined value for the sample hold signal from the auto gain control circuit. And a video signal processing circuit that creates a video signal by performing the signal processing of 1.