JPH06276405A - Vertical size control circuit - Google Patents

Abstract

PURPOSE:To keep the vertical size to be constant as required by correcting a fluctuation of the vertical size caused by a fluctuation in an input vertical synchronizing signal in a linear scan monitor or the like. CONSTITUTION:The control circuit consists of a vertical sawtooth voltage generating circuit 1 generating a sawtooth wave voltage S2 synchronously with a vertical synchronizing signal S1, a peak level detection circuit 2 converting a peak level of the sawtooth wave voltage S2 into a DC voltage S3, a reference level generating circuit 3 outputting a reference DC voltage S4 corresponding to a set vertical size, a comparator circuit 4 comparing the peak level of the DC voltage S3 with the reference DC voltage S4 to provide a difference voltage signal S5, a polarity discrimination circuit 5 discriminating the sign of polarity of a difference between the peak level of the DC voltage S3 and the reference DC voltage S4 based on the difference voltage signal S5, a latch circuit 6 to provide a voltage signal output for holding a predetermined vertical size based on a discrimination signal from the polarity discrimination circuit 5 or in the absence of the vertical synchronizing signal and a sawtooth wave amplitude control circuit 7 controlling the vertical sawtooth wave voltage generating circuit 1 to keep the existing amplitude based on the voltage signal from the latch circuit 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vertical scan size in which a vertical synchronizing signal frequency of the synchronizing signal frequency is changed in a linear scan monitor or the like which uses various kinds of video signals having different synchronizing signal frequencies as an input source. The present invention relates to a vertical size control circuit which corrects the fluctuation of the above and maintains the required constant size.

[0002]

2. Description of the Related Art The vertical screen size of the linear scan monitor varies depending on the frequency of the vertical synchronizing signal of the input video signal, and in this case, the lower the frequency, the wider the vertical screen size. Therefore, the monitor side stores a microcomputer for selecting the vertical screen size according to the vertical synchronizing signal (frequency) and a signal for controlling the vertical screen size control circuit used to set the selected vertical screen size. And a vertical screen size is kept constant by the control data of the memory.

[0003]

Therefore, in the past, a microcomputer and a memory were required, which was expensive in price. Further, since memory data is used, there is a drawback that it is vulnerable to noise and the like. An object of the present invention is to provide a vertical size control circuit which maintains a constant vertical screen size without using a conventional microcomputer or memory.

[0004]

SUMMARY OF THE INVENTION The present invention is directed to a vertical sawtooth voltage generating circuit for generating a vertical sawtooth voltage in synchronization with an input vertical synchronizing signal, and a sawtooth voltage generated by the vertical sawtooth voltage generating circuit. A peak value detection circuit for detecting a peak value and converting it to a DC voltage corresponding to the peak value; and a reference level generation circuit for outputting a reference DC voltage corresponding to the peak value of the sawtooth wave voltage required for setting a required vertical size. A comparison circuit that compares the peak value DC voltage from the peak value detection circuit with the reference DC voltage and outputs a difference voltage signal between them, and a reference DC of the peak value DC voltage from the difference voltage signal from the comparison circuit. A polarity discriminating circuit that discriminates high or low polarity or equivalent polarity with respect to voltage and outputs a first discriminating signal and a second discriminating signal, and a voltage signal based on the first and second discriminating signals from the polarity discriminating circuit. To A holding circuit that applies a force, and when the peak value DC voltage is higher than the reference DC voltage based on a voltage signal from the holding circuit, the amplitude of the vertical sawtooth wave voltage is reduced, and when the peak value DC voltage is low, the amplitude is increased. Further, the present invention provides a vertical size control circuit constituted by a sawtooth amplitude control circuit for controlling the amplitude of the vertical sawtooth voltage generation circuit so as to maintain the current amplitude at the same time.

[0005]

The feedback control is performed so that the amplitude of the sawtooth voltage generated in synchronization with the input vertical synchronizing signal is corrected to the required size.
Therefore, the peak value of the generated sawtooth voltage is converted into a DC voltage, and the DC voltage is compared with a reference level (DC) corresponding to the required size and its polarity is determined. Based on the result of this determination, the amplitude of the sawtooth voltage is controlled to be the size of the reference level. Further, when the vertical synchronizing signal is not input, a voltage for setting a certain amplitude is generated and the constant amplitude is maintained by the feedback control action starting from this voltage.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A vertical size control circuit according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of essential parts showing an embodiment of a vertical size control circuit according to the present invention. In the figure, 1 is a sawtooth wave voltage S2 synchronized with the input vertical synchronization signal S1.
Is a vertical sawtooth voltage generating circuit for generating a capacitor C1 and 2 is a peak value detecting for detecting a peak value of the sawtooth voltage S2 generated by the sawtooth voltage generating circuit 1 and converting it to a DC voltage S3 corresponding to the peak value. Reference numeral 3 is a reference level generating circuit for outputting a reference DC voltage S4 corresponding to the peak value of the sawtooth voltage required for setting a required vertical size. Reference numeral 4 is the peak value DC voltage S3 from the peak value detecting circuit 2 and the reference. A comparison circuit 5 that compares the DC voltage S4 with each other and outputs it as a difference voltage signal S5 of both is a high or low or equivalent polarity of the peak value DC voltage S3 from the difference voltage signal S5 from the comparison circuit 4 to the reference DC voltage S4. Polarity determining circuit that determines the first determination signal S6 and the second determination signal S7, and 6 is based on the determination signals (S6, S7) from the polarity determination circuit 5 or the vertical synchronization signal S1.
Holding circuit for outputting a voltage signal S8 for holding a predetermined vertical size when there is no input, 7 is the holding circuit 6
When the peak value DC voltage S3 is higher than the reference DC voltage S4 based on the voltage signal S8, the amplitude of the vertical sawtooth voltage is reduced, when the voltage is low, the amplitude is increased, and when they are equivalent, the current amplitude is increased. The sawtooth amplitude control circuit controls the vertical sawtooth voltage generation circuit 1 with the amplitude control signal S9 so as to maintain the above condition.

Next, the operation of the present invention will be described. The peak value detection circuit 2 detects the peak value of the sawtooth voltage S2 generated in synchronization with the input vertical synchronizing signal S1 in the sawtooth voltage generation circuit 1. The amplitude of the sawtooth voltage S2 varies depending on the frequency of the vertical synchronizing signal S1, and the lower the frequency, the larger the amplitude. This amplitude variation eventually results in a variation in the vertical size of the image. Therefore, if the amplitude of the sawtooth wave voltage S2 is kept constant regardless of the synchronizing signal frequency, the vertical size becomes constant.
This is the purpose of the invention. The peak value is detected to detect the amplitude fluctuation of the sawtooth voltage S2 (peak value detection circuit 2). The peak value detection here is the detection of the peak of the sawtooth wave with respect to the ground. A concrete circuit configuration example of the peak value detection circuit 2 is shown in FIG.
It is composed of a and 2b, a transistor TR1, a resistor R1 and a capacitor C2. Then, a DC voltage corresponding to the peak of the sawtooth wave voltage S2 is generated at the emitter of TR1 by the smoothing action of R1 and C2. This DC voltage is output via the operational amplifier 2b (buffer amplifier) (peak value DC voltage S3).

The comparison circuit 4 compares the peak value DC voltage S3 and the reference DC voltage S4 and outputs the difference voltage between them, and a concrete circuit configuration example thereof is as shown in FIG. , Preamplifier 4b, etc. The output terminal of the operational amplifier 4a becomes a difference voltage between them, and the difference voltage is set to a required voltage by the preamplifier 4b (difference voltage S5). The differential voltage S5 is S3> S4,
There are three modes of S3 <S4, S3 = S4. The polarity discriminating circuit 5 discriminates which of the above three modes the differential voltage S5 is. The concrete circuit configuration example is as shown in the figure (indicated by 5), the NPN transistor TR2 and the PNP transistor TR.
3. Configure with ± power supply (+ Vc, -Vb) etc. When S5 becomes high, the collector current of TR2 increases, and when S5 becomes low, TR increases.
The emitter current of 3 increases. Therefore, for changes in S5,
The collector output S6 of TR2 (first determination signal) and the emitter output S7 of TR3 (second determination signal) increase or decrease in the opposite directions. There are also cases where S6 and S7 have the same voltage.

The first discrimination signal S6 and the second discrimination signal
A specific circuit configuration example of the holding circuit 6 to which S7 is input is constituted by transistors TR4, TR5, operational amplifier 6a, ± power supplies (+ Vc, -Vb), resistors, etc. The holding circuit 6 has two roles. One role is to produce one voltage change from S6 and S7. Since S6 and S7 change in opposite directions at the point where both have the same voltage, the collector currents of TR4 and TR5 also change accordingly. Therefore, the voltage change at the point V6a, where the collector currents of both TRs overlap, changes in magnitude between the constant voltage corresponding to (S6 = S7) (S3> S4) (S3 <S
Four). This voltage is set to a predetermined level by the operational amplifier 6a and sent to the sawtooth wave amplitude control circuit 7 (S8).

Another role is to maintain the vertical size when the vertical synchronizing signal S1 is not input. Even when there is no vertical synchronizing signal S1, a constant voltage (V6a) determined by (+ Vc) and (-Vb) and the resistance between them is applied to the input terminal (+ terminal) of the operational amplifier 6a. The stable state is maintained by this feedback loop system starting from this voltage. The sawtooth wave amplitude control circuit 7 to which the voltage signal S8 from the holding circuit 6 is input controls the amplitude of the sawtooth wave voltage generated by the sawtooth wave generation circuit 1 based on S8. A concrete configuration example thereof is configured by an operational amplifier 7a, a transistor TR6 and the like as shown in the drawing (indicated by reference numeral 7). Voltage signal S8
Based on the above, the collector current (or voltage) of TR6 is changed to increase / decrease the sawtooth wave amplitude of the sawtooth wave generating capacitor C1. This control suppresses the vertical sync signal S1 when it becomes low and the sawtooth amplitude of C1 becomes large (S3> S4 ~ vertical size), and conversely makes the sawtooth amplitude small (S3 <S4 ~ vertical Even when the size becomes small, it is suppressed so that the amplitude is always constant (constant vertical size). This constant amplitude is the vertical size with respect to the reference DC voltage S4. The reference DC voltage S4 can be arbitrarily changed by the input from the external setting input 8. In this case, the vertical size is a size based on the newly set variable reference DC voltage S4.

[0011]

As described above, according to the present invention, it is possible to correct a vertical size variation due to a change in vertical synchronizing signal frequency and maintain a constant size without providing a microcomputer and a memory as in the prior art. You can As a result,
The circuit configuration can be made inexpensive, and the size to be set can be arbitrarily adjusted.

[Brief description of drawings]

FIG. 1 is a block diagram of essential parts showing an embodiment of a vertical size control circuit according to the present invention.

[Explanation of symbols]

 1 vertical sawtooth voltage generation circuit 2 peak value detection circuit 3 reference level generation circuit 4 comparison circuit 5 polarity determination circuit 6 holding circuit 7 sawtooth amplitude control circuit 8 external setting input S1 input vertical synchronization signal S2 vertical sawtooth voltage S3 peak value DC voltage S4 Reference DC voltage S5 Differential voltage signal S6 First discrimination signal S7 Second discrimination signal S9 Amplitude control signal

Claims (2)

[Claims] 1. A vertical sawtooth voltage generating circuit for generating a vertical sawtooth voltage in synchronization with an input vertical synchronizing signal, and a peak value of the sawtooth voltage generated by the vertical sawtooth voltage generating circuit is detected, and the peak value is detected. A peak value detecting circuit for converting into a DC voltage corresponding to the value, a reference level generating circuit for outputting a reference DC voltage corresponding to the peak value of the sawtooth voltage required for the required vertical size setting, and the peak value detecting circuit. A comparison circuit that compares the peak value DC voltage with the reference DC voltage and outputs a difference voltage signal between them, and a polarity of the high or low with respect to the reference DC voltage of the peak value DC voltage from the difference voltage signal from the comparison circuit. A polarity determination circuit that outputs a first determination signal and a second determination signal, a holding circuit that outputs a voltage signal based on the first and second determination signals from the polarity determination circuit, Protection Based on the voltage signal from the holding circuit, when the peak value DC voltage is higher than the reference DC voltage, the amplitude of the vertical sawtooth wave voltage is reduced, when it is low, the amplitude is increased, and when they are equivalent, the current amplitude is changed. A vertical size control circuit comprising a sawtooth amplitude control circuit for controlling the amplitude of the vertical sawtooth voltage generation circuit so as to maintain it. 2. The vertical size control circuit according to claim 1, wherein the reference DC voltage output from the reference level generation circuit can be set arbitrarily.