JPH06273481A - Latch-up detection circuit - Google Patents
Latch-up detection circuitInfo
- Publication number
- JPH06273481A JPH06273481A JP5060636A JP6063693A JPH06273481A JP H06273481 A JPH06273481 A JP H06273481A JP 5060636 A JP5060636 A JP 5060636A JP 6063693 A JP6063693 A JP 6063693A JP H06273481 A JPH06273481 A JP H06273481A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- voltage
- latch
- ics
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Logic Circuits (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は集積回路が放射線による
故障モードであるシングルイベントアップセット(SE
U)のうち集積回路の電源ピン間が短絡モードになるラ
ッチアップを検出するラッチアップ検出回路に関する。BACKGROUND OF THE INVENTION The present invention relates to a single event upset (SE) in which an integrated circuit is in a radiation failure mode.
Of U), it relates to a latch-up detection circuit for detecting a latch-up in which a power supply pin of an integrated circuit is in a short circuit mode.
【0002】[0002]
【従来の技術】集積回路(IC:Integrated Circuit)
は宇宙用電子機器として数多く使用されている。宇宙空
間は地上と比べ放射線が極めて強い。CMOS IC等
の集積回路は高エネルギーの放射線を受けると故障が生
じ、誤動作をする。その故障モードの1つに短絡を生
じ、大きな電流が流れるラッチアップがある。2. Description of the Related Art Integrated circuits (ICs)
Is widely used as a space electronic device. Radiation is much stronger in outer space than on the ground. When an integrated circuit such as a CMOS IC receives high-energy radiation, it fails and malfunctions. One of the failure modes is a latch-up in which a short circuit occurs and a large current flows.
【0003】[0003]
【発明が解決しようとする課題】ラッチアップが生じる
と集積回路に大きな電流が流れ、破壊するので、各集積
回路には電源と直列に過電流防止用の抵抗を入れ、集積
回路を保護している。しかし、ラッチアップが発生する
と集積回路は誤動作をするが、従来は集積回路を保護す
るだけでラッチアップの発生を検出していないため、集
積回路に誤動作が発生しても、その原因が認識されず、
回路全体としての適切な保護がなされていなかった。When latch-up occurs, a large current flows in the integrated circuit and destroys it. Therefore, each integrated circuit is provided with a resistor for preventing overcurrent in series with the power supply to protect the integrated circuit. There is. However, when latch-up occurs, the integrated circuit malfunctions, but in the past, because the integrated circuit was only protected and the occurrence of latch-up was not detected, the cause could be recognized even if the integrated circuit malfunctioned. No
Appropriate protection was not provided for the entire circuit.
【0004】本発明は上述の問題点に鑑みてなされたも
ので、複数の集積回路のラッチアップを簡単な回路で検
出することのできるラッチアップ検出回路を提供するこ
とを目的とする。The present invention has been made in view of the above problems, and an object of the present invention is to provide a latch-up detection circuit capable of detecting latch-up of a plurality of integrated circuits with a simple circuit.
【0005】[0005]
【課題を解決するための手段】上記目的を達成するた
め、本発明は電源に対して並列にそれぞれ第1抵抗を介
して電源端子を接続し、アース端子を接地した複数の集
積回路と、電源に接続した第2抵抗の反電源端を検出端
とし、この検出端よりそれぞれの前記集積回路の電源端
子にカソード側を接続し、アノード側をこの検出端に接
続するダイオードをそれぞれ接続したものである。To achieve the above object, the present invention provides a plurality of integrated circuits each having a power supply terminal connected in parallel to a power supply via a first resistor and having a ground terminal grounded, and a power supply. The anti-power supply end of the second resistor connected to the detection end is used as a detection end, and the cathode side is connected to the power supply terminal of each integrated circuit from this detection end, and the diode connecting the anode side to this detection end is connected. is there.
【0006】[0006]
【作用】集積回路が高エネルギーの放射線を受け、ラッ
チアップが発生するとその集積回路はアースと短絡し、
大電流が流れるが、第1抵抗により電圧降下が生じ集積
回路の電源端子電圧は0になる。すると集積回路の電源
端子にカソード側を接続しているダイオードに順方向に
電圧が加わることになり、ダイオードに電流が流れ、検
出端の電圧はローレベルになる。いずれの集積回路にも
短絡が生じない時の検出端の電圧は電源電圧と同じハイ
レベルであるので、検出端の電圧がハイレベルよりロー
レベルになったときをラッチアップ検出信号として出力
する。これにより本検出回路は、接続されたいずれかの
集積回路にラッチアップが発生したことを検出すること
ができる。When the integrated circuit receives high-energy radiation and latch-up occurs, the integrated circuit is short-circuited to the ground,
Although a large current flows, a voltage drop occurs due to the first resistance and the power supply terminal voltage of the integrated circuit becomes zero. Then, a voltage is applied in the forward direction to the diode connecting the cathode side to the power supply terminal of the integrated circuit, a current flows through the diode, and the voltage at the detection end becomes low level. The voltage at the detection end when no short circuit occurs in any of the integrated circuits is at the same high level as the power supply voltage, so that when the voltage at the detection end becomes lower than the high level, it is output as a latch-up detection signal. As a result, the detection circuit can detect that latchup has occurred in any of the connected integrated circuits.
【0007】[0007]
【実施例】以下、本発明の実施例を図面を参照して説明
する。図1は本発明の実施例のラッチアップ検出回路図
である。CMOS IC等の集積回路1はその電源端子
を抵抗2(R1)に接続し、アース端子を接地する。抵
抗2は集積回路1がラッチアップにより短絡したときに
電源(+Vcc)より流れ込む電流を制限して集積回路
1を保護する。各集積回路1は抵抗2を介して並列に電
源(+Vcc)に接続される。集積回路1の電源端子と
アース端子間にはコンデンサ3を接続し、正常動作時に
集積回路が発生させる高周波のノイズを小さくして回路
全体をノイズから保護する。電源(+Vcc)には抵抗
4(R2)を接続し、この抵抗4の反電源端を検出端6
とし、この検出端6と、各集積回路1の電源端子間に、
カソードを電源端子側にしてダイオード5をそれぞれ接
続する。Embodiments of the present invention will be described below with reference to the drawings. 1 is a latch-up detection circuit diagram of an embodiment of the present invention. The integrated circuit 1 such as a CMOS IC has its power supply terminal connected to the resistor 2 (R1) and its ground terminal grounded. The resistor 2 protects the integrated circuit 1 by limiting the current flowing from the power source (+ Vcc) when the integrated circuit 1 is short-circuited due to latch-up. Each integrated circuit 1 is connected in parallel via a resistor 2 to a power source (+ Vcc). A capacitor 3 is connected between the power supply terminal and the ground terminal of the integrated circuit 1 to reduce high frequency noise generated by the integrated circuit during normal operation and protect the entire circuit from noise. A resistor 4 (R2) is connected to the power source (+ Vcc), and the opposite power source end of the resistor 4 is connected to the detection end 6
Between the detection terminal 6 and the power supply terminal of each integrated circuit 1,
The diodes 5 are connected with the cathodes on the power supply terminal side.
【0008】次に動作について説明する。集積回路1が
全て正常に動作している場合は集積回路1の電源端子は
ほぼ電源電圧(+Vcc)であり、検出端6の電圧も電
源電圧である。集積回路1が高エネルギーの放射線を受
け、1つまたは2つ以上の集積回路1にラッチアップが
生じると、その集積回路1に短絡が生じ、集積回路1の
電源端子はアース電位となる。このためダイオードに順
電圧が加わり、電流が流れ、検出端6の電位もアース電
位となる。これにより検出端6は電源電圧のハイレベル
からアース電位のローレベルに変化し、これがラッチア
ップ検出信号として出力される。また、検出端6がロー
レベルになっても、他のラッチアップの生じていない集
積回路1の電源端子の電圧は、この集積回路1に接続さ
れているダイオードに逆電圧が加わるため低下せず正常
動作を続けることができる。Next, the operation will be described. When all the integrated circuits 1 are operating normally, the power supply terminal of the integrated circuit 1 is almost the power supply voltage (+ Vcc), and the voltage of the detection terminal 6 is also the power supply voltage. When the integrated circuit 1 receives high-energy radiation and one or more integrated circuits 1 are latched up, a short circuit occurs in the integrated circuit 1 and the power supply terminal of the integrated circuit 1 becomes the ground potential. Therefore, a forward voltage is applied to the diode, a current flows, and the potential of the detection end 6 also becomes the ground potential. As a result, the detection terminal 6 changes from the high level of the power supply voltage to the low level of the ground potential, and this is output as the latch-up detection signal. Even if the detection terminal 6 becomes low level, the voltage of the power supply terminal of the other integrated circuit 1 in which latch-up does not occur does not decrease because the reverse voltage is applied to the diode connected to this integrated circuit 1. Normal operation can be continued.
【0009】ラッチアップは放射線によって発生すると
したが、集積回路の種類によっては放射線がなくてもラ
ッチアップを発生するものがあり、このような場合も本
発明の回路を適用できる。また本回路は1つのラッチア
ップ検出回路で複数の集積回路をモニタすることがで
き、回路構成部品も1つの抵抗(R2)と集積回路1と
同数のダイオード5で済むため、低コスト、高信頼性を
実現できる。Although latch-up occurs due to radiation, there are some integrated circuits that cause latch-up even without radiation, and the circuit of the present invention can be applied to such cases as well. In addition, this circuit can monitor a plurality of integrated circuits with one latch-up detection circuit, and only one resistor (R2) and the same number of diodes 5 as the integrated circuits 1 can be used as circuit components, so that low cost and high reliability are achieved. Can be realized.
【0010】[0010]
【発明の効果】以上の説明から明らかなように本発明
は、各集積回路の電源端子にそれぞれダイオードのカソ
ード側を接続しアノード側を1つの抵抗に接続し、この
接続点を検出端とし、この抵抗の反検出端を電源に接続
してラッチアップ検出回路を構成しているので、いずれ
の集積回路にラッチアップが発生してもこれを正確に検
出することができる。また回路構成が簡単なので信頼性
が高く、コストも安価となる。As is apparent from the above description, according to the present invention, the cathode side of the diode is connected to the power supply terminal of each integrated circuit, and the anode side is connected to one resistor. Since the anti-detection end of this resistor is connected to the power supply to form the latch-up detection circuit, it is possible to accurately detect which latch-up occurs in which integrated circuit. Further, since the circuit configuration is simple, the reliability is high and the cost is low.
【図1】本発明の実施例のラッチアップ検出回路図であ
る。FIG. 1 is a latch-up detection circuit diagram of an embodiment of the present invention.
1 集積回路 2,6 抵抗 3 コンデンサ 5 ダイオード 6 検出端 1 Integrated circuit 2, 6 Resistance 3 Capacitor 5 Diode 6 Detection end
Claims (1)
介して電源端子を接続し、アース端子を接地した複数の
集積回路と、電源に接続した第2抵抗の反電源端を検出
端とし、この検出端よりそれぞれの前記集積回路の電源
端子にカソード側を接続し、アノード側をこの検出端に
接続するダイオードをそれぞれ接続したことを特徴とす
るラッチアップ検出回路。1. A plurality of integrated circuits each having a power supply terminal connected in parallel to a power supply via a first resistor and having a ground terminal grounded, and an anti-power supply end of a second resistor connected to the power supply as a detection end. A latch-up detection circuit is characterized in that a cathode side is connected to a power supply terminal of each of the integrated circuits from the detection end, and a diode that connects an anode side to the detection end is connected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5060636A JPH06273481A (en) | 1993-03-19 | 1993-03-19 | Latch-up detection circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5060636A JPH06273481A (en) | 1993-03-19 | 1993-03-19 | Latch-up detection circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH06273481A true JPH06273481A (en) | 1994-09-30 |
Family
ID=13148007
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5060636A Pending JPH06273481A (en) | 1993-03-19 | 1993-03-19 | Latch-up detection circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH06273481A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1811568A1 (en) * | 2006-01-24 | 2007-07-25 | Stmicroelectronics Sa | Device for protecting an integrated circuit against latch-up phenomena |
JP2015061508A (en) * | 2013-09-17 | 2015-03-30 | ザ・ボーイング・カンパニーTheBoeing Company | High current event mitigation circuit |
-
1993
- 1993-03-19 JP JP5060636A patent/JPH06273481A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1811568A1 (en) * | 2006-01-24 | 2007-07-25 | Stmicroelectronics Sa | Device for protecting an integrated circuit against latch-up phenomena |
US7692906B2 (en) | 2006-01-24 | 2010-04-06 | Stmicroelectronics Sa | Device for protecting an integrated circuit against latch-up phenomena |
JP2015061508A (en) * | 2013-09-17 | 2015-03-30 | ザ・ボーイング・カンパニーTheBoeing Company | High current event mitigation circuit |
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