JPH06268714A - Data transmission system - Google Patents

Abstract

PURPOSE:To provide a data transmission system whose algorithm is simplified concerning the data transmission system in a communiations network, etc. CONSTITUTION:In the data transmission system, a network management equipment 11 and plural terminals 121, 122,... are connected via a control command line 13 and a response data line 14 and at the time of requiring data from the network management equipment to an optional terminal by a control command, data is sent back by response data composed of the same format as the control command from the terminal. In this case, each terminal is provided with a shift register comosed of plural registers 41 to 43 connected in serial so as to successively hold the control command received by each register by each bit and to change the contents of each bit to prepare responce data to send it back.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmission system in a communication network or the like, and more particularly to a data transmission system in which an algorithm between devices is simplified.

In a communication network or the like, a data transmission system is used in which each terminal returns response data in response to a control command from a network management device for the purpose of collecting data in a plurality of terminals.

In such a data transmission system, in order to facilitate high-speed data transfer and large-capacity data transfer, it is desired to simplify the algorithm between the devices.

[0004]

2. Description of the Related Art FIG. 5 shows a schematic structure of a data transmission system, in which 11 is a network management device.
12 _1, 12 _2, ... Are a plurality of terminals. Further, 13 is a control command line for transmitting a control command from the network management device 11 to each terminal 12 _1, 12 _2, ..., 14 is a response from each terminal 12 _1, 12 _2, ... To the network management device 11. It is a response data line for transmitting data.

When requesting data from an arbitrary terminal, the network management device 11 sends a control command with a terminal ID to each terminal via the control command line 13, and each terminal receives the control command. 12 _1, 1
2 _2, ... Receives this.

Each terminal 1 that has received the control command
2 _1, 12 _2, ... Decode the control command, and if the command is not for the own station, change the ID to the ID of the own station and return the response data. The network management device 11 receives desired data by selecting and receiving the response data from the designated terminal among the response data of each terminal.

FIG. 6 shows the frame format of a transmission signal, and the control command and response data have the same frame format. The head data consists of a specific code such as “10”,
Indicates the beginning of the transmission signal. The terminal ID is an identification code of a predetermined bit indicating a terminal that is a destination or a transmission source. Data is added after these, and the total number of bits is fixed.

FIG. 7 shows a conventional data transmission system, in which 21 is an S / P converter for converting serial data into parallel data, and 22 _1, 22 _2, 22 ₃ latch received data. Flip-flop (FF), 23 is an internal comparison unit that makes a condition determination of received data, 24 is a status notification unit that notifies the response data transmission unit of the result of the received data condition determination, and 25 is a data process that performs internal processing on the received data. Parts, which form the control command processing unit 26.

Reference numeral 31 is a P / S conversion unit for converting parallel data into serial data, 32 is a flip-flop (FF) for latching transmission data, and 33 is a response timing generation unit for determining the transmission timing of the response data. These form the response data output unit 34.

In the control command processing unit 26, the S / P conversion unit 21 receives the control command consisting of serial data from the network management device, performs S / P conversion, and converts the obtained parallel data into
Each bit size required for the output terminals QA, QB, QC is cut out and passed through FFs 22 _1, 22 _{2 and} 22 ₃ , respectively,
The data is output to the internal comparison unit 23, the status notification unit 24, and the data processing unit 25.

The internal comparison unit 23 determines the conditions such as the leading bit and ID in the received data and notifies the internal processing unit that performs internal processing in the terminal. The status notification unit 24
The response data notifies the network management device of the difference between the ID of the received data and the own station ID, or that the received data is not addressed to the own station. Data processing unit 2
5 performs internal processing of data destined for its own station.

In the response data output section 34, P
When the series of processes for the received data is completed, the / S converter 31 outputs the FF 22 if the data is not addressed to itself.
The outputs of _1, 22 _{2 and} 22 ₃ are received in parallel from the input terminals DI, converted into serial data, and output from the output terminal Q to the network management device. In the case of the data destined for the own station, the data created corresponding to the control command is output together with the head bit, ID and the like.

When a plurality of systems of the same type are connected, there is information to be notified to another system, or there is information to be notified to all other terminals in the same system. At this time, these are taken into the FF 32 as inter-system communication information in response to the take-in enable, inputted into the P / S conversion section 31 via the input terminal DI, and transmitted to the network management apparatus, thereby transmitting the network management apparatus. Then, the required notification can be given.

The response timing generation unit 33 uses P /
The S converter 31 supplies a timing signal necessary for converting parallel data into serial data. The timing signal from the response timing generator 33 is also used when the control command is fetched by the S / P converter 21.

[0015]

In the conventional data transmission method, in order to perform S / P conversion on an input control command or P / S conversion on response data to be output, It was necessary to internally generate the necessary timing signals, and therefore a timing generation section was required. Further, it is necessary to separately provide a control command processing unit on the input side and a response data output unit on the output side.

For this reason, the circuit structure becomes complicated, and at the output side, the response data cannot be sent out until the response data to be sent out have all the data to be taken in, and the response becomes slow. There was a problem.

The present invention is intended to solve such a problem of the prior art, and a circuit for processing a control command on the input side and a circuit for assembling response data on the output side are common. In addition, it is an object of the present invention to provide a data transmission method capable of performing the same data transmission as in the past by only creating the timings of fetching and sending by configuring the shift register and the selector.

[0018]

[Means for Solving the Problems] (1) The present invention is a control command line 1 for transmitting a control command.
3 and a response data line 14 for transmitting response data, the network management device 11 and a plurality of terminals 12 _1, 122 _2, ... Are connected, and data is transmitted from the network management device to an arbitrary terminal by a control command. When a request is made, each terminal of the system that returns data from the terminal in response data having the same format as the control command is provided with a shift register consisting of a plurality of serially connected registers 41, 42, 43. Holds the control command received in sequence bit by bit,
The contents of each bit are changed to create response data and the response data is returned.

(2) The present invention relates to (1), wherein each register 4
1, 42 and 43 have means for shifting the held data to the subsequent stage and means for fetching and holding external data instead of the held data.

(3) In addition, in the present invention according to (2), the selectors 44, 44 are provided in the middles of the respective registers 41, 42, 43.
45 is provided so that the data held in each register can be changed according to the operation mode.

(4) Further, in the present invention according to (3), the selectors 44 and 45 feed back the output of the subsequent register to the input thereof, and the mode of inputting the output of the register of the previous stage to the register of the subsequent stage, And a mode for inputting a fixed value to a subsequent register.

[0022]

[Operation] (1) FIG. 1 shows the principle of the present invention. In the communication system to which the present invention is applied, the network management device 11 is provided via a control command line 13 for transmitting a control command and a response data line 14 for transmitting response data.
, And a plurality of terminals 12 _1, 122 _2, ... Are connected, and when the network management device requests data from a terminal using a control command, the terminal sends response data in the same format as the control command. It is designed to send back data.

In this case, each terminal is provided with a shift register consisting of a plurality of serially connected registers 41, 42 and 43, which holds the control command received in each register in sequence for each bit and Change the contents of to create response data and send it back.

As described above, in the data transmission system of the present invention,
The circuit for inputting and processing the control command and the circuit for creating and outputting the response data are common, and the control data can be handled in common. Therefore, the circuit configuration is simplified and the control is facilitated.

(2) In this case, each register 41, 42, 4
3 operates as a shift register by including means for shifting the held data to the subsequent stage, and
External data may be taken in and held instead of the held data, and response data can be created by this.

(3) In the case of (2), each register 41,
It is also possible to provide selectors 44 and 45 in the middle of 42 and 43 respectively so that the data held in each register can be changed according to the operation mode, whereby the response data of the control command can be changed according to the mode of the control command. Handling can be varied.

(4) In the case of (3), the selectors 44, 4
Depending on the mode in which the output of the subsequent register is fed back to its input, 5 can retain the contents of that register. Further, the selectors 44 and 45 can shift the data in the register in the previous stage to the register in the subsequent stage depending on the mode in which the output of the register in the previous stage is input to the register in the subsequent stage. Further, depending on the mode in which a fixed value is input to the subsequent register, the contents of that register can be fixed to a specific value.

[0028]

FIG. 2 shows the configuration of an embodiment of the present invention. 41, 42 and 43 are registers for latching, shifting and loading data, and 44 and 45 are registers 42 and 43. It is a selector that selects an input.

The registers 41, 42 and 43 are connected to the input terminal D.
Data in each bit, and shift signals SIFT1, SIFT at the shift terminal SIFT.
2, when SIFT3 is "1", it operates as a shift register and data can be sequentially shifted according to the clock CLK. Further, input signals DIN1, DIN2, DIN3 from the outside at the input terminal DIN are transferred to load signals LOAD1, LOAD at the load terminal LOAD.
2, can be loaded according to LOAD3.

Further, the selectors 44 and 45 have the selection signal SE.
Depending on L1 and SEL2, it is possible to select and output any of the inputs at the selected positions A, B and C. In the state of the input A, the output of the own stage is fed back to the input to hold the data, and in the state of the input B, the output data of the register of the previous stage is input to the register of the next stage. Further input C
In this state, a specific signal such as "0" level can be set in the corresponding register.

FIG. 3 is a diagram for explaining an example of the operation of the circuit of FIG. 2, in which (a), (b), (c) and (d) represent the respective bits b1 and b2 in the operation steps ,. , B
The state of 3 is shown. 4 shows the state of each control signal in the operation example of FIG.

In the operation step, a control command is fetched from the network management device. In this case, the shift signal SIFT of each register 41, 42, 43
By setting all 1, SIFT2 and SIFT3 to "1" and setting the selection signals SEL1 and SEL2 to B, the control command is sequentially shifted and held in each register. Now, as data of each bit, b1, b2,
It is assumed that “111” is captured in b3. At this time,
Since it is not necessary to load the external input, the load signals LOAD1, LOAD2 and LOAD3 for each register are all set to "0".

In the operation step, bit b2 is forcibly fixed to "1" in order to create response data. In this case, since the data is not shifted, the shift signals SIFT1, SIFT2, SIFT
By setting all 3s to "0" and setting the selection signal SEL1 to C, the register 42 is forcibly set to "0".
Is set and the selection signal SEL2 is set to A, whereby the data "1" of the shift register 43 is held. At this time, since the external input is not loaded, the load signals LOAD1, LOAD2, and
LOAD3 is all set to "0".

In the operation step, the externally fetched data X is latched in the response data b3. In this case, since the data is not shifted, the shift signals SIFT1, SIFT2 and SIFT3 are all set to "0" and the selection signal SEL1 is set to A, whereby the data "0" in the register 42 is held.
Further, by setting the load signal LOAD3 to "1", the fetched data X from the outside at the input DIN3 is latched in the register 43 and the selection signal SE
The data X in the register 43 is held by setting L2 to A. At this time, since the external data is not taken into the registers 41 and 42, the load signals LOAD1 and LOAD2 are set to "0".

In the operation step, response data is sent to the network management device. In this case, the shift signals SIFT1, S1 of the registers 41, 42, 43
IFT2 and SIFT3 are all set to "1" and the selection signal S
By setting EL1 and SEL2 to B, each bit b
Data "10X" in 1, b2 and b3 are sequentially shifted and output. At this time, since the external input is not loaded, the load signal LOAD for each register is loaded.
1, LOAD2 and LOAD3 are all set to "0".

The control command has several kinds of modes depending on the operating state, and the handling of response data also changes depending on the mode. Therefore, the selector may operate in the following various cases.

At the selected position A, the contents of each register are latched when all the control commands have been fetched. At this time, the shift operation is also stopped. As a result, even if the control command fluctuates after the data is latched, it is possible to prevent the malfunction of the latch contents.

At the selected position B, when the control command is input and the response data is output, the data of the preceding stage is shifted to the following stage according to the shift signal.

At the selected position C, a fixed value is set. Depending on the control command mode, it may be necessary to set a fixed value at output. For example, in the case of the embodiment, "0" is set at the selected position C. Therefore, since "0" is input by selecting C except when the selected positions A and B are operating, LOAD
Even if there is a malfunction such as a signal, the influence on the response data to the next stage can be eliminated (when the network management device side is "1" active). For example, in FIG. 2, when the selector 45 and the subsequent elements are arithmetic units, the influence on the arithmetic can be prevented.

[0040]

As described above, according to the present invention, a circuit for inputting and processing a control command in a data transmission system in a communication network or the like,
Since the circuit for generating and outputting response data is common and the data for controlling can be handled in common, the circuit configuration is simplified and the control is easy.

[Brief description of drawings]

FIG. 1 is a diagram showing a principle configuration of the present invention.

FIG. 2 is a diagram showing a configuration of an exemplary embodiment of the present invention.

FIG. 3 is a diagram illustrating an operation example of the circuit of FIG.

FIG. 4 is a diagram showing a state of each control signal in the operation example of FIG.

FIG. 5 is a diagram showing a schematic configuration of a data transmission system.

FIG. 6 is a diagram showing a frame format of a transmission signal.

FIG. 7 is a diagram showing a conventional data transmission method.

[Explanation of symbols]

11 network management device 12 _1, 12 _2, ... terminal 13 control command line 14 response data line 41 register 42 register 43 register

Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location 8732-5K H04L 11/06

Claims (4)

[Claims] 1. A network management device (11) and a plurality of terminals (12 _1, 12) via a control command line (13) for transmitting a control command and a response data line (14) for transmitting response data.
_2, ...), and when data is requested from the network management device to any terminal by a control command, the terminal sends back data in response data in the same format as the control command. , A plurality of serially connected registers (41, 42,
43) A data transmission system characterized by comprising a shift register consisting of 43), holding the control command received in each register in sequence for each bit, and changing the contents of each bit to create response data and returning it. . 2. The registers (41, 42, 43)
2. The data transmission system according to claim 1, further comprising means for shifting the held data to a subsequent stage, and means for fetching and holding external data instead of the held data. 3. The data transmission system according to claim 2, wherein a selector (44, 45) is provided in the middle of each of the registers (41, 42, 43) and is held in each register according to an operation mode. A data transmission method characterized in that the data to be changed can be changed. 4. A mode in which the selector (44, 45) feeds back the output of the subsequent register to its input, and a mode in which the output of the register in the previous stage is input to the register in the subsequent stage.
4. The data transmission method according to claim 3, further comprising a mode of inputting a fixed value to a subsequent register.