JPH06268251A - Semiconductor light-emitting element and light-emitting device - Google Patents

Semiconductor light-emitting element and light-emitting device

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Publication number
JPH06268251A
JPH06268251A JP5074093A JP5074093A JPH06268251A JP H06268251 A JPH06268251 A JP H06268251A JP 5074093 A JP5074093 A JP 5074093A JP 5074093 A JP5074093 A JP 5074093A JP H06268251 A JPH06268251 A JP H06268251A
Authority
JP
Japan
Prior art keywords
substrate
light emitting
polycrystalline
semiconductor
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5074093A
Other languages
Japanese (ja)
Inventor
Hisao Nagata
久雄 永田
Shuhei Tanaka
修平 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Sheet Glass Co Ltd
Original Assignee
Nippon Sheet Glass Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Sheet Glass Co Ltd filed Critical Nippon Sheet Glass Co Ltd
Priority to JP5074093A priority Critical patent/JPH06268251A/en
Publication of JPH06268251A publication Critical patent/JPH06268251A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To form semiconductor light-emitting elements, which are half as long in distance between light emitting points as conventional ones and easily aligned, on an amorphous substrate cheap and large in area. CONSTITUTION:A P-N junction is formed inside polycrystalline compound semiconductors 3 and 4 formed on both the sides of an amorphous substrate 1 through a crystal growth method. The semiconductors 3 and 4 are formed into LEDs 20 of mesa structure arranged in an array, and a current is injected into LEDs 20 of mesa structure to enable LEDs 20 on both the sides of a quartz glass substrate 1 to emit light.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、プリンタ、カラーディ
スプレイ、イメージセンサ等に用いるLEDの用途に使
用できる注入型の半導体発光素子に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an injection type semiconductor light emitting device that can be used for LEDs used in printers, color displays, image sensors and the like.

【0002】[0002]

【従来の技術】発光素子の代表的なものとしてLED(L
ight Emitting Diode)が知られている。LEDは化合物
半導体(GaAs、GaP、AlGaAs等)のpnま
たはpinの接合を形成し、これに順方向電圧を印加す
ることにより接合内部にキャリアを注入、その再結合の
過程で生じる発光現象を利用したものである。このよう
なLEDは従来、GaAsやInPなどの単結晶基板上
にGaAs、AlGaAs、InP、InGaAsPな
どそれぞれの基板に格子整合した化合物半導体をLPE
(liquid phase epitaxy)法、MOCVD(metal organic
chemical vapordeposition)法、VPE(vapor phase e
pitaxy)法、MBE(molecular beam epitaxy)法などの
結晶成長法を用いてエピタキシャル成長し、加工を施す
ことで製造されてきた。
2. Description of the Related Art LED (L
ight Emitting Diode) is known. The LED forms a pn or pin junction of a compound semiconductor (GaAs, GaP, AlGaAs, etc.), applies a forward voltage to the junction, injects carriers into the junction, and utilizes the light emission phenomenon that occurs during the recombination process. It was done. Conventionally, such an LED has LPE made of a compound semiconductor such as GaAs, AlGaAs, InP, or InGaAsP, which is lattice-matched to each substrate, on a single crystal substrate such as GaAs or InP.
(liquid phase epitaxy) method, MOCVD (metal organic
chemical vapor deposition) method, VPE (vapor phase e
It has been manufactured by performing epitaxial growth using a crystal growth method such as a pitaxy) method and an MBE (molecular beam epitaxy) method and performing processing.

【0003】[0003]

【発明が解決しようとする課題】これらGaAsやIn
Pをはじめとする化合物半導体基板はSiなどに比べる
と高価であるため、この基板上に作製したデバイスの価
格を上昇させることになる。また、化合物半導体基板は
従来水平ブリッジマン法あるいは引き上げ法などによっ
て製造されているが、良質の大面積の基板を得ることは
困難である。たとえばGaAs基板の場合、直径が3イ
ンチまでのウエハが市販されているにすぎない。LED
プリンタやイメージセンサ用のLEDアレイは、10c
m以上の長さが必要である。そこで微細なチップ(アレ
イ)を並べアライメントすることで、必要とするサイズ
に適したアレイが作製されてきた。またプリンタではド
ット間隔、イメージセンサでは分解能を決める各LED
間の間隔は、おおむねキャリアの拡散長以上である。微
細加工技術を併用して各ビットの間隔を狭くすると、キ
ャリアが拡散し、目的のLEDビットのみを動作させる
ことが困難になってくる。
[Problems to be Solved by the Invention] These GaAs and In
Since compound semiconductor substrates such as P are more expensive than Si or the like, the cost of devices manufactured on this substrate will be increased. Further, the compound semiconductor substrate is conventionally manufactured by the horizontal Bridgman method, the pulling method, or the like, but it is difficult to obtain a high-quality large-area substrate. For GaAs substrates, for example, wafers with diameters up to 3 inches are only commercially available. LED
LED array for printer and image sensor is 10c
A length of m or more is required. Therefore, by aligning and aligning fine chips (arrays), an array suitable for a required size has been manufactured. Each LED determines the dot spacing in the printer and the resolution in the image sensor.
The distance between them is generally equal to or larger than the diffusion length of carriers. If the bit-to-bit spacing is narrowed by using the microfabrication technique together, carriers will be diffused and it will be difficult to operate only the target LED bit.

【0004】また、LEDを用いたマルチカラーディス
プレイは、発光波長の異なる発光ダイオードを並べるこ
とで製造されている。たとえば面発光型の赤と緑の2色
の発光ダイオードを一組としてセラミック多層配線基板
にダイボンドされて製造されている。そこで本発明の目
的は、従来の化合物半導体基板よりも安価に、大面積の
発光素子アレイを1枚の基板から切り出すことができ、
また、アライメントを容易に行うことができる発光素子
を提供することである。
A multi-color display using LEDs is manufactured by arranging light emitting diodes having different emission wavelengths. For example, it is manufactured by die-bonding a surface emitting type light emitting diode of two colors of red and green to a ceramic multilayer wiring board as a set. Therefore, an object of the present invention is to cut a large-area light emitting element array from a single substrate at a lower cost than a conventional compound semiconductor substrate,
Another object of the present invention is to provide a light emitting device that can be easily aligned.

【0005】[0005]

【課題を解決するための手段】本発明の上記目的は次の
構成によって達成される。すなわち、半導体材料がエピ
タルキシャル成長が生じない基板の両面に形成された多
結晶体もしくは多結晶膜であって、それぞれの多結晶体
もしくは多結晶膜内に少なくともpn接合、pin接合
を有し、p型半導体およびn型半導体にそれぞれ設けた
電極間に電流を流してpn接合、pin接合で発光させ
る半導体発光素子である。ここで、基板の両側でpn接
合、pin接合を形成する半導体材料のバンドギャッ
プ、あるいは発光メカニズムが異なり、発光波長が基板
に両側に設けた発光素子間で異なる構成としてもよい。
The above objects of the present invention can be achieved by the following constitutions. That is, the semiconductor material is a polycrystal or polycrystal film formed on both surfaces of a substrate in which epitaxial growth does not occur, and has at least a pn junction and a pin junction in each polycrystal or polycrystal film. , A p-type semiconductor and an n-type semiconductor, and a current is caused to flow between the electrodes to emit light at a pn junction and a pin junction. Here, the pn junction, the band gap of the semiconductor material forming the pin junction, or the light emitting mechanism may be different on both sides of the substrate, and the emission wavelength may be different between the light emitting elements provided on both sides of the substrate.

【0006】また、本発明の上記目的は次の構成によっ
ても達成される。すなわち、前記半導体発光素子をメサ
構造として並列状に配置し、それぞれのメサ構造を基板
両側で互いにずらして並ぶように配置した発光デバイス
である。
The above object of the present invention can also be achieved by the following configuration. That is, in the light emitting device, the semiconductor light emitting elements are arranged in parallel as a mesa structure, and the respective mesa structures are arranged so as to be offset from each other on both sides of the substrate.

【0007】本発明の特徴は前述のようにエピタキシャ
ル成長が生じない基板上に発光素子として機能する多結
晶半導体を形成することである。ここで、エピタキャル
成長が生じない基板は単結晶である必要はなく、アモル
ファス、多結晶構造の無機材料または金属材料からなる
か、または基板表面が多結晶、アモルファスあるいは単
結晶構造の無機材料または金属材料で覆われた材料から
なるものを使用できる。したがって、ガラス、セラミッ
ク等の材料が使用可能であるので、非常に広範囲のデバ
イス材料を利用することができる。
A feature of the present invention is to form a polycrystalline semiconductor functioning as a light emitting element on a substrate on which epitaxial growth does not occur as described above. Here, the substrate on which epitacal growth does not have to be a single crystal, and may be made of an amorphous or polycrystalline inorganic material or metal material, or the substrate surface may be a polycrystalline, amorphous or single crystal inorganic material or metal. It is possible to use a material which is covered with a material. Therefore, since a material such as glass or ceramic can be used, a very wide range of device materials can be used.

【0008】基板としてのガラスは石英ガラスの他に、
たとえば多成分系ガラス、結晶化ガラスなども用いるこ
とができる。種々の基板上にCVD法、スパッタ法ある
いは蒸着法などにより形成したSiO2をはじめとする
種々の酸化物膜、SiNなどの窒化物膜、あるいは半透
明金属薄膜などを用いても構わない。ただし光を基板側
にも取り出す場合には、出射光に対して基板が透明ある
いは半透明でなければならない。
The glass as the substrate is quartz glass,
For example, multi-component glass and crystallized glass can be used. Various oxide films such as SiO 2 formed on various substrates by the CVD method, the sputtering method, the vapor deposition method or the like, a nitride film such as SiN, or a semitransparent metal thin film may be used. However, when the light is also extracted to the substrate side, the substrate must be transparent or semitransparent to the emitted light.

【0009】また、発光素子としてはGaAs、AlG
aAs、InP、InGaAsP、ZnS、ZnSe、
CdTeなどpn接合、pin接合をもつ種々の半導体
材料を用いることができる。また、発光素子の成長法は
MOCVD法、MBE法やVPE法なども用いることが
できる。
As the light emitting element, GaAs or AlG is used.
aAs, InP, InGaAsP, ZnS, ZnSe,
Various semiconductor materials having a pn junction or a pin junction such as CdTe can be used. Further, as a growth method of the light emitting element, MOCVD method, MBE method, VPE method, or the like can be used.

【0010】[0010]

【作用】本発明を実施するにあたり、最も大きな問題は
アモルファス、セラミック、多結晶等のエピタキシャル
成長が生じない基板上にサイズの大きなグレインからな
る多結晶膜を作製することにある。サイズの大きなグレ
インが形成できれば、半導体発光素子として機能させる
ことができる。アモルファス、セラミックあるいは多結
晶の基板、もしくは基板の結晶構造が作製する半導体材
料とは異なる単結晶基板、あるいは結晶構造が同じであ
っても格子定数に大きな差がある基板上には、基板全面
にわたる結晶のエピタキシャル成長は起こらない。しか
しながら成長初期に基板上に生じる微結晶が結晶核とて
作用し、核が成長して多結晶の膜となる。多結晶膜の各
グレインのサイズがデバイスサイズよりも大きければ、
その多結晶膜上に作製したデバイスは単結晶デバイスと
同程度の特性が得られることになる。したがって従来の
化合物半導体基板よりも安価な基板を用いて半導体発光
デバイスを供給することが可能となる。さらに、アモル
ファス基板として代表的なガラスは大面積のものが容易
に入手できることから、これまで基板サイズで制限され
てきたデバイスのサイズを大幅に増大させることが可能
となる。
In carrying out the present invention, the biggest problem is to prepare a polycrystalline film of large size grains on a substrate such as amorphous, ceramic, polycrystalline, etc. on which epitaxial growth does not occur. If a large grain can be formed, it can function as a semiconductor light emitting element. Amorphous, ceramic, or polycrystalline substrates, or single-crystal substrates whose crystal structure differs from the semiconductor material to be produced, or substrates with the same crystal structure but with a large difference in lattice constant, cover the entire surface of the substrate. Epitaxial growth of crystals does not occur. However, the microcrystals generated on the substrate at the initial stage of growth act as crystal nuclei, and the nuclei grow to form a polycrystalline film. If the size of each grain of the polycrystalline film is larger than the device size,
A device fabricated on the polycrystalline film will have characteristics similar to those of a single crystal device. Therefore, it becomes possible to supply the semiconductor light emitting device using a substrate which is cheaper than the conventional compound semiconductor substrate. Further, since a typical glass as an amorphous substrate has a large area and is easily available, the size of the device, which has been limited by the substrate size, can be significantly increased.

【0011】多結晶基板上に多結晶膜を成膜する際、グ
レインのサイズは基板のグレインサイズに影響される
が、アモルファス基板である石英ガラス基板上にMOC
VD法で多結晶膜を作製する場合を例にすると、そのグ
レインの大きさは成長条件に依存して変化する。例え
ば、グレイン成長温度、グレイン成長圧力、成長速度、
原料供給速度、キャリアガス流量の制御等で、グレイン
のサイズをコントロールできる。例えば、成長温度が高
いほど、また成長圧力が低いほど得られるグレインのサ
イズは大きくなる。10Torrの圧力のもとで850
℃でGaAsの成長を試みた予備実験では、直径が30
μm以上のグレインからなる多結晶膜が得られた。
When forming a polycrystalline film on a polycrystalline substrate, the grain size is influenced by the grain size of the substrate, but MOC is formed on a quartz glass substrate which is an amorphous substrate.
Taking the case of forming a polycrystalline film by the VD method as an example, the size of the grains changes depending on the growth conditions. For example, grain growth temperature, grain growth pressure, growth rate,
The grain size can be controlled by controlling the feed rate of the raw material and the flow rate of the carrier gas. For example, the higher the growth temperature and the lower the growth pressure, the larger the grain size obtained. 850 under pressure of 10 Torr
In a preliminary experiment that tried to grow GaAs at ℃, the diameter was 30
A polycrystalline film composed of grains of μm or more was obtained.

【0012】以上のように、例えばMOCVD法で条件
を最適化することで上記予備実験で得られたものよりも
サイズの大きなグレインからなる多結晶膜を製造するこ
とが可能となる。この基板上に、p型とn型のAlGa
Asを成長すれば、p型およびn型の膜も基板である多
結晶の膜と同程度もしくはそれ以上のサイズからなる多
結晶となる。そのサイズが発光ダイオードのサイズに相
当するものであれば、単結晶デバイスと変らない特性が
得られる。逆にグレインのサイズがデバイスのサイズよ
りも小さいときには、デバイス内に少なからずグレイン
バウンダリを持つこととなる。バウンダリではキャリア
は非発光再結合が生じる。しかしながらこれはキャリア
のすべてが非発光再結合する事を意味するのではなく、
グレインのサイズによっては発光再結合が支配的にもな
る。すなわち単結晶発光ダイオード(LED)に比べて
多少性能は劣るものの発光ダイオード(LED)として
十分に機能するものが得られる。
As described above, by optimizing the conditions by, for example, the MOCVD method, it becomes possible to manufacture a polycrystalline film made of grains having a size larger than that obtained in the preliminary experiment. On this substrate, p-type and n-type AlGa
When As is grown, the p-type and n-type films become polycrystals having the same size as or larger than the polycrystal film which is the substrate. If the size corresponds to the size of the light emitting diode, characteristics that are not different from those of a single crystal device can be obtained. On the contrary, when the size of the grain is smaller than the size of the device, the grain boundary is not small in the device. At the boundary, carriers undergo non-radiative recombination. However, this does not mean that all of the carriers recombine non-radiatively,
Depending on the grain size, radiative recombination can be dominant. That is, although the performance is slightly inferior to that of the single crystal light emitting diode (LED), a light emitting diode (LED) that sufficiently functions can be obtained.

【0013】[0013]

【実施例】本発明の実施例を図面と共に説明する。 実施例1 以下本発明を実証する一実施例として、MOCVD法に
よる石英ガラス基板上にAlGaAs発光ダイオードを
作製した例について述べる。図1はこの製造工程を示す
模式図である。基板として石英ガラス基板1を用い、そ
の前処理としてフッ化水素酸によるエッチングを行っ
た。さらにこれを不純物による結晶核の異常発生を防ぐ
ために、MOCVDチャンバ内に導入して1000℃で
15分間HClにさらして表面を清浄化した。これを8
50℃まで降温し、圧力10Torrで第1回目の成長
を行った。ここで3族原料としてトリメチルガリウム、
トリチメルアルミニウム、5族原料としてアルシンを用
い、またキャリアガスとして水素を用いた。5族原料/
第3族原料比=40で1時間原料を供給した。この結
果、石英ガラス基板1上にはAlGaAs(x=0.
4)からなる直径30μm程度のグレイン(図示せず)
が成長した。この第1回目の成長に続いて圧力を常圧と
して800℃でp型多結晶AlGaAs(x=0.4)
層3、850℃でn型多結晶AlGaAs(x=0.
4)層4を成長させた。この2段階の成長は、第2の成
長で良好な特性を有するp型多結晶AlGaAs層3あ
るいはn型多結晶AlGaAsを得るためである。次い
で、基板1を裏にし、再び同様な工程で多結晶AlGa
As層3、4を成膜した。作製した多結晶膜の構造を図
1(a)に示す。
Embodiments of the present invention will be described with reference to the drawings. Example 1 As an example for demonstrating the present invention, an example in which an AlGaAs light emitting diode is manufactured on a quartz glass substrate by MOCVD will be described below. FIG. 1 is a schematic view showing this manufacturing process. The quartz glass substrate 1 was used as a substrate, and etching with hydrofluoric acid was performed as a pretreatment. Further, in order to prevent abnormal generation of crystal nuclei due to impurities, the crystal nuclei were introduced into a MOCVD chamber and exposed to HCl at 1000 ° C. for 15 minutes to clean the surface. This 8
The temperature was lowered to 50 ° C., and the first growth was performed at a pressure of 10 Torr. Here, trimethylgallium as a Group 3 raw material,
Trithymel aluminum was used as the Group 5 raw material, arsine, and hydrogen was used as the carrier gas. Group 5 raw material /
The raw materials were supplied at a group 3 raw material ratio = 40 for 1 hour. As a result, on the quartz glass substrate 1, AlGaAs (x = 0.
4) Grain with a diameter of about 30 μm (not shown)
Grew up. Following this first growth, the p-type polycrystalline AlGaAs (x = 0.4) was formed at 800 ° C. under normal pressure.
Layer 3, n-type polycrystalline AlGaAs (x = 0.
4) Layer 4 was grown. This two-stage growth is for obtaining the p-type polycrystalline AlGaAs layer 3 or the n-type polycrystalline AlGaAs having good characteristics in the second growth. Then, the substrate 1 is turned upside down, and the polycrystalline AlGa is again subjected to the same steps.
As layers 3 and 4 were formed. The structure of the produced polycrystalline film is shown in FIG.

【0014】次いで、70μm□のメサ構造5を化学エ
ッチングで形成し、エッチング面とメサ構造5にそれぞ
れp型電極6およびn型電極7を形成した(図1
(b))。この素子の電流電圧特性を測定したところ、
基板両面の素子について図2に示す良好な整流特性が得
られた。いずれの素子も順方向にバイアスを印加したと
きのみ発光した。図3は10mAの電流を注入したとき
の発光スペクトルである。650nm付近と750nm
付近に2本のピークが観測できた。650nmのピーク
はAlGaAs(x=0.4)のバンド端に基づくもの
であり、750nmのピークは深い準位によるものであ
る。
Next, a 70 μm □ mesa structure 5 was formed by chemical etching, and a p-type electrode 6 and an n-type electrode 7 were formed on the etched surface and the mesa structure 5, respectively (FIG. 1).
(B)). When the current-voltage characteristics of this element were measured,
Good rectification characteristics shown in FIG. 2 were obtained for the devices on both sides of the substrate. All the devices emitted light only when a forward bias was applied. FIG. 3 is an emission spectrum when a current of 10 mA is injected. Near 650 nm and 750 nm
Two peaks could be observed in the vicinity. The peak at 650 nm is due to the band edge of AlGaAs (x = 0.4), and the peak at 750 nm is due to the deep level.

【0015】図4はメサエッチングにおいて、多結晶半
導体からなるLED20をアレイ状にし、石英ガラス基
板1両側でメサ構造が交互にずらして並ぶようにした発
光デバイスである。このような配置にすると、発光点の
間隔は従来のLEDアレイに比べて1/2になる。すな
わちLEDプリンタに応用すると印字できるドット間隔
は従来のものの1/2になる。
FIG. 4 shows a light emitting device in which LEDs 20 made of a polycrystalline semiconductor are arrayed in mesa etching, and the mesa structures are alternately arranged on both sides of the quartz glass substrate 1. With such an arrangement, the distance between the light emitting points becomes half that of the conventional LED array. That is, when it is applied to an LED printer, the printable dot interval is half that of the conventional one.

【0016】実施例2 本発明の他の実施例を図5を用いて説明する。石英ガラ
ス基板1の両面にCr膜10をスパッタ法で成膜した基
板を用いた。これをMOCVDチャンバ内で800℃ま
で昇温し、圧力10Torrで1時間成長した。ここで
3族原料としてトリメチルガリウム、トリチメルアルミ
ニウム、5族原料としてアルシンを用い、またキャリア
ガスとして水素を用いた。5族原料/第3族原料比=4
0で1時間原料を供給した。この結果、石英ガラス基板
1上にはAlGaAs(x=0.45)からなる直径2
0μm程度のグレイン(図示せず)が得られた。この第
1回目の成長に続いて圧力を常圧として800℃でp型
多結晶AlGaAs(x=0.45)層12、850℃
でn型多結晶AlGaAs(x=0.45)層13を成
長させた。
Embodiment 2 Another embodiment of the present invention will be described with reference to FIG. A substrate in which a Cr film 10 was formed on both surfaces of the quartz glass substrate 1 by a sputtering method was used. This was heated to 800 ° C. in the MOCVD chamber and grown at a pressure of 10 Torr for 1 hour. Here, trimethylgallium, trithymel aluminum was used as the Group 3 raw material, arsine was used as the Group 5 raw material, and hydrogen was used as the carrier gas. Group 5 raw material / Group 3 raw material ratio = 4
The raw material was fed at 0 for 1 hour. As a result, the diameter 2 of AlGaAs (x = 0.45) is formed on the quartz glass substrate 1.
Grains (not shown) of about 0 μm were obtained. Following this first growth, the p-type polycrystalline AlGaAs (x = 0.45) layer 12, 850 ° C., at 800 ° C. under normal pressure.
Then, an n-type polycrystalline AlGaAs (x = 0.45) layer 13 was grown.

【0017】次いで、基板1を裏返して、再びMOCV
Dで多結晶AlGaAs層15、16を成膜した。作製
した多結晶膜の構造を図5(a)に示す。次いで、基板
チャンバ内で800℃まで昇温し、圧力10Torrで
1時間原料を供給することで、AlGaAs(x=0.
3)からなるグレイン(図示せず)を成長した。続いて
圧力を常圧として800℃でp型多結晶AlGaAs
(x=0.3)層15、850℃でn型多結晶AlGa
As(x=0.3)層16を成長した。成長した多結晶
AlGaAs層12、13、15、16の一部を硫酸系
エッチング液で、Cr膜10に達するまでエッチング
し、残した多結晶AlGaAs層13、16上にそれぞ
れn型電極17を形成した(図5(b))。一方、Cr
膜10はp型多結晶AlGaAs層12、15のオーミ
ック電極として作用する。
Then, the substrate 1 is turned over and the MOCV is performed again.
Polycrystalline AlGaAs layers 15 and 16 were formed by D. The structure of the produced polycrystalline film is shown in FIG. Then, the temperature is raised to 800 ° C. in the substrate chamber, and the raw material is supplied at a pressure of 10 Torr for 1 hour, so that AlGaAs (x = 0.
Grains (not shown) composed of 3) were grown. Then, the p-type polycrystalline AlGaAs is kept at 800 ° C. under normal pressure.
(X = 0.3) layer 15, n-type polycrystalline AlGa at 850 ° C.
An As (x = 0.3) layer 16 was grown. A part of the grown polycrystalline AlGaAs layers 12, 13, 15, 16 is etched with a sulfuric acid-based etching solution until reaching the Cr film 10, and n-type electrodes 17 are formed on the remaining polycrystalline AlGaAs layers 13, 16 respectively. (Fig. 5 (b)). On the other hand, Cr
The film 10 acts as an ohmic electrode of the p-type polycrystalline AlGaAs layers 12 and 15.

【0018】本実施例では多結晶AlGaAs層12、
13と多結晶AlGaAs層15、16では半導体材料
のバンドギャップが異なり、発光波長が基板1に設けた
両側の発光素子間で異なる。本実施例も図4に示す実施
例1と場合と同様に多結晶半導体からなるLEDを配置
することで、発光点の間隔を従来のLEDアレイに比べ
て1/2とすることができる。
In this embodiment, the polycrystalline AlGaAs layer 12,
The band gap of the semiconductor material is different between 13 and the polycrystalline AlGaAs layers 15 and 16, and the emission wavelength is different between the light emitting elements provided on both sides of the substrate 1. Also in this embodiment, by arranging LEDs made of a polycrystalline semiconductor as in the case of the first embodiment shown in FIG. 4, the intervals of the light emitting points can be made half as compared with the conventional LED array.

【0019】実施例3 以下本発明を実証する一実施例として、MOCVD法に
よる石英ガラス基板上にAlGaAs発光ダイオードを
作製した例について述べる。図6はこの製造工程を示す
模式図である。基板として石英ガラス基板1を用い、そ
の前処理としてフッ化水素酸によるエッチングを行っ
た。さらにこれを不純物による結晶核の異常発生を防ぐ
ために、MOCVDチャンバ内に導入して1000℃で
15分間HClにさらして表面を清浄化した。これを8
50℃まで降温し、圧力10Torrで第1回目の成長
を行った。ここで3族原料としてトリメチルガリウム、
トリチメルアルミニウム、5族原料としてアルシンを用
い、またキャリアガスとして水素を用いた。5族原料/
第3族原料比=40で1時間原料を供給した。この結
果、石英ガラス基板1上にはAlGaAs(x=0.4
3)からなる直径30μm程度のグレイン(図示せず)
が成長した。この第1回目の成長に続いて圧力を常圧と
して800℃でp型多結晶AlGaAs(x=0.4
3)層3と、ノンドープ多結晶AlGaAs(x=0.
4)層18、850℃でn型多結晶AlGaAs(x=
0.4)層4を成長させた。。この2段階の成長は、第
2の成長で良好な特性を有するpin接合を得るために
行った。
Example 3 As an example for demonstrating the present invention, an example in which an AlGaAs light emitting diode is formed on a quartz glass substrate by MOCVD will be described below. FIG. 6 is a schematic view showing this manufacturing process. The quartz glass substrate 1 was used as a substrate, and etching with hydrofluoric acid was performed as a pretreatment. Further, in order to prevent abnormal generation of crystal nuclei due to impurities, the crystal nuclei were introduced into a MOCVD chamber and exposed to HCl at 1000 ° C. for 15 minutes to clean the surface. This 8
The temperature was lowered to 50 ° C., and the first growth was performed at a pressure of 10 Torr. Here, trimethylgallium as a Group 3 raw material,
Trithymel aluminum was used as the Group 5 raw material, arsine, and hydrogen was used as the carrier gas. Group 5 raw material /
The raw materials were supplied at a group 3 raw material ratio = 40 for 1 hour. As a result, on the quartz glass substrate 1, AlGaAs (x = 0.4
3) Grain with a diameter of about 30 μm (not shown)
Grew up. Subsequent to the first growth, the p-type polycrystalline AlGaAs (x = 0.4
3) Layer 3 and non-doped polycrystalline AlGaAs (x = 0.
4) Layer 18, n-type polycrystalline AlGaAs (x =
0.4) Layer 4 was grown. . This two-step growth was performed in order to obtain a pin junction having good characteristics in the second growth.

【0020】次いで、基板1を裏にし、再び同様な工程
で多結晶AlGaAs層3、18、4を成膜した。作製
した多結晶膜の構造を図6(a)に示す。次いで、70
μm□のメサ構造を化学エッチングで形成し、エッチン
グ面とメサ構造にそれぞれp型電極6およびn型電極7
を形成した(図6(b))。この素子の電流電圧特性を
測定したところ、基板両面の素子について図2に示した
電流電圧特性と同様な整流特性が得られた。いずれの素
子も順方向にバイアスを印加したときのみ発光し、図3
で示したような650nm付近と750nm付近に2本
のピークが観測できた。650nmのピークはノンドー
プ多結晶AlGaAs(x=0.4)層18のバンド端
に基づくものであり、ノンドープ多結晶AlGaAs層
18で発光していると考えられる。本実施例も図4に示
す実施例1の場合と同様に多結晶半導体からなるLED
を配置することで、発光点の間隔を従来のLEDアレイ
に比べて1/2とすることができる。
Then, with the substrate 1 as the back side, polycrystalline AlGaAs layers 3, 18 and 4 were formed again in the same process. The structure of the produced polycrystalline film is shown in FIG. Then 70
A μm □ mesa structure is formed by chemical etching, and a p-type electrode 6 and an n-type electrode 7 are formed on the etching surface and the mesa structure, respectively.
Was formed (FIG. 6B). When the current-voltage characteristics of this element were measured, rectification characteristics similar to the current-voltage characteristics shown in FIG. 2 were obtained for the elements on both sides of the substrate. Each element emits light only when a forward bias is applied, and FIG.
Two peaks were observed at around 650 nm and around 750 nm as shown in FIG. The peak at 650 nm is based on the band edge of the non-doped polycrystalline AlGaAs (x = 0.4) layer 18, and it is considered that the non-doped polycrystalline AlGaAs layer 18 emits light. Also in this embodiment, similarly to the case of Embodiment 1 shown in FIG. 4, an LED made of a polycrystalline semiconductor is used.
By arranging, the interval of the light emitting points can be halved as compared with the conventional LED array.

【0021】[0021]

【発明の効果】本発明によれば、従来の化合物半導体基
板よりも安価な基板を用いて半導体光デバイスを供給す
ることが可能となった。さらに、アモルファス基板とし
て代表的なガラスは大面積のものが容易に入手できるこ
とから、たとえばLEDプリンタ用の光源(LEDアレ
イ)を1枚の基板上に作製することが可能となった。
According to the present invention, it becomes possible to supply a semiconductor optical device using a substrate which is cheaper than a conventional compound semiconductor substrate. Further, since a typical glass as an amorphous substrate has a large area and is easily available, it has become possible to fabricate, for example, a light source (LED array) for an LED printer on one substrate.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明による実施例1で述べた石英ガラス基
板の両面に形成したAlGaAs多結晶LEDの模式
図。
FIG. 1 is a schematic view of AlGaAs polycrystalline LEDs formed on both sides of a quartz glass substrate described in Example 1 according to the present invention.

【図2】 図1のAlGaAs多結晶LEDの電流電圧
特性を示すグラフ。
FIG. 2 is a graph showing current-voltage characteristics of the AlGaAs polycrystalline LED of FIG.

【図3】 図1のAlGaAs多結晶LEDの発光スペ
クトルを示すグラフ。
FIG. 3 is a graph showing an emission spectrum of the AlGaAs polycrystalline LED of FIG.

【図4】 本発明による実施例1で述べた石英ガラス基
板の両面に形成したAlGaAs多結晶LEDの模式
図。
FIG. 4 is a schematic view of AlGaAs polycrystalline LEDs formed on both surfaces of the quartz glass substrate described in Example 1 according to the present invention.

【図5】 本発明の実施例2のCr膜付きの石英ガラス
基板上に形成したAlGaAs多結晶LEDの模式図。
FIG. 5 is a schematic diagram of an AlGaAs polycrystalline LED formed on a quartz glass substrate with a Cr film according to Example 2 of the present invention.

【図6】 本発明による実施例3で述べた石英ガラス基
板の両面に形成したAlGaAs多結晶LEDの模式
図。
FIG. 6 is a schematic view of AlGaAs polycrystalline LEDs formed on both sides of the quartz glass substrate described in Example 3 according to the present invention.

【符号の説明】[Explanation of symbols]

1…石英ガラス基板、3、12、15…p型多結晶Al
GaAs層、4、13、16…n型多結晶AlGaAs
層、5…メサ構造、6…p型電極、7、17…n型電
極、10…Cr膜、18…ノンドープ多結晶AlGaA
s層、20…半導体多結晶LED
1 ... Quartz glass substrate, 3, 12, 15 ... P-type polycrystalline Al
GaAs layer, 4, 13, 16 ... N-type polycrystalline AlGaAs
Layers, 5 ... Mesa structure, 6 ... P-type electrode, 7, 17 ... N-type electrode, 10 ... Cr film, 18 ... Non-doped polycrystalline AlGaA
s layer, 20 ... Semiconductor polycrystalline LED

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 半導体材料がエピタキシャル成長が生じ
ない基板の両面に形成された多結晶体もしくは多結晶膜
であって、それぞれの多結晶体もしくは多結晶膜内に少
なくともpn接合、pin接合を有し、p型半導体およ
びn型半導体にそれぞれ設けた電極間に電流を流してp
n接合、pin接合で発光させることを特徴とする半導
体発光素子。
1. A semiconductor material, which is a polycrystal or polycrystal film formed on both surfaces of a substrate on which epitaxial growth does not occur, and has at least a pn junction or a pin junction in each polycrystal or polycrystal film. , P-type semiconductor and n-type semiconductor
A semiconductor light-emitting device characterized in that it emits light with an n-junction and a pin-junction.
【請求項2】 基板の両側でpn接合、pin接合を形
成する半導体材料のバンドギャップ、あるいは発光メカ
ニズムが異なり、発光波長が基板に両側に設けた発光素
子間で異なることを特徴とする請求項1記載の半導体発
光素子。
2. The pn junction, the band gap of the semiconductor material forming the pin junction, or the emission mechanism is different on both sides of the substrate, and the emission wavelength is different between the light emitting elements provided on both sides of the substrate. 1. The semiconductor light emitting device according to 1.
【請求項3】 エピタキシャル成長が生じない基板は基
板そのものがアモルファス、多結晶または単結晶構造の
無機材料または金属材料からなるか、または基板表面が
アモルファス、多結晶または単結晶構造の無機材料また
は金属材料で覆われた材料からなるものであることを特
徴とする請求項1または2記載の半導体発光素子。
3. The substrate on which epitaxial growth does not occur is composed of an amorphous or polycrystal or single crystal structure inorganic material or metal material, or the substrate surface is amorphous, polycrystal or single crystal structure inorganic material or metal material. 3. The semiconductor light emitting device according to claim 1, which is made of a material covered with.
【請求項4】 請求項1ないし3のいずれかに記載され
た半導体発光素子をメサ構造として並列状に配置し、そ
れぞれのメサ構造を基板両側で互いにずらして並ぶよう
に配置したことを特徴とする発光デバイス。
4. The semiconductor light emitting device according to claim 1 is arranged in parallel as a mesa structure, and the respective mesa structures are arranged on both sides of the substrate so as to be offset from each other. Light emitting device.
JP5074093A 1993-03-11 1993-03-11 Semiconductor light-emitting element and light-emitting device Pending JPH06268251A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5074093A JPH06268251A (en) 1993-03-11 1993-03-11 Semiconductor light-emitting element and light-emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5074093A JPH06268251A (en) 1993-03-11 1993-03-11 Semiconductor light-emitting element and light-emitting device

Publications (1)

Publication Number Publication Date
JPH06268251A true JPH06268251A (en) 1994-09-22

Family

ID=12867241

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5074093A Pending JPH06268251A (en) 1993-03-11 1993-03-11 Semiconductor light-emitting element and light-emitting device

Country Status (1)

Country Link
JP (1) JPH06268251A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018049981A (en) * 2016-09-23 2018-03-29 スタンレー電気株式会社 Semiconductor light emitting device and manufacturing method of the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018049981A (en) * 2016-09-23 2018-03-29 スタンレー電気株式会社 Semiconductor light emitting device and manufacturing method of the same

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