JPH06245188A - Reproducing device for video signal - Google Patents

Abstract

PURPOSE:To stably, surely and completely remove skews and to easily perform segment recording by switching the reproduction of signal blocks within the period of redundant signals between the signal blocks of reproducing video signals. CONSTITUTION:Video signals written in a memory 102 can be taken out as the signal blocks for N1 lines for respective (n) lines in a horizontal scanning unit and on the other hand, a redundant period tau in which the video signals are not outputted at the changing point of the scanning of respective heads can be generated from the value of N1. Output corresponding to the period tauis obtained from a read address control circuit 121. The output is supplied to a blanking signal generation circuit 130 and signals for indicating the location of the period tau or prescribed blanking signals are generated in the period tau. The blanking signals from the circuit 130 are inserted in the period tau of the video signals in an insertion circuit 104, supplied and processed through an output terminal 300 to a recording video processing circuit 30a and supplied to the heads 4a and 4b. Also, the reproducing video signals are processed in the circuit 30a and supplied to a time base conversion circuit.

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention
Recording is done by dividing into multiple sets of parallel and diagonal tracks
The present invention relates to a device for reproducing a reproduced video signal. [0002] One field (or one frame)
Video signal of period T is divided into multiple sets and recorded on magnetic tape
Of so-called segment recording type magnetic recording / reproducing apparatus
As a conventional example, there is a 4-head VTR for commercial use such as broadcasting stations.
For details, see the literature (Japan Broadcast Publishing Co.
Meeting, edited by Television Society, edited by Minoru Inazu, Takeshi Iwasawa, VTR
Technology). The segment recording method
In the digital tape recorder (VTR), one video signal
Divide a field (or one frame) into multiple sets of tracks
In order to record it, the rotary head
Track switching due to mounting error, tape expansion and contraction, etc.
The so-called skew that occurs at the time of turning (a sudden change in the time axis
The time axis correction circuit for correcting This
For the method of correcting the skew of
As described in detail, the video signal is passed through a variable delay line etc.
The delay time is made variable according to the above skew amount,
Horizontal blanking period of video signal, more specifically water
The front porch period immediately before the flat sync signal is extended in time.
By reducing the position of the video signal and the horizontal sync signal,
A method of correcting a time axis for making phases continuous is known. According to the above-mentioned conventional method
For example, the amount of skew that can be corrected is
It depends on the time width of the topoch, and the current TV system is 1-2.
The limit is about μs. On the other hand, in the current home VTR, the video signal is
So-called 1 which records 1 field of 1 in 1 track
1 segment type in the field (2 segment in 1 frame)
Type) helical scan type is generally used
However, the diameter of the rotating drum has been reduced to make the VTR even smaller.
In order to reduce the shape and weight, or the number of rotations of the rotating drum
In order to further improve image quality, the current TV system
The so-called high-definition and high-quality image
An image with a bandwidth that is several times as wide as that of a conventional TV
In order to realize a new VTR that can record signals,
Trial to record the above segment in the garden VTR
Is being done. However, a helical scan type home
For VTRs for business use, due to manufacturing restrictions,
The finishing accuracy of the mechanical system such as the drive system is not always sufficient.
In addition, take into consideration the storage conditions of tapes at home.
And the above-mentioned skew generation amount reaches several μs and is also compatible
Considering regeneration, it is necessary to allow for a margin to the above value.
It In addition, it is partially proposed as the above high-definition television.
According to the method described in the literature,
VOL. 7, No. 44, March 1984; "High-quality TE
Levi's satellite 1-channel transmission system MUSE ")
The horizontal blank assigned to the video signal as
The king period is short (1 μs or less). [0006] Therefore, the screen in the above-mentioned home VTR is
Considering the actual situation of queue generation, the current TV system
In addition, in the above high definition television system,
Traditional methods do not completely eliminate skew
Difficult to put into practical use a VTR that achieves the above objectives
Met. As another conventional example using the above segment recording
Convert a video signal into a digital signal and convert it into a PCM signal.
The so-called digital VTR that records in the form of
It is possible, but the amount accompanying the digitization of the above video signals
The number of quantization bits is increased because it is necessary to reduce the subdivision error.
For this reason, transmission of PCM signals recorded on magnetic tape
The recording rate of the tape is extremely low and the recording density of the tape is extremely low.
The recording time is not sufficient and the signal to handle is not
For home use, such as always becoming broadband and technically difficult
It is a big obstacle for its widespread use. Recording
To secure enough time and obtain sufficient image quality,
Instead of the digital method, the analog method
It is an important issue for those skilled in the art to realize
ing. In view of the above, it is an object of the present invention to compensate for skew.
It is possible to take the positive generation large enough, and the skew is stable and accurate.
It is possible to completely remove it, and the above segment recording
Apparatus and reproducing apparatus for easily realizing
To provide. [0009] To achieve the above object
In addition, the present invention includes the luminance information Y and the color information C in the cycle T.
Video signal including N number of flat scan lines, n sets in the period of T
(N is an integer of 2 or more)
To divide the tape into multiple parallel diagonal tracks.
In a device equipped with a structure for recording and playing back,
First, in the recording device, the input video signal
More at least part of the signal in its vertical blanking period
Is removed, and the remaining video signal is
[N / n] (maximum adjustment not exceeding N / n)
Number) and the above luminance information Y in units of effective horizontal scanning lines
N sets so as to include a signal obtained by time-division-multiplexing with the color information C
Signal of each segment and the segment of each set
Signals to a pair of parallel diagonal tracks on the tape.
Signal blocks to be recorded on each set of tracks
By forming a redundant signal for an arbitrary period between the signal blocks.
For each signal block so as to generate a recorded video signal
Time axis conversion is performed and at least the recorded video signal is
For each signal block, along with the redundant signal, the corresponding
Sequential recording on each set of tracks, and the redundant signal
Make sure to record in place on the track for the entire period
It is characterized in that it is configured in. Further, in the reproducing apparatus, the above
The recorded video signal recorded by
Within the period of the redundant signal between the signal blocks of
After switching the playback of the No. block,
The time axis conversion is performed for each
Configured to restore and output a signal in the same format as the signal
It is characterized by According to the above, the tape on which the video signal is recorded is reproduced.
Between the signal blocks of the reproduced video signal obtained by
Switching of reproduction of the above signal block within the period of redundant signal
Skew correction is performed by performing. Especially,
The period of the redundant signal of
To set a value larger than the queue size (several μs)
To remove the skew completely with sufficient margin.
Therefore, the period of T above can be
It is possible to easily realize segment recording which is divided and recorded. The present invention will be described in detail below with reference to examples.
It FIG. 1 shows a single-channel two-head type helicopter.
Video signal when the present invention is applied to a le scan VTR
FIG. 2 is a block diagram showing an embodiment of the recording apparatus of FIG.
Waveform diagram for explanation of work, Figure 3 shows the track obtained by this
It is a figure which shows the pattern of. In FIG. 1, magnetic tape
1 is driven by a capstan motor 20,
The tan motor 20 is driven by a capstan servo circuit 21.
Rotation is controlled at a constant speed. The magnetic heads 4a and 4b are mutually
The azimuth angle is different, and 180
Mounted at an angle of °, the disc motor 6
It is rotated together with Kur 2. Tape 1 is on disk 2 180
It is wound more than 0 °, so that the heads 4a and 4b are
Figure on the part where the tape 1 touches at the same time, that is, on the track
Q of 3 ₁ , Q ₂ The so-called overlap part shown in
It The disk 2 has two magnets 3a, 3b attached to each other.
It is installed at an angle of 180 ° on the
Detected by the head 5 and synchronized with the rotation of the heads 4a and 4b.
Acquire a pulse pulse ((c) in FIG. 2) from the tack head 5.
It Phase adjustment of the tack pulse from this tack head 5
The circuit 7 allows the heads 4a and 4b and the tape 1 to be in a predetermined relative position.
After the phase is adjusted to have a positional relationship,
As shown in FIG. 2 (c), time τ ₀ After being delayed,
The output is supplied to the pulse forming circuit 8. This pulse formation
From the circuit 8, the dew synchronized with the rotation of the heads 4a and 4b is performed.
A pulse with a tee ratio of 50% ((d) in FIG. 2;
It is referred to as a switching signal. ) Is output. 140 is synchronization information
It is a report output circuit, and the input video signal from the terminal 200 (Fig.
2 (a)) Based on the vertical synchronization information included in it
Signal (for example, vertical blanking period τ in FIG. 2A) _B To
The signal shown in the shaded area) VS and the horizontal synchronization signal are included.
Or signal HS based on horizontal synchronization information such as burst signal
Is output. Vertical synchronization information VS (FIG.
2 (b) is a servo for recording on the disk servo circuit 9
It is supplied as a reference signal. This disk servo circuit 9
At the vertical synchronization information VS from the circuit 140.
The head switching signal from the circuit 8 is compared in phase and both
An error signal corresponding to the phase difference is output to the disk motor 6
Supplied. As a result, the vertical synchronization information VS and the head
Further, make sure that both switching signals are in phase synchronization with each other.
Specifically, as shown in FIG. 2, the vertical synchronization information VS (in FIG.
Phase difference between (b)) and head switching signal ((d) in FIG. 2)
Time is τ ₁ Disk motor 6 rotation control so that
To be done. Here, generally at least one channel
When performing n-segment recording with
One field of the image signal is divided into n sets of segments and n
When recording separately on a set of tracks, the video signal
Field frequency f ₀ Then, the two heads shown in FIG.
The rotational speed M of the disk motor 6 in the drive type VTR is
Determined by the disk servo circuit 9 to satisfy the formula
It ## EQU1 ## M = f ₀ / 2 × n (rps) In the embodiment of FIG. 1, NTSC, PAL, SEC
When the present invention is applied to the current television system such as AM
F ₀ = 60 Hz, n = 4, therefore, according to the above formula (1)
4 segments of a single channel with M = 120rps
The operation will be described below in the case of recording. In this case, in the longitudinal direction of the track, 18
Record within the 0 ° period (the period indicated by T in FIGS. 2 and 3)
The number X of horizontal scanning lines (lines) of the obtained video signal is
Let N be the number of lines per field in
## EQU2 ## X = N / n The number of horizontal scanning lines is N = 262.5 per field (frame
Of current television system (NTSC system)
In that case, X is given by X = 65.625 In the present invention, as will be described later, the longitudinal direction of each track
In the 180 degree period T, [X] (maximum not exceeding X
Is an integer of the above and in the case of the above number 3, [X] = 65) lines or less
The video signal is recorded. In the embodiment shown in FIG. 1, the period T
A case where the number N1 of lines to be recorded is set to the following equation [X] ≧ N1 = 64 is shown. The subscripts 1 to 2 shown in FIGS. 2 and 3 above.
56 is the line number of the video signal recorded on the tape
Show. Next, the block 10 shown by the dashed line in FIG.
Reference numeral 0a indicates a time axis conversion device for recording according to the present invention.
You In the figure, 200 is a video signal input terminal and 300 is an hour
Images to be recorded that have been time-axis converted by the inter-axis converter 100a
This is an output terminal for the image signal. 101 is an image from the terminal 200
A / D conversion circuit for converting an image signal into a digital signal, 1
Reference numeral 02 is a memory including a RAM, 103 is a D / A
Conversion circuit, 104 is a blanking signal insertion circuit, 110
Is a write clock generation circuit, 111 is a write address system
Control circuit, 120 is a read clock generation circuit, 121 is a read clock
Address control circuit, 122 is a read start pulse
A generation circuit, 130 is a blanking signal generation circuit. The write clock generation circuit 110 uses the above
The write clock synchronized with the horizontal sync information HS from the path 140.
Generate CP1 and output it. This write clock CP
1 is a write address control circuit 111 and an A / D conversion circuit 1
01 is supplied. The write address control circuit 111 is
Water from the circuit 140
The counting is started by the flat synchronization information HS, and the circuit 110
Count the write clock CP1 from
When the corresponding address signal is output, the memory 102 is written.
It is supplied as an embedded address signal. This address signal
Is sequentially performed every horizontal scanning cycle according to the horizontal synchronization information HS.
Will be updated. Therefore, the input video signal from the terminal 200
No. ((a) of FIG. 2) was output from the circuit 110.
The A / D conversion circuit 10 is synchronized with the write clock CP1.
It is converted into a digital signal one by one and the output is
Depending on the address from path 111,
Sequentially written in Mori 102. The storage capacity of the memory 102 will be described later.
The required minimum amount is calculated according to the amount of redundant period τ generated.
It Here, as an example, the value of h is set to 1.
The memory capacity of the memory 102 is 8H (input
The storage capacity for one line of the video signal is 1H. )When
, M1, M2, ..., M8 memory in units of 8 lines
The memory 102 is configured with, and in the case of the above embodiment,
In the first memory M1 have line numbers 1, 9, 17,
The video signal of 249 is lined to the second memory M2.
The video signals of numbers 2, 10, 18, ..., 250 are the same below.
In the same manner, the eighth memory M8 has line numbers 8, 16,
The video signals of 24, ..., 256 are cyclically arranged in chronological order.
Sequentially written. The write operation in the time series described above is surely performed.
In order to enable the vertical synchronization information VS from the circuit 140,
This write address control circuit 111 is supplied with
For example, a video signal of line number 1 according to the direct synchronization information VS
Is always written in the memory M1 for each field.
Controlled by. Next, the read clock generation circuit 120
Synchronized with the write clock CP1 from the circuit 110
The read clock CP2 is generated and output. This reading
An example of the lock generation circuit 120 is shown in FIG. In FIG. 4, 310 is the circuit 110 described above.
Input terminal of the write clock CP1 and read by 320
The output terminal of the clock CP2. Writing from terminal 310
The embedded clock CP1 is appropriately 1 / k in the frequency dividing circuit 301.
(K is an integer greater than or equal to 1) and the output is phase compared
It is supplied to one side of the circuit 302. Of the phase comparison circuit 302
The output from the voltage controlled oscillator circuit 304 is applied to the other input.
Appropriately 1 / m (m is an integer of 1 or more) in the frequency divider 305
The divided output is supplied. This phase comparison circuit 302
The phases of the outputs from the circuits 301 and 305 are compared and
A phase error signal corresponding to the phase difference of the operator is output from the circuit 302.
I will be forced. The output from this circuit 302 is the phase compensation circuit 3
As a control voltage of the voltage controlled oscillator circuit 304 via
Supplied. The output from the circuit 304 is the read clock
It is output to the terminal 320 as CP2. With the above circuit
The PLL circuit is configured to read from the circuit 304.
The clock CP2 is the write clock C from the terminal 310.
Phase-locked to P1. A reading group consisting of the above
The frequency of the read clock CP2 from the lock generation circuit 120
Wave number f ₂ Is the write clock CP from the circuit 110.
Frequency of 1 f ₁ Then, it is given by the following equation. ## EQU5 ## f ₂ = M / k × f ₁ The read clock from the above read clock generation circuit 120
The CP2 is connected to the read address control circuit 121 and the D / A.
It is supplied to the conversion circuit 103. Reference numeral 11 is a delay circuit, which is provided from the above circuit 8.
At both rising and falling edges of the output ((d) in Figure 2)
Triggered, predetermined time width τ ₂ Pulse (of FIG. 2
(E)) is output. The output from this delay circuit 11 is read
It is supplied to the take start pulse generation circuit 122,
From the trailing edge of the output from circuit 11 on path 122
(FIG. 2 (f)) is generated and output. This circuit
The output pulse from 122 is from the tack head 5.
It is synchronized with the tack pulse ((c) in FIG. 2), and
In synchronization with the rotation of the heads 4a and 4b, the head 4
Up every scanning cycle of a and 4b (cycle shown in T of FIG. 2)
A reading start commanding the reading start of the memory 102.
Supply to read address control circuit 121 as pulse RS
To be done. The read address control circuit 121 is a counter
Read start from the above circuit 122
Counting is started by the pulse RS, and the circuit 120
Counts the read clock CP2 of and corresponds to the count value
The address signal for
It is supplied as an address signal. A real example of the read address control circuit 121
An example is shown in FIG. In FIG. 5, 420 is the circuit 120 described above.
Read clock CP2 input terminal, 421 is the above
Input terminal for read start pulse RS from path 122,
Reference numeral 422 is an output terminal for a read address signal. Terminal 4
The read start pulse RS from 21 is supplied to the latch circuit 4
Synchronize with read clock CP2 from terminal 420 at 01
Be converted. The output from the circuit 401 is the OR gate 40.
2 to the reset input R of the counter 404 via
As a result, the counter 404 is reset. Well
The clock input CK of the counter 404 is connected to the terminal 42.
Read clock CP2 from 0 drives AND gate 403
Supplied through. 408 is R / S flip-flop times
Is set by the output from the circuit 401 above.
And its output Q ((i) in FIG. 2) becomes a high level "H".
It As a result, the AND gate 403 is opened and the terminal 4
The clock CP2 from 20 is supplied to the counter 404.
Start counting. 405 displays the count value of the counter 404.
It is a decoder that encodes and counts the counter 404.
The value is N0 (in this embodiment, the video signal ((a) in FIG. 2))
The clock of the write clock CP1 within one horizontal scanning period
The value of N0 is set so as to be equal to the number of clocks. )
It outputs a pulse when it hits. From this decoder 405
Of the output pulse ((g) in FIG. 2) of the OR gate 402.
Is supplied to the reset input R of the counter 404 via
As a result, the counter 404 is reset again and the counting is restarted.
Be started. The above operation is the output pattern from the decoder 405.
Repeated based on Ruth. From this counter 404
Is output from the memory 102 via the terminal 422.
It is provided as a read address signal in the line. the above
N0 is a writing clock within one horizontal scanning period of the video signal
Is set to be equal to the number of
The video signal written in the memory 102 is within the horizontal scanning period.
All of them are read sequentially without omission. Next, the output from the decoder 405 is
Input to the clock input CK of the input 406. Also, the
The circuit 401 is connected to the reset input R of the counter 406.
Output from the counter, which causes counter 406 to
Set, count output pulses from decoder 405
Start. Count value of counter 406 at decoder 407
Is decoded and the count value of the counter 406 is N1 (this
In the embodiment, N1 = 64 is set. ) Became
Outputs a pulse to. The count output from the counter 406 is a terminal
Read in horizontal scanning units of the memory 102 via 422
Address signal. Where this coun
Data 406 is composed of binary M-bit counter
More specifically, when the value of h above is set to 1,
Has a value of 6 (6 bits) in order to count N1 = 64.
Counter) is sufficient and all 6 including the least significant bit
The bit counter output as the read address signal
It is supplied to the memory 102. Further, by setting the value of h to 2 or more, for example,
For example, if h = 2, then M = 7
The upper 6-bit counter output excluding the place bit is read above
Address signal. Similarly, when the value of h is set to 4,
If M = 8, the least significant 2 bits are excluded
The upper 6-bit counter output is the read address signal
Supplied as. With the above settings, in general, the memory 1
The video signal written in 02 is set in the horizontal scanning unit.
N1 = 64 (corresponding to 6 bits) signal lines for each
It can be read and output as a clock. The flip-flop circuit 408 is a decoder
Reset by the output from the DA 407, and its output Q
((I) in FIG. 2) becomes the low level "L". By this
AND gate 403 closes, and therefore the counter 4
The counting of 04 and 406 is temporarily stopped. The above operation is performed by the reading star from the terminal 421.
It is repeated at the cycle T of the pulse RS. Therefore, the edge
The read address signal output from the child 422 causes
Sequentially read from the memory 102 to the D / A conversion circuit 103
Image signals that are output after being converted into analog signals
It becomes a form as shown in (h) of 2. That is, the above h
If the value of is set to 1, the
In the first scanning period T of the head 4a, the first signal block
Serial numbers in the order of line numbers 1, 2, 3, ...
The continuous video signal is output and the scanning period of the next head 4b
In T, line numbers 65 and 6 are used as the second signal block.
6, ..., 128 consecutive video signals are output,
Similarly, in the next scanning period T of the head 4a, the third signal continues.
Line numbers 129, 130, ..., 192 as blocks
In the order of, and in the scanning period T of the head 4b, the fourth signal
No. block as line numbers 193, 194, ..., 25
6 are sequentially output. In addition, the above output form is
It is exactly the same in the direct scan period, the field
It is repeated in a cycle and output in the same form. On the other hand, the value of N1 satisfies the above equation 4.
Therefore, as shown in (h) of FIG.
No video signal is output at the scan transition of each head.
(Or even if it is output, it is especially
Can produce a redundant period τ)
It This redundancy period τ is the horizontal of the original video signal (a in FIG. 2).
Scanning cycle T _H And using the above equations 3, 4 and 5,
Given by the formula. Τ = (X−N1) × T _H × m / k = 1.625 × T _H × m / k where m / k is the frequency dividing circuit 301 shown in FIG.
This corresponds to the ratio of the frequency division value (k, m) of 305. Clearer than this
In general, increase the redundancy period τ above
Is possible. Specifically, in the above example, 1.62
If 5 × m / k> 1, the redundancy period τ is T _H Greater than
Wear. In the present invention, the above m and k
The value can be set arbitrarily, and in particular m = k
, That is, the frequency of the write clock CP1 (f ₁ )
And the frequency of the read clock CP2 (f ₂ ) Is the same
In this case, the read clock generation circuit
Writing from the circuit 110 is not necessary for 120 in particular.
The clock CP1 is directly supplied to the circuits 121 and 103.
It may be supplied, and this is the main point of the present invention. Read address control circuit 121 shown in FIG.
From the circuit 408 of the above, as shown in (i) of FIG.
Corresponding to the redundant period τ of (specifically, in the redundant period τ
Output becomes "L" and becomes "H" in other cases.
It The output from this circuit 408 is output via the terminal 423.
1 is supplied to the blanking signal generation circuit 130 shown in FIG.
It In the circuit 130, a predetermined blur is appropriately applied during the redundancy period τ.
Inking signal (for example, from the D / A conversion circuit 103)
The black level or gray level of the output video signal
A signal corresponding to which constant level (S1 in FIG. 2 (j)),
Or a guideline for the location of this redundant period τ at a certain level
Any reference signal such as synchronization information related to the segment
Signal (S2 in FIG. 2 (j)) is generated.
Is output. In the blanking signal insertion circuit 104,
The above-mentioned video signal output from the D / A conversion circuit 103
During the redundancy period τ, the blanking signal from the circuit 130 is
Is inserted. Thus, the image output from the circuit 104
The image signal ((j) in FIG. 2) is recorded via the output terminal 300.
It is supplied to the video processing circuit 30a, and the circuit 30a writes it appropriately.
After being recorded, the output is the heads 4a and 4b.
And is sequentially recorded on the tape 1. The read address system shown in FIG. 5 is used.
Count output of the counter 406 in the control circuit 121
Be a read address signal for each h-scan horizontal scanning unit
However, the present invention is not limited to this.
However, as shown by the broken line path in the figure,
Counter 40 for counting output pulses from coder 405
9 is separately provided to replace the count output from the counter 406.
Instead, the count output of the counter 409 is calculated for each h line.
422 as a read address signal of the horizontal scanning unit of
You may output to. In this case, the memory 102
To ensure that the reading start operation of the field cycle is performed
(Specifically, as described above,
Read from video signal of line number 1 written in memory M1
Vertical from the circuit 140 above to start the take)
Reset pulse selection of synchronization information VS via terminal 424
The circuit 401 is supplied to the circuit 410, and the circuit 401
From the output pulse from the vertical blanking period of the original video signal
Τ ₈ The pulses included in (P1, P2 of FIG. 2F)
Pulse shown in ...) is selectively separated and output from the circuit 410.
The counter 409 is operated by a force pulse ((k) in FIG. 2).
Is reset. According to the latter method above, the above notes
The number of line memories constituting the memory 102 is arbitrarily set
It is possible to write and read the above series of write and read operations.
The effect that can be surely performed without excess or shortage of
Be done. A tape obtained by the above-described recording method of the present invention.
FIG. 3 shows a pattern diagram of the tracks on the loop 1. In FIG. 3, Ta1, Ta2, Ta3,
... is a track formed by scanning the head 4a.
, Tb1, Tb2, Tb3, ...
The track formed by the scanning of b is shown. The same
The broken lines A and B in the figure are output from the pulse forming circuit 8.
Rising and falling of the head switching signal ((d) in FIG. 2)
Indicates the corresponding position on the tape 1. Also, diagonal lines
The period τ shown in the section corresponds to the redundant period τ. In addition,
The subscripts (1 to 256) of each track are the recorded images described above.
Indicates the line number of the signal. As described above, according to the present invention, one vertical scanning period
Video signal containing N (= 262.5) horizontal scanning lines
((A) of FIG. 2), n (=
4) Divide into sets of segments and magnetically
To record on multiple parallel and diagonal tracks on Tape 1
Therefore, the above-mentioned video signal is
64 pieces within [N / n] (= 65)
4 sets of segmentation to include valid horizontal scan line unit signals
The time axis in units of horizontal scanning lines.
The signal of each segment of each set is converted and
Corresponding to a set of parallel diagonal tracks on the air tape,
Horizontal on any one track of each set of tracks
Arbitrary signal Li (i indicates the presence of the above video signal
The recording position of the effective scanning line is the above.
A signal L in units of horizontal scanning lines that follows the signal Li in time.
j (j is the line number of the effective scanning line of the video signal
Is an integer greater than i, j = i + h, and h is an integer of 1 or more.
(Number) when viewed in the scanning direction of the rotary head above the recording position
Horizontally running every h line in the order of Li and Lj
The above-mentioned first, second, third, and third having a time-series order in units of line
4 to form each signal block, and
Converts the time axis in units, and sets any period between signal blocks
A recorded video signal having a redundant signal of (τ) (see FIG.
(H)) is formed, and the first and the second of the recorded video signal are formed.
Corresponding to the above for each of the second, third, and fourth signal block units.
For each track of Ta1, Tb1, Ta2, Tb2,
Sequential recording is performed by the rotary head, and [N
/ N] × n (= 260) 256 effective horizontal lines
Characterized by recording video signals in units of scanning lines
And In the embodiment shown in FIG. 1, the first, second, and
Horizontal scanning lines output in the third and fourth signal blocks
Make sure that the line numbers of the unit signals are continuous, especially h
However, the present invention is not limited to this.
It is not specified, and h is set to an arbitrary integer value of 1 or more.
Can be set according to the gist of the present invention.
is there. Particularly in the case of the above-mentioned embodiment in which h = 1 is set,
Storage capacity of the memory 102 used for time axis conversion
Is a minimum depending on the amount of generation of the redundant signal period (τ).
The input video signal can be
About several lines (8 lines in the embodiment shown in FIG. 1)
Need only be able to store the information of
Can have an economic side effect. Also, in order to set the value of h above 2
In another embodiment, for example, the value of h is set to the number of segments n
In the case of h = n = 4 matched with the value of
Within the lock, output in chronological order every 4 lines of Li and Li + 4
From the memory 102,
As the signal block of 1, the line numbers 1, 5, 9, ...,
253 in that order as the second signal block
The second signal in the order of numbers 2, 6, 10, ..., 254
As blocks, line numbers 3, 7, 11, ..., 255
In the order of, as the fourth signal block, the line number
, 8, 12, 12, ..., 256 are output in this order,
This is repeatedly output in the field cycle, and each of the above signals is output.
For each track (Ta1, Tb
1, Ta2, Tb2) are sequentially recorded. in this way,
By setting the value of h to 2 or more, the input video signal
The signals in units of horizontal scanning lines that are continuous in time series are different.
Distributed on different tracks, and h lines on the same track
Each time it is recorded, the noise generated in the recording and reproducing system
Horizontal scanning due to effects such as cracks, distortion and dropouts
A side effect that is distributed and reduced in units of lines
Be done. In the present invention, the time shown in FIG.
The above-mentioned redundant period τ is provided by the axis conversion device 100a.
During playback due to the segment recording
The skew of is completely removed.
Also, as is clear from the above description, the time axis conversion
The video signal output from the device 100a and recorded is recorded.
Insufficient number of lines (specifically, line number per field)
Video signals of 256 lines from No. 1 to 256 are recorded.
However, the video included in the input original video signal from the terminal 200 is
6.5 lines per 262.5 lines per field
However, in the present invention, the above recording method
The shortage of the number of lines of the recorded video signal caused by the
Vertical blanking τ included in the original video signal _B Within the period of
It is something to make up for. Regarding the latter, especially at the time of recording
The disk servo circuit 9 shown in FIG.
Position where the number of lines is missing (x in FIG. 2 ₁ , X ₂ Shown in…
Is the vertical blanking of the original video signal ((a) in FIG. 2)
Period τ _B Rotational positions of the heads 4a and 4b so that they are positioned inside
The phase is controlled. By doing this, the number of lines above
Even if a dropout occurs, the line that is dropped is the original video signal.
It is within the vertical blanking period of
Of the video information that should be displayed on the playback screen
There will be no omissions and there will be no problems. Next, the video signal recorded as described above is reproduced.
The reproduction according to the present invention for recovering the original original video signal
FIG. 6 shows an embodiment of the raw apparatus, and waveforms of respective parts for explaining the operation thereof.
The figure is shown in FIG. In FIG. 6, the recording device of FIG.
Since it can be shared with some parts, the same number is assigned to the common part
Attached. Since the operation of these common parts is the same as above,
The description is omitted. The tape 1 is exchanged with the heads 4a and 4b.
The video signals reproduced mutually are reproduced by the reproduction video processing circuit 30b.
After being properly reproduced, the output ((a) in FIG. 7) is
It is supplied to the time axis converter 100b. Synchronous information output times
On the path 140 ', the reproduced video signal from the circuit 30b
Vertical synchronization information VS '((c) in FIG. 7) and horizontal synchronization information
HS '((d) in FIG. 7) is separated and output. Writing black
In the clock generation circuit 110 'from the circuit 140'
Write clock CP synchronized with the horizontal synchronization information HS 'of
2'is generated and output. A method of generating this write clock CP2 'and
The horizontal sync signal or the horizontal sync signal included in the reproduced video signal.
Is an instantaneous flash to the horizontal synchronization information HS 'such as a burst signal.
At least one horizontal scanning period is synchronized with the time phase.
Such that a continuous clock is obtained. Well
The write clock CP2 'of the octopus corresponds to the read clock of FIG.
Same frequency as lock CP2 '(f ₂ ) To generate
To be done. Write clock CP2 'from the circuit 110'
Causes the reproduced video signal from the circuit 30b to be A / D converted.
The conversion circuit 101 sequentially converts the digital signal. book
The embedded address control circuit 111 'is composed of a counter or the like.
The horizontal synchronization information HS 'from the circuit 140'.
Counting started, write clock from the circuit 110 '
Address signal corresponding to the count value of CP2 '
Is output as a write address signal for the memory 102.
Supplied. This address signal is the horizontal synchronization information H.
S'is successively updated in horizontal scanning cycle units, and
The output from the circuit 101 is stored in the memory in units of horizontal scanning.
It is sequentially written in 102. Here, as described above with reference to FIG.
At the transition of scanning of the heads 4a and 4b, that is, the circuit 8
Rising and rising of the head switching signal ((b) in FIG. 7) from
Corresponding to the downward phase, the positions indicated by broken lines A and B in FIG.
Is recorded so that the redundant period τ is located in
Therefore, the head switching signal causes the redundancy period τ to increase.
The location can be detected. Therefore, in the circuit 30b above
In response to a head switching signal from the circuit 8, the head 4a and
By alternately switching the video signals reproduced from 4b
Therefore, the video signal included in the scanning period T of the heads 4a and 4b is
It is possible to reliably reproduce all the issues without excess or deficiency of the line
it can. That is, when the value of h is set to 1,
Are line numbers 1 in the first scanning period T of the head 4a.
2, 3, ..., 64 are played in this order, and the next head 4b runs.
In the inspection period T, line numbers 65, 66, ..., 128 in order
In the next scanning period T of the head 4a, the line number 12
, 130, ..., 192 in that order, and the head 4b
In the scanning period T, line numbers 193, 194, ..., 256
The above operations are repeated at the field cycle.
Video signals that have been repeated back into one continuous video signal (see Fig. 7
(A)) is output from the circuit 30b. On the other hand, in the circuit 111 ',
From the circuit 140 'every scanning period T of the heads 4a and 4b.
The horizontal synchronization information HS '((d) in FIG. 7) has a predetermined number (this actual
In the embodiment, 64) counting is performed, and after the counting is completed, the next horizontal synchronization is performed.
The period until the information HS 'is input, that is, the redundant period
During the period corresponding to τ, the output of the write address signal is
Suspended temporarily. Therefore, during the redundancy period τ, the memory 1
No signal is written to 02, and during that period τ
Memory 102 produces a blank portion of the signal not written
Of course, the output from the circuit 101 is the line
Everything is horizontal (line numbers 1 to 256)
The data is sequentially written in the memory 102 in scan units. Horizontal synchronization in the circuit 111 '
As a method of counting the information HS ', it is shown by a broken line in FIG.
As described above, the head switching signal from the circuit 8 is supplied.
The head switching signal rises and falls and the water
The counting of the flat synchronization information HS 'is started and is input after that.
The horizontal synchronization information HS 'may be counted by a predetermined number.
However, instead of using this head switching signal, the above circuit 1
The vertical synchronization information VS '((c) in FIG. 7) from 40' is used.
The vertical synchronization information VS 'is used to determine the horizontal synchronization information H.
After counting S ', the horizontal synchronization information HS'
Even if it is repeatedly counted every predetermined number (64)
good. According to this latter counting method, the head
Even if a switching signal is not used, the location of the redundant period τ above
Self-detection based on the vertical synchronization information VS '
It Furthermore, the horizontal synchronization information H is obtained by this counting method.
It is obtained by counting a predetermined number of S'and ending the counting.
The counting end pulse ((e) in FIG. 7) is output from the circuit 111 '.
This counting end pulse is delayed by the delay circuit 141 at a predetermined time.
Latch circuit with a delay of τ ′ (= τ / 2) ((f) in FIG. 7)
At 142, the head switching signal from the circuit 8 is sent to the circuit.
Synchronize at the falling edge of the output from 141 ((f) in FIG. 7)
Then, from the circuit 142, as shown in FIG.
The rising and falling phases are within the redundancy period τ.
The included signal is obtained. Therefore, the output from this circuit 142 is shown in FIG.
Instead of the above head switching signal as shown in the broken line path of
The signal is supplied to the circuit 30b, and the signal is supplied to the head 4a and the head 4a.
The output from 4b may be switched alternately.
Similarly to the above, all of them are continuously reproduced without excess or deficiency of the line.
Can be output. Next, the read clock generation circuit 120 '
The same frequency as the write clock CP1 in FIG.
(F ₁ ) Read clock CP1 'is generated and output.
In the reference signal generation circuit 131, from the circuit 120 '
The clock is appropriately divided to obtain the original video signal (see FIG. 2).
Blanking with the same format and frequency as in (a))
A signal (including synchronization information) BLK, horizontal synchronization information H,
Vertical synchronization information V ((i) in FIG. 7) and this vertical synchronization
Predetermined time τ for information V ₃ Just ahead of time
The reference signal REF ((k) in FIG. 7) of each
I will be forced. The read address control circuit 121 shown in FIG.
The circuit is composed of a counter, etc., similar to the embodiment.
The horizontal synchronization information H from 131 starts counting,
The read clock CP1 'from the circuit 120' is counted.
Address signal corresponding to the count value is output,
With a read address signal in one line of the memory 102
And then supplied. This address signal is the horizontal synchronization information described above.
H is updated sequentially every h lines of the horizontal scanning cycle,
In addition, the horizontal synchronization information H is set to a predetermined number (25 in this embodiment).
6) After counting, the output of the read address signal is temporarily
Will be stopped. Vertical synchronization information V from the circuit 131
The above-mentioned series of counting operations is restarted by
The same operation is repeated. Therefore, the read address from the circuit 121 'is
D is sequentially read from the memory 102 by the dress signal.
Converted to analog signal by A / A converter 103 and output
As shown in (j) of FIG.
All of them (ie
All numbers from 1 to 256) are continuous in time
Can be obtained at. The output from this D / A conversion circuit 103 (Fig.
(J) of 7 is performed by the blanking signal insertion circuit 105.
The blanking signal BLK from the circuit 131 is inserted.
Be done. The reference signal REF from the circuit 131 is a
Provided to the disk servo circuit 9 as a servo reference signal during playback.
Is supplied by the circuit 9 and is exactly the same as described in FIG.
The same servo control is performed, and the reference signal REF and the above
Both of the head switching signals from the circuit 8 are in phase synchronization with each other.
More specifically, as shown in FIG.
No. REF ((h) of FIG. 7) and head switching signal (of FIG. 7)
(B)) Phase difference time τ ₁ So that the disc
The rotation of the motor 6 is controlled. The capstan motor 20 is a caps
The rotation is controlled by the torque servo circuit 21 '.
The capstan servo circuit 21 'includes the tape 1 and the head 4a.
And control the relative phase of 4b to reproduce the signal correctly
It is composed of a tracking control system for
Known ones are used. By the above servo control, the memory 10
Write operation to 2 precedes read operation by time
Controlled. Therefore, the video written in the memory 102
Stable time axis with no signal loss and fluctuations
Read correctly and deleted during recording as described above.
The blanking and synchronization information are read by the circuit 105.
Blanking signal BLK with the same stable time axis as
Supplemented by Therefore, the reproduced video signal is output from the terminal 400.
The skew and time axis fluctuation of ((a) of FIG. 7) are removed,
In addition, a stable video signal that faithfully restores the original video signal is output.
To be done. As is clear from the above, the present invention
Therefore, the correctable amount of skew is the redundancy period
is equal to τ and has sufficient skew as shown in Equation 6 above.
A compensation fee can be secured. The redundancy period τ is the same as the rotation of the head.
As shown in Fig. 3, it is generated on the tape.
Is recorded so that the redundant period τ is located at a fixed position of
The recording position does not change. Therefore, compatible reproduction becomes easy and reliable,
The performance and reliability of the device can be significantly improved. In addition, in the embodiment of FIG.
The delay time of the delay circuit 11 (τ shown in FIG. ₂ )
To be set appropriately for each scanning period T of the scanners 4a and 4b.
Therefore, as shown in the track pattern diagram of FIG.
Relative horizontal scanning line unit between rack and adjacent track
It is easy to change, such as aligning different recording patterns.
The tape 1 and the heads 4a and 4b relative speed.
The amount of misalignment of horizontal scanning lines at the end of the entire track (see Fig. 8
Indicate α _H ) Any recording pattern, without being constrained by
The crosstalk from adjacent and adjacent tracks.
Providing a device that can reduce the interference caused by
It is possible to obtain a secondary effect such as provision. As is clear from the above, the book
According to the recording method of the invention, the video signal to be recorded and reproduced is
All within the scanning period T of the above head (180 ° on the track
Within the period) and according to the present invention,
It is possible to easily detect the recording position on the tape of τ for a long period of time.
It is possible, and the recording position is set by the playback video signal.
Or predetermined synchronization information recorded in the redundancy period τ (see FIG. 2).
Since the self-detection can be reliably performed based on S2) of (j),
The above-mentioned FIG. 3 which is indispensable in the conventional analog recording method.
In the overlap areas Q1 and Q2 shown in
There is no need to record, in other words the recording density of the tape
Can be increased by that amount, and the recording time can be increased.
A secondary effect is also obtained. Furthermore, the above-mentioned overlap
A part of the areas Q1 and Q2 is a signal other than the video signal (for example,
For example, it is converted to a conventionally known digital signal and time-axis compression
PCM voice signal or pilot signal obtained by
Auxiliary tiger that can record the tracking control signal of
It can be used as a video recorder and enables high density recording of various signals.
You can also get the effect. Other signals in this overlap area Q
One of the track patterns according to the present invention when recording
An example is shown in FIG. In FIG. 9, A is the PCM audio signal.
Of the tracking control signal.
A recording area is shown, and V is a recording area of the video signal.
The shaded area corresponds to the redundancy period τ. In the overlap area Q, the video signal is
In order not to record
As shown by the path, the head switching signal from the circuit 8 is turned on.
It is supplied to the circuit 30a, and the head switching signal is supplied to the above circuit.
The head 4 is switched by alternately switching the video signal from the path 100a.
It is sufficient to supply alternately to a and 4b.
The target can be easily achieved. In the embodiment shown in FIGS. 1 and 6, the recording is performed.
Video signals such as NTSC, PAL, SECAM, etc.
Although the case of the current television system is shown, the present invention is not limited to this.
It is not the one of the current method and the number of scanning lines as described above.
Different television systems (for example, with 1125 horizontal scan lines)
High-definition television system) is also applicable. Also,
As the synchronization information of the video signal, the conventional horizontal scanning unit
Horizontal sync information (horizontal sync signal and burst signal) and vertical
When using vertical synchronization information (vertical synchronization signal) for each scanning unit
However, the present invention is not limited to this. example
For example, as shown in (a) of FIG.
Instead of horizontal blanking T _B Separately multiplexed to a part of
Sync information (negative horizontal sync signal HX and positive bar
Which can also be applied when a strike signal BX) is used
Also, as shown in (a) of FIG.
Report Y and chromaticity information C in one horizontal scanning period T _H Horizontal sync to
Divide one set of information (horizontal synchronization signal HX and burst signal BX)
In the case of allocation and time division multiplexing, or in FIG.
Multiple (eg, two) horizontal scans, as shown in (b)
One set of horizontal synchronization information (HX and BX) for each
In such a case, or as shown in FIG.
The bar without assigning the horizontal sync signal HX as the flat sync information.
If only the strike signal BX is assigned, or
Although not shown, the vertical synchronization information is provided as in the above embodiment.
Instead of assigning every frame period, for example, every frame period
When allocating to
Including, especially when not assigning vertical synchronization information
It is also applicable to, in any case
Also, based on the horizontal synchronization information included in each of the above video signals
By applying the time axis conversion, the desired redundancy period can be
And can achieve the above-mentioned object of the present invention.
It is a thing. Further, in the embodiment shown in FIG.
Frequency of clock CP1 (f ₁ ) And read clock frequency
Frequency of wave number CP2 (f ₂ ) Different from each other f ₁ <F
₂ By setting (more specifically, in the above equation 5,
By setting m / k> 1).
As described above, the effect that the redundancy period τ can be increased is obtained.
However, according to the present invention, another effect other than this can be obtained.
it can. That is, f ₁ <F ₂ The original video signal
Horizontal scanning period T _H On the other hand, in the circuit 100a,
Horizontal scanning cycle T of the axis-converted recording video signal _H ′ Is
T _H ′ <T _H And, so to speak, that time axis is compressed
And conversely, the time axis conversion device 100b
At that time axis will be extended. in this way,
According to the present invention, the time axis compression and expansion of a video signal are controlled by a circuit.
The effect that can be easily achieved without increasing the number of
In particular, some have been proposed as the above high-definition television system.
For the high quality MUSE method described in the above document,
The above-mentioned segment recording is easy due to the time axis compression and expansion.
The effect is obtained. That is, as described in the above document,
In the high quality MUSE method, as shown in FIG.
As the horizontal synchronization information, the maximum amplitude of the video signal is exceeded.
The so-called positive polarity horizontal sync signal HD with no amplitude
It is used as vertical synchronization information (not shown).
Also uses a vertical sync signal EP of positive polarity,
When recording a video signal in such a signal format,
FIG. 10 (a) shows the time axis conversion device 100a in advance.
As shown, the original video signal ((d) in Figure 10)
Blanking period of video obtained by compression
(T shown in FIG. 10A) _B Maximum of video signal during period)
Negative horizontal sync signal HX having a level exceeding amplitude
Or, together with this HX, a positive burst signal BX
Or, although not shown, the synchronization information HX, BX
In addition, the vertical sync information VX having the negative polarity is further appropriately generated and inserted.
After that, I recorded it, and when playing it back,
The reproduced video signal ((a) of FIG. 10) is transmitted to the device 100.
At the same time, the synchronization information HX,
By deleting BX and VX appropriately, the original original video signal
((D) of FIG. 10) can be restored. In addition,
An example of generating the above synchronization information HX, BX, VX
For example, the output pulse from the decoder 405 in FIG.
Blanking period T _B Output at the timing equivalent to
Therefore, the output pulse from the decoder 405 is appropriately set.
It is possible to generate the desired synchronization signal HX with a delay.
The clock from the terminal 420 based on the synchronizing signal HX.
The frequency is divided appropriately to have a specified frequency and a specified number of cycles.
It is possible to generate the desired burst signal BX
In addition, the output pulse from the circuit 410 (see FIG.
(K) is the vertical blanking period τ _B Located within
Therefore, based on the output from the circuit 410,
Is the vertical sync signal FP of the positive polarity included in the original video signal.
Vertical synchronization information VS from the circuit 140 obtained by separating
Generating the desired vertical synchronization information VX based on
And the synchronization information HX, BX, V thus generated
By supplying X to the circuit 104 and inserting it,
It is possible to obtain a desired recorded video signal ((a) in FIG. 10).
it can. Like the high-definition television system, the same positive polarity is used.
Since it has period information, it can be reproduced at the segment recording
Even when the separation is difficult, the recording method of the present invention described above
According to the method, separation of synchronization becomes easy and
Skew caused by recording can be completely removed, and time axis change
It is possible to correctly restore a stable and stable video signal.
Therefore, even with the above-mentioned high-definition TV system, segmentation is easy.
It is possible to realize the document recording. In the above embodiment, the single channel 2
Applying the present invention to a head-type helical scan VTR 4
Although the case of segment recording is shown, the present invention is not limited to this.
The number of heads that should be used is not one
As mentioned above, the number of segments to be recorded is 2 or more.
The number of channels to be set is one or more
It does not deviate from the purpose of Ming. As described above, according to the present invention, the screen
Queue and time axis fluctuation can be completely removed, and it is good and stable.
Magnetic recording for segment recording and playback of video signals
A playback device can be provided. Also high definition TV
As a part of the method proposed,
Realize segment recording even for video signals
And increase the recording density of the tape.
Better recording density compared to conventional digital recording methods
It is possible to easily increase the recording time and
Device cost, performance and reliability coupled with improved interchangeability
It is possible to obtain an effect such as a significant improvement.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of a video signal recording apparatus according to the present invention. FIG. 2 is a waveform chart of each part of the apparatus of FIG. FIG. 3 is a tape pattern diagram by the device of FIG. FIG. 4 is a block diagram showing an embodiment of a read clock generation circuit according to the present invention. FIG. 5 is a block diagram showing an embodiment of a read address control circuit according to the present invention. FIG. 6 is a block diagram showing an embodiment of a video signal reproducing apparatus according to the present invention. FIG. 7 is a waveform chart of each part of the apparatus of FIG. FIG. 8 is a diagram showing another tape pattern according to the present invention. FIG. 9 is a diagram showing another tape pattern according to the present invention. FIG. 10 is a waveform diagram showing another video signal format according to the present invention. [Description of Reference Signs] 100a, 100b ... Time axis conversion device 101 ... A / D conversion circuit 102 ... Memory 103 ... D / A conversion circuits 104, 105 ... Blanking signal insertion circuits 110, 110 '... Write clock generation circuit 111, 111 '... write address control circuit 120, 120' ... read clock generation circuit 121, 121 '... read address control circuit

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Katsuo Mohri             Stock, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa             Home Appliance Research Laboratory, Hitachi, Ltd.

Claims (1)

[Claims] 1. A video signal containing luminance information Y and color information C and including a number N of horizontal scanning lines at a period T is divided into n sets (n is an integer of 2 or more) of segments during the period T, and the tape is parallel to the tape by the rotary head. In a device having a structure for reproducing video signals recorded on a plurality of diagonal tracks, at least a part of the signals in the vertical blanking period is removed from the recorded video signals in the period T and the remaining The video signal includes a signal obtained by time-division multiplexing the luminance information Y and the color information C in effective horizontal scanning line units within [N / n] (maximum integer not exceeding N / n) lines per segment. As described above, the signal of each segment is divided, and the signal of each segment is made to correspond to one parallel slanted track of the tape to form a signal block to be recorded on each track. , Or One of the signal blocks is time-axis converted to generate a redundant signal of an arbitrary period between the signal blocks, and the redundant signal is sequentially recorded together with the signal block at a predetermined position of the track over the entire period, And a signal in which predetermined additional information is multiplexed and recorded during the period of the redundant signal, and at least signal reproducing means for reproducing the signal; the redundancy between the signal blocks of the reproduced video signal from the signal reproducing means. Video signal processing for switching the reproduction of the signal block within the signal period, performing time-axis conversion for each signal block, removing the redundant signal, and restoring and outputting a signal of the same format as the video signal. A means for reproducing a video signal, comprising: 2. The video signal processing means performs processing for reproducing the reproduction video signal based on the additional information multiplexed within the period of the redundant signal between the signal blocks of the reproduction video signal from the signal reproduction means. The video signal reproducing apparatus according to claim 1, which is configured.