JPH06244688A - 制御された遅延デジタルクロック信号発生装置 - Google Patents

制御された遅延デジタルクロック信号発生装置

Info

Publication number
JPH06244688A
JPH06244688A JP5316922A JP31692293A JPH06244688A JP H06244688 A JPH06244688 A JP H06244688A JP 5316922 A JP5316922 A JP 5316922A JP 31692293 A JP31692293 A JP 31692293A JP H06244688 A JPH06244688 A JP H06244688A
Authority
JP
Japan
Prior art keywords
signal
clock signal
ramp
generator
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5316922A
Other languages
English (en)
Japanese (ja)
Inventor
Carbou Pierre
ピエール カルブ
Guignon Pascal
パスカル ギュイニヨン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of JPH06244688A publication Critical patent/JPH06244688A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K4/00Generating pulses having essentially a finite slope or stepped portions
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/1506Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
    • H03K5/15073Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages using a plurality of comparators

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Medicines That Contain Protein Lipid Enzymes And Other Medicines (AREA)
JP5316922A 1992-12-16 1993-12-16 制御された遅延デジタルクロック信号発生装置 Pending JPH06244688A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9215170 1992-12-16
FR9215170A FR2699348B1 (fr) 1992-12-16 1992-12-16 Générateur numérique de signaux d'horloge à retard contrôlé.

Publications (1)

Publication Number Publication Date
JPH06244688A true JPH06244688A (ja) 1994-09-02

Family

ID=9436668

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5316922A Pending JPH06244688A (ja) 1992-12-16 1993-12-16 制御された遅延デジタルクロック信号発生装置

Country Status (7)

Country Link
EP (1) EP0603077B1 (OSRAM)
JP (1) JPH06244688A (OSRAM)
KR (1) KR100297083B1 (OSRAM)
CA (1) CA2111054A1 (OSRAM)
DE (1) DE69320604T2 (OSRAM)
FR (1) FR2699348B1 (OSRAM)
TW (1) TW286452B (OSRAM)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007215021A (ja) * 2006-02-10 2007-08-23 Fujitsu Ltd 位相調整回路および位相調整方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4119916A (en) * 1977-05-19 1978-10-10 The United States Of America As Represented By The Secretary Of The Navy Programmable charge coupled device timing system
US4137503A (en) * 1977-09-01 1979-01-30 Honeywell Inc. Phase shifting apparatus
JPS6354012A (ja) * 1986-08-25 1988-03-08 Hitachi Ltd スイツチトキヤパシタ差回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007215021A (ja) * 2006-02-10 2007-08-23 Fujitsu Ltd 位相調整回路および位相調整方法

Also Published As

Publication number Publication date
DE69320604T2 (de) 1999-01-14
KR940017227A (ko) 1994-07-26
FR2699348A1 (fr) 1994-06-17
KR100297083B1 (ko) 2001-10-24
DE69320604D1 (de) 1998-10-01
CA2111054A1 (en) 1994-06-17
EP0603077A1 (en) 1994-06-22
TW286452B (OSRAM) 1996-09-21
FR2699348B1 (fr) 1995-03-24
EP0603077B1 (en) 1998-08-26

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