JPH06235754A - Multiple-value voltage high-speed comparator - Google Patents

Abstract

PURPOSE:To improve comparison accuracy by making a differential detector absorb the bias current of a comparator for preventing an error voltage from being generated. CONSTITUTION:A multiple-value measurement voltage VXi input from a device 2 to be tested is compared with a multiple-value reference voltage VSi by a low-output impedance differential detector 9, the difference deltai is detected and is input to a window comparator 13, and then it is compared with a second comparison voltage VH which is larger than a first comparison voltage VL and a first comparison voltage VL. A control circuit 7 controls switching of the multiple-value measurement voltage VXi of the device 2 to be tested and at the same time supplies m-bit data Ni (bi1, bi2...bim) corresponding to a reference voltage VSi in synchronization with the switching timing. Input data Ni are D/A converted by a D/A converter 10 and are fed to a differential detector 9 as the reference voltage VSi. A buffer amplifier 12 with a high input impedance may be inserted to the input terminal of the differential detector 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-value voltage high-speed comparison apparatus for inputting a multi-value measurement voltage output from a device under test and comparing it with a multi-value reference voltage at high speed, and more particularly to improving accuracy.

[0002]

2. Description of the Related Art Since an output voltage VX _i (i = 1 to n) of a device under test such as an LCD driver IC is a multi-valued voltage in the range of ± several V to ± several tens of V, the conventional comparison apparatus is As shown in FIG. 3, the voltage is divided by resistors Ra and Rb to obtain ± 1
The voltage is reduced to 0 V or less, and the reduced voltage vx _i is applied to the comparators 3, 4
Is applied to the first input terminal of. The second input terminals of the comparators 3 and 4 receive the comparison voltages VL _i and VH from the comparison power supplies 5 and 6, respectively.
_i (but VL _i <VH _i ; i = 1 to n) are given respectively.

The output voltage V of the device under test 2
Switching of X _i and comparison voltage VL for comparison power supplies 5 and 6
The switching of _i and VH _i is controlled by the control circuit 7,
It is done in synchronization with each other. The input impedance of the comparison device 1 viewed from the input terminal IN side is set to a high impedance of 1 MΩ to 10 MΩ so as not to affect the device under test 2. Therefore, the resistors Ra and Rb forming the attenuator 8 have high resistance values of the order of MΩ, and generally have different resistance values.

The output voltage of the attenuator 8 is vx _i (i = 1 to 1)
n) and the outputs of the comparators 3 and 4 are OL and OH, respectively, when vx _i > VL _i , OL = H (high level); v
When x _i ≦ VL _i , OL = L (low level) When vx _i <VH _i , OH = H; vx _i ≧ VH _i
Then OH = L. Therefore, when VL _i <vx _i <VH _i , O
L = H, OH = H, and the measured voltage VX _i is good at that time, and is bad otherwise. It should be noted that the period (test cycle) T for testing vx _i is on the order of μs or less, and the test is performed at high speed. The comparators 3 and 4 described above are collectively called a window comparator.

[0005]

In the conventional high speed comparison device, the attenuator 8 inserted between the input terminal IN and the comparators 3 and 4 has a high resistance value of resistors Ra and Rb on the order of MΩ. It becomes the resistance value. By the way, since high-precision resistors of the order of MΩ cannot be obtained with the current technology, the error in the attenuation amount of the attenuator 8 must be considerably large.

Further, the bias current of the comparator itself flows to the input terminals of the comparators 3 and 4 though it is slight. Since this bias current flows through the resistor Rb of the attenuator 8, an error voltage is generated across the resistor Rb. In the conventional comparison device, since the error of the attenuator 8 and the error voltage due to the bias current of the comparators 3 and 4 exist, the comparison error is ± several tens mV.
There was a drawback that it became quite large. The purpose of this invention is
It is to solve these conventional drawbacks and improve the comparison accuracy.

[0007]

The multivalue voltage high-speed comparison apparatus of the present invention detects the difference between the multivalue measurement voltage (VX _i ) input from the device under test and the multivalue reference voltage (VS _i ). A differential detector having a low output impedance, a window comparator that compares an output voltage (δ _i ) of the differential detector with a first comparison voltage (VL) and a second comparison voltage (VH) larger than the first comparison voltage, and The multilevel measurement voltage (VX _i ) of the device under test is switched and controlled, and the multilevel reference voltage (VS) is switched in synchronization with the switching timing.
_i ) and means for generating.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention is shown in FIG. 1 by giving the same reference numerals to the portions corresponding to those in FIG. In the present invention, conventional attenuator 8 is deleted and newly difference detector 9 is used, the input voltage VX _i is the difference δ _i = VX _i -VS _i the detection of the reference voltage VS _i in the difference detector 9 Is supplied to the comparators 4 and 5, and the comparison voltages VL and V
Respectively compared with H.

The control circuit 7 supplies m-bit comparison data N _i (b _i1 , b _i2 ..., B _im ) corresponding to the reference voltage VS _i to the D / A converter 10 and D / A-converted.
The reference voltage VS _i is output. Further, under the control of the control circuit 7, the output voltage VX _{i of the} device under test 2 is switched in synchronization with the switching of the comparison data N _i (see FIG. 2). In the example of FIG. 2, in the test cycle T ₄ , the differential output δ ₄
<VL, so the outputs of the comparators 3 and 4 are OL = L,
OH = H, and it is determined to be defective.

The difference detector 9 comprises an operational amplifier OA and a resistor R.
₀ to R consists of _three, as is well known, the output voltage [delta] _i, when diverting R ₀ to R ₃ to represent the resistance value of the resistor _{R 0 ~R 3, δ i =} ( R ₀ / R ₁ ) VX _i − {R ₃ (R ₁ + R ₀ ) / R ₁ (R ₂ + R ₃ )} VS _i (1)

If R ₀ = R ₁ = R ₂ = R ₃ = R (2), then δ _i = VX _i −VS _i (3) The current flowing into the difference detector 9 from the input terminal IN is if I, voltage Va at point a, since it subtracting the voltage drop of the resistor R ₁ from _{VX i, Va = VX i -RI} ...... (4) on the other hand, Va resistors R to [delta] _i since it may be added to the voltage drop of _{0, Va = δ i + RI} ...... (5) (4), from _{(5), VX i -RI = δ i +} RI ∴ I = (VX i -δ i) / 2R (6) If the equation (6) is substituted for the input resistance R _in = VX _i / I seen from the input terminal IN, R _in = VX _i / I = VX _i · 2R / (VX _i −δ _i ) = 2R / (1-δ i / VX i) because it is _{...... (7) δ i / VX} i «1 ...... (8), R in ≒ 2R ...... (9) Therefore, the input resistance R _in MΩ so that it does not affect the device under test 2 To increase the over da is not Senebanara the MΩ order the resistance value R of the resistors. Therefore, the accuracy of the resistors R _{0 to} R ₃ is low. However, each resistor can be made with a common reference value R as a target, so each resistor R
_The error Δ _i of _{i with} respect to the reference value R is easy to align and does not cause much problem. For example, even if each resistance value can be increased by 20%, it is sufficient if the resistance values are the same.

If a buffer amplifier 12 composed of a voltage follower is inserted on the input side of the difference detector 9 as shown in FIG. 1B, the input impedance thereof is extremely high.
It is possible to reduce the input impedance of the differential circuit composed of _{0 to} R ₃ and OA. Therefore, by reducing the resistance value of the resistors R _{0 to} R ₃ , a highly accurate one can be easily obtained, and the accuracy of the output differential voltage is significantly improved.

The bias current at the input terminals of the comparators 3 and 4 flows through the output terminal of the operational amplifier OA, but since the output impedance of OA is almost zero, the error voltage generated by the bias current is extremely small and can be ignored. be able to. Since the comparators 3, 4, the comparison power supplies 5, 6 and the control circuit 7 are equipped in a normal IC tester, they can be used.

[0014]

Effects of the Invention According to the present invention, since the difference between the input voltage VX _i and the reference voltage VS _i [delta] _i (significantly less than generally the input voltage) is input to the comparator 3 and 4, conventionally, the comparator 3 , 4 the input voltage VX _i is kept within ± 10 V, the attenuator with a large error is not required.

Since the bias currents of the comparators 3 and 4 are absorbed at the output side of the low output impedance operational amplifier OA of the difference detector 9, no error voltage is generated. For the above reason, according to the present invention, voltage comparison can be performed with a much higher accuracy than in the past.

[Brief description of drawings]

FIG. 1A is a circuit diagram showing an embodiment of the present invention, and B is FIG.
6 is a circuit diagram showing a modification of the difference detector 9 of FIG.

2A is a multi-valued measurement voltage VX of FIG._iAnd multilevel reference voltage
Pressure VS_iEach test cycle T _iAn example of changes in
The figure, B shows the difference detector output δ of FIG._iEach test size
Kuru T_iThe figure which shows an example of the change in.

FIG. 3A is a circuit diagram of a conventional multi-value voltage high-speed comparator, B
Is each test cycle T _i of the comparator input voltage vx _i of FIG.
The figure which shows an example of the change in.

Claims (1)

[Claims] 1. A low-output impedance difference detector for detecting a difference between a multivalued measurement voltage (VX _i ) input from a device under test and a multivalued reference voltage (VS _i ) and an output of the difference detector. The voltage (δ _i ) is compared with the first comparison voltage (V
L) and a second comparison voltage (VH) larger than the first comparison voltage
And a means for controlling the switching of the multi-valued measurement voltage (VX _i ) of the device under test and generating the multi-valued reference voltage (VS _i ) which switches in synchronization with the switching timing. Comprising a multi-value voltage high-speed comparator.