JPH062344Y2 - Digital signal input switching device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Use The present invention includes first and second digital input terminals to which a digital signal is electrically input, and the first or second digital input terminal is operated according to a switching operation of a switch. The present invention relates to a digital signal input switching device that selects a digital signal input to a second digital input terminal, and particularly, the first digital input terminal and the second digital input terminal are provided on a rear panel and a front panel of a device. The present invention relates to a digital signal input switching device that is suitable for use in devices that are provided separately from each other.

(B) Conventional technology Recently, CD players, DAT (digital audio
Many digital audio source devices that handle audio information as digital signals, such as tape recorders) or BS tuners (tuners for satellite broadcast reception),
A digital output function for outputting the audio information as a digital signal is provided. The digital signal output from the digital audio source device is EIAJ.
Since it conforms to the digital audio interface standard (EIAJ standard CP-340) standardized by (Japan Electronic Machinery Manufacturers Association), an audio amplifier has been added with the advent of the digital audio source device having the digital output function. Initially, some audio equipment has been commercialized, which has a digital input function conforming to the above-mentioned standard and is configured to directly input a digital signal from the digital audio source device.

By the way, an audio device having a digital input function is generally provided with a plurality of digital input terminals so that a digital signal input to a desired digital input terminal can be selected. For example, the audio signal is input to two digital input terminals. A digital signal input switching device for switching a digital signal is constituted by using a gate circuit as disclosed in, for example, Japanese Utility Model Laid-Open No. 63-526.

Such a digital signal input switching device can select a digital signal input to a desired digital input terminal by manually switching a switch, and receives a digital signal electrically transmitted by a coaxial cable having an impedance characteristic of 75Ω. As a device having a digital input function, for example, a circuit shown in FIG. 2 is general. In FIG. 2, (1) and (2) are the first and second digital input terminals, and (3) and (4) are the inputs at the first and second digital input terminals (1) and (2), respectively. The first and second resistors for matching the impedance to the characteristic impedance of the coaxial cable (not shown), (5) and (6) are connected to the first and second digital input terminals (1) and (2), respectively. The first and second input amplifiers (7) and (8), which receive the input digital signals, respectively, have one input terminal at each output terminal of the first and second input amplifiers (5) and (6). Open drain first and second NAND gates connected to each other and having output terminals connected to each other, one end of which is directly connected to the other input end of the first NAND gate (7) through an inverter (10) It is connected to the other input terminal of the second NAND gate (8) and also through a resistor (11). Te power supply voltage (+ V
_DD ) and the other end is grounded.

First, when selecting the digital signal input to the first digital input terminal (1), the switch (9) is closed. Then, since one end (point A) of the switch (9) becomes the “L” level of the ground potential, the first and second NAND gates are provided.
"H" and "L" level signals are applied to the other input terminals of (7) and (8), respectively. Therefore, the first NAND gate 7 generates a signal in which the level of the digital signal output from the first input amplifier 1 is inverted. On the other hand, the second NAND gate (8) always generates an "H" level signal regardless of the digital signal output from the second input amplifier (2). Here, the second NAND gate (8)
Has an open drain output configuration, the output terminal of the second NAND gate (8) is in a high impedance state when the output of the second NAND gate (8) is at "H" level.
As a result, the first NAND gate is output from the output terminal (12).
A signal corresponding to the output signal from (7), that is, a signal corresponding to the digital signal input to the first digital input terminal (1) is derived.

On the other hand, when selecting the digital signal input to the second digital input terminal (2), the switch (9) is opened. Then, the point A becomes the “H” level of the power supply voltage (+ V _DD ), so that the other input ends of the first and second NAND gates (7) and (8) are at the “L” and “H” levels, respectively. Signal is applied. Therefore, the first NAND gate (7) always generates an "H" level signal regardless of the digital signal output from the first input amplifier (5), and the second NAND gate (7)
(8) generates a signal in which the level of the digital signal output from the second input amplifier (6) is inverted. As a result, in the future, the signal corresponding to the output signal from the second NAND gate (8) from the output terminal (12), that is, the signal corresponding to the digital signal input to the second digital input terminal (2) Is derived.

Therefore, the digital signal input switching device of FIG.
The digital signal input to the first or second digital input terminal (1) or (2) can be selected by switching the switch (9).

In addition, the digital signal according to the above-mentioned standard inputted to the first and second digital input terminals (1) and (2) is a bi-phase mark type digital signal,
There is no problem even if the digital signals input to the digital input terminals (1) and (2) and the digital signal output from the output terminal (12) are inverted in level.

(C) Problems to be Solved by the Invention However, in the digital signal input switching device of FIG. 2, the first digital input terminal (1) is provided on the rear panel of the device, and the second digital input terminal (2) is connected to the device. When the first digital input terminal (1) and the second digital input terminal (2) are provided at positions separated from each other as provided on the front panel, the one shown in FIG. In addition to the two wires described above, a single wire for control in which the switch (9) is inserted is required, and three lead wires need to be routed inside the device, which is disadvantageous in manufacturing cost and workability.

(D) Means for Solving the Problems The present invention is a digital signal input switching device made in view of the above points, which is connected in series with each other and is composed of third and fourth resistors for dividing a power supply voltage. And a voltage divider circuit in which the fourth resistor is connected in parallel to the second resistor for matching with the connection cable of the second digital input terminal, and the voltage divider circuit is interposed in series between the third and fourth resistors. A switch inserted in the signal path for transmitting the digital signal input to the second digital input terminal to the second input amplifier, and the first input amplifier selectively according to one signal level generated at one end of the switch. A first gate circuit for deriving a signal generated from the second input circuit, and a second gate circuit for selectively deriving a signal generated from the second input amplifier according to a signal level of the other signal generated at one end of the switch. hand That.

(E) Function This invention has a coaxial cable with a characteristic impedance of 75Ω.
Note that the control signal for switching between two digital signals is superimposed on the signal path for transmitting the digital signal, paying attention to the fact that it is sufficiently lower than the number K to several tens of KΩ of the gate pull-up resistance of the CMOS which is normally used. Similarly, a switch for switching between two digital signals is inserted in the signal path, and one of the two voltage-dividing resistors that are connected in series and constitute a voltage dividing circuit that divides the power supply voltage is used as a matching resistor for the coaxial cable. By connecting in parallel with each other and connecting the switches in series between the voltage dividing resistors, one of the first and second gate circuits is selectively turned on in response to a switching operation of the switch inserted in one of the signal paths. In this state, the input digital signal can be switched.

(F) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention.
2) is a digital signal output from a device on the output side is input via a coaxial cable (not shown), and first and second digital input terminals (23 ) And (24) are the first and second digital input terminals (21) and (22), respectively.
The first and second resistors for matching the input impedance in the coaxial cable with the coaxial cable, (25) and (26) are digital signals input to the first and second digital input terminals (21) and (22), respectively. First and second input amplifiers (27) for receiving are respectively inserted in a signal path (28) for transmitting a digital signal input to the second digital input terminal (22) to the second input amplifier (26). A switch provided on the front panel of the device and ( 29 ) are connected in series with each other, and are third and fourth for dividing the power supply voltage (+ V _DD ).
A voltage divider circuit comprising resistors (30) and (31), wherein the fourth resistor (31) is connected in parallel to the second resistor (24) and the third and fourth resistors (30). )
The switch (27) is interposed in series between and (31). (32) has one input end of the first input amplifier (2
A first NAND gate having an open drain output connected to the output end of 5) and the other input end directly connected to one end of the switch (27), and (33) one input end of which is the second input amplifier A second NAND gate having an open drain output, which is connected to the output terminal of (26) and has the other input terminal connected to one end of the switch (27) through an inverter (34), and (35) is the first And the second NAND gate (32) and (3
It is the output terminal to which the output end of 3) is connected.

First, when selecting the digital signal input to the first digital input terminal (21), the switch (27) is opened. Then, one end (point B) of the switch (27) is connected to the power supply voltage (+ V).
_DD ) becomes "H" level, so the first NAND gate (3
The "H" level is applied to the other input terminal of 2) as it is, and the "L" level is applied to the other input terminal of the second NAND gate (33) by the inverter (34). Therefore, the output of the first NAND gate (32) has a level obtained by inverting the digital signal output from the first input amplifier (25),
The output of the second NAND gate (33) is the second input amplifier (26).
It is always at the "H" level regardless of the digital signal output from. Here, the first input amplifier (25) inputs the first digital input terminal (21) to the coupling capacitor (3).
An output corresponding to the digital signal input to the first input amplifier (25) via 6) is generated. The second NAND gate 33 has an open drain output configuration. As a result, a signal corresponding to the digital signal input to the first digital input terminal (21) is derived from the output terminal (35).

On the other hand, when selecting the digital signal input to the second digital input terminal (22), the switch (27) is closed. Then, at the point B, a voltage obtained by dividing the power supply voltage (+ V _DD ) by the voltage division ratio of the resistance value of the third resistor (30) and the resistance value of the fourth resistor (31) is generated. Here, the third and fourth resistors (30)
And (31) have resistance values of several tens of KΩ and several KΩ, respectively.
The voltage obtained by dividing the power supply voltage (+ V _DD ) by the voltage division ratio between the resistance value of the third resistor (30) and the resistance value of the fourth resistor (31) is the first NAND gate (32) and the inverter (34). Is generally set to the "L" level of the first NAND gate.
Since the (32), the second NAND gate (33) and the inverter (34) are composed of CMOS, for example, the power supply voltage (+
When V _DD ) is 5 V, the third and fourth resistors (30) and (31) have resistance values of 10 KΩ and 1 KΩ, respectively. Therefore, when the switch (27) is closed, the point B becomes "L" level, so that "L" level is applied as it is to the other input terminal of the first NAND gate (32), The "H" level is applied to the other input terminal of the two NAND gate (33) by the inverter (34). Therefore, the output of the first NAND gate (32) is always at "H" level according to the digital signal output from the first input amplifier (25), and the output of the second NAND gate (33) is the second input amplifier. The digital signal output from (26) becomes the inverted level. Here, the second input amplifier (2
6) is input to the second digital input terminal (22) and is input to the second input amplifier (26) through the DC blocking capacitor (37), the switch (27) and the coupling capacitor (38). An output corresponding to the digital signal is generated, but in this case, the third
And the fourth resistances (30) and (31) are connected in parallel to the second resistance (24), and the second resistance (24) has a resistance value of 75Ω according to the characteristic impedance of the coaxial cable. In contrast,
Since the resistance values of the third and fourth resistors (30) and (31) are several tens KΩ and several KΩ, respectively, the third and fourth resistors are
The influence of (30) and (31) on the digital signal input to the second digital input terminal (22) can be ignored. As a result, a signal corresponding to the digital signal input to the second digital input terminal (22) is derived from the output terminal (35).

Therefore, the digital signal input to the first or second digital input terminal (21) or (22) can be selected by switching the switch (27).

(G) Effect of the Invention As described above, the digital signal input switching device according to the present invention includes the first and second gate circuits for selecting the digital signals input to the first and second digital input terminals, respectively. Since the control signal for controlling is superimposed on the signal path for transmitting the digital signal, a lead wire for transmitting the control signal is not required, and the first digital input terminal and the second digital input terminal are separated from each other. In the case of a device provided at a different position, there is an advantage that the lead wire does not need to be routed inside the device, workability is good, and manufacturing cost is low.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional digital signal input switching device. Description of main drawing numbers (21) (22)… digital input terminals, (23) (24)… resistors, (25) (2
6)… Input amplifier, (27)… Switch, ( 29 )… Voltage divider circuit, (3
2) (33)… Nand gate.

Claims (1)

[Scope of utility model registration request] 1. A digital signal input switching device comprising first and second digital input terminals to which a digital signal is electrically input and which selects the digital signal input to the first or second digital input terminal. A first input amplifier that receives the digital signal input to the first digital input terminal, a second input amplifier that receives the digital signal input to the second digital input terminal, and an input impedance at the first digital input terminal A first resistor for matching with a connection cable through which a digital signal output from the output side device is transmitted, and an input impedance at the second digital input terminal through which a digital signal output from the output side device is transmitted. A second resistor for matching the connection cable with the third connection and a third resistor for connecting the power supply voltage in series with each other. And a fourth resistor, the fourth resistor being connected in parallel to the second resistor, and a voltage divider circuit connected in series between the third and fourth resistors and the second digital input. A switch inserted in a signal path for transmitting a digital signal input to a terminal to the second input amplifier, and a signal selectively generated from the first input amplifier according to a signal level generated at one end of the switch. And a second gate circuit that selectively derives a signal generated from the second input amplifier according to a signal level generated at one end of the switch,
A digital signal input switching device characterized in that the first or second gate circuit is selectively brought into a lead-out state in accordance with a switching operation of the switch.