JPH0441448Y2 - - Google Patents

Description

[Detailed explanation of the idea] The present invention will be explained in the following order.

A. Industrial field of application B. Outline of the invention C. Conventional technology (Figures 7 to 9) D. Problem that the invention attempts to solve (Figure 7) E. Means for solving the problem (Figure 1) ) F Effect (Figure 1) G Example (Figures 1 to 6) (G1) First embodiment (Figures 1 and 2) (G2) Application example (Figures 1 to 4) (G3) Other embodiments (Figures 5 and 6) H Effect of the invention A Field of industrial application The invention relates to interface circuits, e.g.
It can be applied to the part that connects external signal lines in video tape recorders (VTRs), tuners, etc. that construct AV (audio and video) systems.

B. Summary of the invention The present invention enables terminals to be used as input terminals and output terminals in interface circuits provided in the input/output section of electronic devices that connect external signal lines, and also allows terminals to be used as input terminals. When used as an output terminal, the input circuit, output circuit, and impedance matching resistor can be appropriately switched and connected to the terminal, making it easy to connect signal lines and building a system with multiple electronic devices. In this case, the number of signal lines required can be significantly reduced compared to the conventional method.

C. Prior Art Conventionally, as shown in FIG. 7, there is an AV system in which video signals are transmitted and received between two VTRs 1 and 2 and a tuner 3.
In this system, it is also possible to use the video signal received and selected by the tuner 3 to be supplied to both VTRs 1 and 2.
The video signal played on VTR 1 can be recorded on the other VTR 2 (so-called dubbing), and conversely, the video signal played on VTR 2 can be recorded on the other VTR 2.
It can also be used to record on VTR1.

It is troublesome to repeatedly perform connection operations for each of these three usage modes. Therefore, conventional AV
The system connects each of the devices 1 to 3 to a selector 4, and switches a switch circuit 5 within the selector 4 to obtain a desired connection.

In Figure 7, the output terminal 1 of each device 1 to 3 _{is put}
~3 _puts are respectively connected to the input terminal 4 of the selector 4 via signal lines 61 to 63 made of coaxial cables, for example.
_io1 to io4 are connected to _io3 to supply a video signal to the selector 4.

Each of the input terminals 4 _io1 to 4 _io3 is connected to input terminals 51 to 53 of the switch circuit 5 via input circuits 71 to 73 having a detailed configuration shown in FIG. A common output terminal 50 of the switch circuit 5 is connected to an amplifier circuit 6, and after the video signal selected by the switch circuit 5 is amplified via the amplifier circuit 6,
Output circuits 81 and 8 having the detailed configuration shown in the figure
It is designed to be given to 2.

The video signal that has passed through the output circuit 81 or 82 is sent out through the output terminal 4 _put1 or 4 _put2 to a signal line 91 or 92 made of, for example, a coaxial cable.
1 _io1 and 1 _io2 of VTR 2.

Here, the switch circuit 5 receives a switching command signal from the tuner 3 which also operates as a control center.
The switching operation is performed in response to the switching command signal COM. For example, when supplying the video signal obtained by receiving and selecting a channel with tuner 3 to VTRs 1 and 2,
The operator performs a predetermined operation on the tuner 3 to cause the tuner 3 to send a switching command signal COM to the switch circuit 5 to switch the input terminal 53, thereby establishing the transmission line of the desired connection mode. Let it form.

Further, in FIG. 7, input circuits 71 to 73 and output circuits 81 and 82 in the selector 4 are for impedance matching.

The input circuits 7X, 71 to 73 are connected to the input terminals 4 _iox , 4 _io1 to 4 _io3 and the switch circuit 5 as shown in FIG.
an input buffer amplifier 7 inserted between the input terminals 5X, 51 to 53, and a resistor R connected between the input terminal of the input buffer amplifier 7 and the ground.
It becomes 1. The value of the resistor R1 is the signal line 6X, 61~
63 characteristic impedance (e.g. 75 [Ω])
are selected equally. On the other hand, the output circuit 8
Y, 81, 82 are the amplifier circuit 6 as shown in FIG.
output terminal and output terminal of selector 4 4 _putY , 4 _put1 ,
4 Output buffer amplifier path 8 and resistor R between _put2
2 and 2 are inserted sequentially. Here, the value of the resistor R2 is selected to be equal to the characteristic impedance (for example, 75 [Ω]) of the signal lines 9Y, 91, and 92.

In this way, a situation in which ringing occurs due to reflection in the video signal due to matching is prevented.

Problems that the invention aims to solve However, in the conventional AV system, instead of directly connecting each device 1 to 3, the signals from each device 1 to 3 are sent to the selector 4 via signal lines 61 to 63. Since the signals selected by the selector 4 are connected via the selector 4 so that they are redistributed to each device 1 and 2 via the signal lines 91 and 92, the signal lines of the entire system are In addition, the signal lines for input and output are separate, making the connection complicated. Therefore, there is a risk of erroneous connection, and there is also the disadvantage that the connection operation takes a long time.

This idea was created taking the above points into consideration.
For example, when a predetermined system is constructed by connecting a plurality of devices with a plurality of signal lines, the present invention aims to provide an interface circuit that can be constructed with a small number of signal lines and with simple operations.

E. Means for solving the problem In order to solve the problem, in the present invention, when not connected to the first signal line, the first resistor R5 is connected to the impedance matching resistor R5 in the input mode, and a first terminal 11 that separates from the first resistor R5 when connected to the first signal line.
and a second resistor R6 which is connected to the second resistor R6 for impedance matching in the input mode when not connected to the second signal line, and which is separated from the second resistor R6 when connected to the second signal line. 2 terminal 12
In the output mode, the output circuit 14 of the electronic device is connected to the first and second terminals 11 and 12 via the third resistor (R3 and R4 in the first embodiment) for impedance matching in the output mode. Connect the input circuit (13) of the electronic device to the first one in the input mode.
and connection means (SW1 to SW3 in the first embodiment) connected to the second terminals 11 and 12.

F Effect Connection means (SW1 to SW3) in input mode
Input circuit 13 is connected to terminals 11 and 12 by. In this state, the signal line is connected to one terminal
1 or 12, this terminal 11 or 1
A signal is taken in through 2. At this time, one resistor R5 or R6 is disconnected, but since the other resistor R6 or R5 is connected, impedance matching can be obtained.

Also, when the input mode is selected,
When a signal line is connected to both terminals 11 and 12, both resistors R5 and R6 are disconnected. Therefore, from the point of view of impedance matching, it is just a transmission line. At this time, the signal is taken into the input circuit 13.

Connection means (SW1 to SW3) in output mode
The output circuit 14 is connected to the terminals 11 and 12 via the resistors R3 and R4, and a signal is sent out.
At this time, impedance matching can be achieved by the resistors R3 and R4.

G. Embodiment Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

(G1) First Example First, the first embodiment of the interface circuit according to the present invention
Examples will be explained in detail. In FIG. 1, 10 generally indicates an interface circuit provided in the input/output section of a VTR or a tuner, and this interface circuit 10 has two input/output terminals 11 and 12 which are also used as input terminals or output terminals. has.

The input/output terminal 11 is directly connected through the input point A to the input end of an input buffer amplifier 13 whose input impedance is selected to be sufficiently larger than the characteristic impedance of the signal line, while the input/output terminal 12 is As shown in the figure, it is connected to the input end of the input buffer amplifier 13 via the switch SW1, which is controlled to open and close, and via the input point A, and thus input signals applied to the input/output terminals 11 and 12 in the input mode. The signal is sent to the main circuit via the input buffer amplifier 13 or via the switch SW1 and the input buffer amplifier 13.

Further, the output terminal of the output buffer amplifier 14 passes through the output point B, is connected to the input/output terminal 11 through the input point A via a resistor R3, and a switch SW2 whose opening/closing is controlled as shown in FIG. , the output terminal of the output buffer amplifier 14 passes through the output point B, and is connected to the switch SW1 and the input/output terminal 1 via a resistor R4 and a switch SW3 whose opening/closing is controlled as shown in FIG.
It is connected to the input/output terminal 12 through the connection midpoint C with 2. Thus, in the output mode, the output signal from the main circuit is passed through the output buffer amplifier 14,
Further, the signal is sent from the input/output terminal 11 to a signal line (not shown) via the resistor R3 and the switch SW2, or via the output buffer amplifier 14, and then to the resistor R3.
4. The signal is sent from the input/output terminal 12 to the signal line via the switch SW3.

Each input/output terminal 11, 12 is in an open state when the signal line terminal is connected to the input/output terminal 11, 12, and is in a closed state when the signal line terminal is not connected to the input/output terminal 11, 12. switch in
SW4 and SW5 are connected, and this switch
One end of resistor R5 or R6 is connected to input/output terminal 11 or 12 via SW4 or SW5. Note that the other ends of the resistors R5 and 5R6 are grounded.

For example, if the signal line terminal is a plug and the input/output terminal 11 or 12 is a jack,
When the plug is inserted into the jack, it is mechanically operated to open the switch SW4 or SW5.

Here, the values of each of the resistors R3 to R6 are such that the input impedance of the device including the interface circuit 10 is equal to the characteristic impedance of the signal line (for example, 75 [Ω]) in the signal input mode, and the signal output The output impedance of the device including the interface circuit 10 is selected to be equal to the characteristic impedance of the signal line in the mode so that it is equal to the characteristic impedance of the signal line.

In the above configuration, when the input mode is selected for the device including the interface circuit 10, the switch SW1 closes and the switches SW2 and SW3 open, as shown in FIG.

In this input mode selection state, when a signal line terminal is connected to only one input/output terminal, for example, input/output terminal 11, switch SW4 is opened and resistor R5 is disconnected. Therefore, when looking at the device main body from input point A, the input buffer amplifier 13
The input side impedance of R6 and the impedance of resistor R6 are connected in parallel (the 8th
(see figure). Here, since the input side impedance of the input buffer amplifier 13 is sufficiently larger than the impedance of the resistor R6, the input impedance when viewed from the input/output terminal 11 is approximately equal to the value of the resistor R6, in other words, in the input mode. The input impedance becomes equal to the characteristic impedance of the signal line, and matching can be obtained.

Furthermore, in the input mode selection state, when signal line terminals are connected to both input/output terminals 11 and 12, both resistors R5 and R6 are disconnected, and the input impedance seen from the input point A is the same as that of the input buffer amplifier 13. This becomes the input impedance. At this time, an input signal consisting of a voltage signal is sent from one input/output terminal to the other input/output terminal, and is also applied to the main circuit of the device via the input buffer amplifier 13.

On the other hand, when the output mode is selected for the device including the interface circuit 10, the switch SW1 opens and the switches SW2 and SW3 close, as shown in FIG.

In this output mode selection state, when the terminal of the signal line is connected to the input/output terminal 11 or 12, the resistor R5 or R6 is disconnected. Therefore, the output impedance of the device viewed from the input/output terminal 11 or 12 is approximately equal to the value of the resistor R3 or R4, and is approximately equal to the characteristic impedance, so that impedance matching can be obtained. At this time, the output signal is output from the output buffer amplifier 1.
4, via resistor R3, or output buffer amplifier 14, via resistor R4.

According to the above-described embodiment, since the terminal is provided commonly for input and output, the operator can connect the signal line to the device without considering the input terminal or the output terminal, thereby simplifying the connection operation. Therefore, erroneous connections can be significantly reduced compared to conventional devices.

Therefore, if the input terminal and the output terminal are simply used in common, impedance matching becomes a problem, but it is possible to switch the matching resistors R3 to R6 to the input/output terminals 11 or 12 depending on the input mode and output mode. Since they are connected, impedance matching can be obtained both when used in the input mode and when used in the output mode.

(G2) Application example When constructing an AV system using multiple devices that handle video signals, such as VTRs, tuners, and monitors to which the interface circuit 10 shown in FIG. 1 is applied, each device 20 as shown in FIG. ₁ ,
20 ₂ ,...20 _N are signal lines 21 ₁ for video signals
₂ , 21 ₂₃ , . . . 21 _(N-1)N and control signal lines 22 ₁₂ , 22 ₂₃ , . . . 22 _(N-1)N .

That is, the input/output terminal 12 ₁ in the interface circuit of the device 20 ₁ and the input/output terminal 11 ₂ in the interface circuit of the device 20 ₂ are connected to the signal line 2.
1 ₁₂ , connect the input/output terminals 12 ₂ of the device 20 ₂ and the input/output terminals 11 ₃ of the device 20 ₃ with the signal wires 21 ₂₃ , and then connect the input/output terminals 12 _U (U
=1 to N) and 11 _U+1 are connected by a signal line 21 _U(U+1) . In addition, the output terminal 23 ₁₀ for control signals of the device 20 ₁ and the input terminal 23 _2i for control signals of the device 20 ₂ are connected by the signal line 22 ₁₂ , and the output terminal 23 20 for control signals of the device 20 ₂ and the input terminal 23 _2i for the control signal of the device 20 2 are connected. Connect the control signal input terminal 23 _3i of ₃ with the signal line 22 ₂₃ , and connect the control signal output terminal 23 _UO of the adjacent device and the control signal input terminal 23 _(U+1)i with the signal line 22. Connect with _U(U+1) .

Here, one of the devices 20 ₁ to 20 _N , for example, the device 20 ₁ operates as a control center,
A control signal is sent through the control signal lines 22 ₁₂ to 22 _(N-1)N so that only one of the devices 20 ₁ to 20 _N is set to output mode and the other devices are set to input mode. It is done like this.

Next, the device 20 ₁ sends out a control signal in response to the operator's operation, and the device 20 ₁ (I=1
~N) is set to output mode, and other equipment 20
The operation when ₁ to 20 _I-1 and 20 _I+1 to 20 _N are set as input modes will be explained.

In this case, since the output mode has been selected for the device _20I , switches SW2 and SW3 are closed, and the main circuit is output from the buffer amplifier 14 and the resistor R3.
Or connect to input/output terminals 11 and 12 via R4. Further, since the signal line is connected to both input/output terminals 11 and 12, the resistors R5 and R6 are disconnected.

For the devices 20 ₂ to 20 _I-1 and 20 _I+1 to 20 _N-1 , the input mode is selected, and both input and output terminals 11
Since signal lines are connected to terminals 11 and 12, input/output terminals 11 and 12 are short-circuited via switch SW3.

In addition, the input mode is selected for the devices 20 ₁ and 20 _N , and one input/output terminal 11 or 12
Since the signal line is connected only to the input point A, one of the resistors R5 and R6 is connected to the input point A.

Therefore, device 20 _I is set to output mode, and other devices 2
When 0 ₁ to 20 _I-1 and 20 _I+1 to 20 _N are set as input modes, the input/output sections of each device 20 ₁ to 20 _N are equivalent to being connected as shown in FIG. 4. That is, the input end of the input buffer amplifier ₁₃ of each device 20 ₁ to 20 _I-1 is connected to the transmission line L1 connected to the impedance matching resistor R3 of the signal output device 20 I, and the resistor of the device 20 ₁ is R5 is connected. In addition, the input ends of the input buffer amplifiers ₁₃ of each device 20 I+1 to 20 _N are connected to the transmission line L2 connected to the impedance matching resistor R4 of the signal output device 20 I, and the input end of the input buffer amplifier 13 of each device 20 _I+1 to 20 _N is is connected.

Therefore, for the transmission line L1, the output impedance due to the resistor R3 of the signal output device _20I and the value of the terminating resistor R5 included in the device ₂₀₁ are both equal to the characteristic impedance of the signal line, and impedance matching can be obtained. , and the transmission line L
Regarding No. 2, the output impedance due to the resistor R4 of the signal output device 20 _I and the value of the terminating resistor R6 included in the device 20 _N are both equal to the characteristic impedance of the signal line, so that impedance matching can be obtained.

At this time, the output video signal sent from the device _20I is transmitted from each device ₂₀₁ to _20I-1 , 20I ₊₁ to _20N
each device 20 ₁ through the input buffer amplifier 13
~20 _I-1 and 20 _I+1 ~20 _N are taken into the main circuits, respectively.

As described above, a plurality of devices 20 ₁ to 20 _N having the interface circuit 10 shown in FIG.
When building an AV system, the operator can simply connect the input and output terminals of adjacent devices using signal lines without having to be aware of the input and output terminals, making connection operations easier. Further, since the signal lines can be connected without going through a selector, the number of signal lines may be small, and from this point of view as well, the connection operation is simplified. Moreover, impedance matching can be easily obtained even in this manner. Furthermore, when connecting devices, it is sufficient to cascade them in a line, and there is no need to consider the order of the devices, which also simplifies the connection operation.

(G3) Other Embodiments FIG. 5 shows a second embodiment of the interface circuit according to the present invention, and corresponding parts to those in FIG. 1 are designated by the same reference numerals.

In this embodiment, one switch is used instead of the two switches SW2 and SW3 in FIG.
The output configuration is simplified using SW23,
One end of this switch SW23 is connected to the output end of the output buffer amplifier 14, and the other end is connected to the resistor R3 and R
It is designed to be connected to one end of 4. This switch SW23 is controlled to open in the input mode and close in the output mode.

This second embodiment can also provide the same effects as the first embodiment described above.

FIG. 6 shows a third embodiment of the interface circuit according to the present invention, and corresponding parts to those in FIG. 5 are designated by the same reference numerals.

This embodiment further simplifies the output configuration of the second embodiment described above, and includes an output buffer amplifier 1
The output terminal of 4 is connected to input/output terminals 11 and 12 via switch SW23 and resistor R7 in sequence, and the configuration of resistors R3, R4 and switch SW1 in FIG. 2 is changed in this embodiment. It's on. Here, the value R7 of the resistor R7 is set to a value sufficiently larger than the value R of the characteristic impedance, and the gain of the output buffer amplifier 14 is set to 1.
+2R ₇ /R is selected for constant current drive.

Even in this case, the same effects as in the first embodiment can be obtained, and the structure can be made simple.

H Effects of the invention As described above, according to the invention, the terminal is commonly used for input and output so that it becomes an input terminal in input mode and an output terminal in output mode, and Since the matching resistor is switched between the terminals and connected to the terminal, the operator can connect the signal wire without considering the input terminal and output terminal when connecting the signal wire, which simplifies the connection operation. Furthermore, it is possible to easily obtain an interface circuit that can provide impedance matching when used in either input mode or output mode. Furthermore, when constructing a system that connects a plurality of devices to transmit signals, applying this interface circuit to each device can simplify the connections in the entire system.

[Brief explanation of the drawing]

FIG. 1 is a connection diagram showing the first embodiment of the interface circuit according to the present invention, FIG. 2 is a diagram showing the relationship between the opening/closing of switches SW1 to SW3 in FIG. A schematic diagram showing an AV system constructed by a plurality of devices to which the embodiment is applied, FIG. 4 is a schematic diagram equivalently showing the transmission path in FIG. 3, and FIG. 5 is a diagram showing a second embodiment of the present invention. A connection diagram showing an example, FIG. 6 is a connection diagram showing a third embodiment of the present invention, FIG. 7 is a block diagram showing a conventional AV system, and FIGS. 8 and 9 are for input in FIG. Circuits 71 to 73, output circuits 81 and 8
2 is a connection diagram showing the detailed configuration of No. 2. FIG. 11, 12...Input/output terminal, 13...Input buffer amplifier, 14...Output buffer amplifier, R3
~R7...Resistance for impedance matching,
SW1~SW5, SW23...Switch.

Claims (1)

[Claims for Utility Model Registration] When not connected to the first signal line, it is connected to the first resistor for impedance matching in the input mode, and when connected to the first signal line, the A first terminal separated from the first resistor, and a second terminal connected to a second resistor for impedance matching in input mode when not connected to the second signal line, and connected to the second signal line. When in the output mode, the output circuit of the electronic device is connected to the second terminal separated from the second resistor, and the third terminal for impedance matching in the output mode.
connecting means connected to the first and second terminals via a resistor, and connecting means for connecting an input circuit of the electronic device to the first and second terminals in the input mode.