JPH06231045A - Disk cache control system - Google Patents

Abstract

PURPOSE:To easily obtain the compatibility of data in cache memory with data in a disk device in a system in which the disk device is shared with plural hosts incorporated with the cache memory. CONSTITUTION:A first area 8 which stores the number of times of issuance of a reserve command which occupies the disk device at every disk device, a second area 9 which stores the number of times of issuance of the reserve command when access to data with the minimum access in the cache memory is performed, and a third area 5 which stores the number of times of issuance of the reserve command issued until that time at every data in an LRU link 4 in which all the data in the cache memory are arranged in sequence of access are provided at a cache managing table to manage disk cache.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a disk cache control system, and more particularly to a disk cache control system for coordinating cache memory data and disk device data when two or more CPUs share a disk device. It is about.

[0002]

2. Description of the Related Art FIG. 4 is a diagram showing a system configuration in which two hosts including a CPU share a disk device and are used. In FIG. 4, 1A and 1B are CPUs 1a-1 and 1b.
-1 and a host consisting of disk control devices 1a-2 and 1b-2, 1a-3 and 1b-3 are cache memories provided in the disk control devices 1a-2 and 1b-2, 2 is a host 1A, 1B is a shared disk device, and the illustrated example is one, but the hosts 1A and 1B can each share a plurality of disk devices.

The cache memories 1a-3 and 1b-3
Stores the data when the hosts 1A and 1B access the data from the disk device 2. Usually, it is said that once used data is likely to be used again in the near future, and in many cases, the data can be accessed from the cache memories 1a-3 and 1b-3 at the time of subsequent data access. Become. Further, since the cache memories 1a-3 and 1b-3 can be accessed much faster than the disk device 2, when the data to be accessed is in the cache memories 1a-3 and 1b-3, the data can be accessed at a considerably high speed. You can

FIG. 5 shows the above cache memories 1a-3,1.
b-3, LRU (Least Recent)
y Used) FIG. 4 is a diagram showing an LRU link 4 for implementing the algorithm, in which all data in the cache memory are arranged in parallel in data blocks 4a to 4n in the order of access.

Here, when the host 1A uses the disk device 2, the host 1B makes its own system so that another disk 1 cannot use the disk device 2 (referred to as reserve), and releases from the exclusive state after use (release). That is, each host 1A, 1B exclusively uses the disk device 2.

When the disk controller 1a-2 of the host 1A has a cache memory 1a-3 built therein, this cache memory 1a-3 has a copy of the data in the disk device 2, and the LRU using this cache memory is used.
The algorithm operation is performed as follows.

The data to be read is the cache memory 1a-
3 exists (cache hit), the data of the cache memory 1a-3 is used without accessing the disk device 2, and the pointer is updated so that this data moves to the first data block of the LRU link 4. . If the data does not exist in the cache memory 1a-3 (cache miss), the data is read from the disk device 2.
At this time, the data block at the end of the LRU link 4 is overwritten with the data read from the disk device 2, and the pointer is updated so that this data moves to the head data block of the LRU link 4.

When writing data to the disk device 2, when a cache hit occurs, the data is written to the disk device 2 and also to the cache memory 1a-3. Furthermore, this data is LRU link 4
Update the pointer to move to the first data block of. In the case of a cache miss, the cache memory 1a-
The operation for 3 is not performed.

In this way, in the case of a cache hit,
Since the data of the cache memory 1a-3 is used without accessing the disk device 2, when the host 1A reads the data of the same address after another host 1B rewrites the data of the disk device 2, the rewritten disk Instead of the data of the device 2, the data of the cache memory 1a-3 in this host 1A is read. In this case, the data transferred to the host 1A and the data in the disk device 2 will be different. Therefore, in order to maintain the consistency between the data in the cache memory 1a-3 and the data in the disk device 2, a copy of the data in the corresponding disk device 2 in the cache memory 1a-3 is retained when the disk device 2 is reserved. When the first read of a certain data after releasing all the reserved parts, it is always read from the disk device 2 and the cache memory 1a
It was supposed to be stored in -3.

In the process of releasing the data from the cache memory 1a-3, the data blocks 4a to 4n of the LRU link 4 are traced, and when the data is for the corresponding disk device 2, the operation of releasing the data is repeated. It is done by things.

[0011]

Since the conventional disk cache control system is constructed as described above, in order to release the portion holding the data of the reserved disk device from the cache memory, All the data blocks of the LRU link must be traversed,
When the RU link is large, there is a problem that a lot of processing time is required every time the reserve processing is performed.

The present invention has been made to solve the above-mentioned problems, and the invention of claim 1 easily maintains the matching between the data of the cache memory and the data of the disk device, and for the matching. The purpose is to reduce the overhead time.

It is an object of the invention of claim 2 to further reduce the overhead time for the matching.

[0014]

According to a disk cache control method of a first aspect of the present invention, in a cache management table for managing a disk cache, the number of times a reserve command that occupies the disk device is issued is set to the disk device. A first area to be stored for each disk device; a second area to store the number of times a reserve command is issued when accessing the least accessed data in the cache memory for each disk device; LR in which all data in the cache memory are arranged in order of access
The third area is provided for storing the number of times the reserve command has been issued so far, for each piece of data in the U-link.

According to a second aspect of the present invention, there is provided a disk cache control system in which a cache management table for managing a disk cache stores the number of times of issuing a reserve command occupying the disk device for each disk device. Area, a second area for storing, for each disk device, the number of times the reserve command is issued when accessing the least accessed data in the cache memory, and the data in the cache memory. A third area is provided for storing the number of times the reserve command has been issued so far, for each piece of data in the sub-LRU link arranged in the order of access for each disk device.

[0016]

According to the disk cache control method of the present invention, the number of times the reserve command is issued is updated each time the reserve command is issued and the disk is accessed and stored in the first area of the cache management table. By comparing the number of times of issuing the reserve command with the number of times of issuing the reserve command stored in the third area provided for each data in the LRU link in which all the data in the cache memory are arranged in the order of access, It is possible to determine whether or not the data in the memory is transferred from the disk device to the cache memory in the state where the data is exclusively used by the disk device,
The data in the cache memory and the data in the disk device can be easily matched, and the overhead time for the matching can be shortened.

According to a second aspect of the present invention, in the disk cache control method, the reserve command issuance times are updated each time the reserve command is issued and the disk is accessed, and the reserve command is stored in the first area of the cache management table. By comparing the number of times of issuing the reserve command with the number of times of issuing the reserve command stored in the third area provided for each data in the sub LRU link in which the data in the cache memory is arranged in the access order for each disk device. It is possible to determine whether or not the data in the cache memory has been transferred from the disk device to the cache memory in the state where the data is exclusively used in the disk device. Consistency can be maintained easily and the number of reserves If the overflows and a simplified process in case of a cache miss, it is possible to further reduce the overhead time.

[0018]

【Example】

Example 1. An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows, for example, the CPU 1a-of the hosts 1A and 1B.
It is a figure showing the structure of the disk cache management table provided in 1, 1b-1. The LRU link 4, which arranges all the data in the cache memory in the order of access,
A third indication indicating at what time the data is reserved in the cache memories 1a-3 and 1b-3
Reserve ID (RID: Reserve)
ID) 5, a unit number / disk address 6 indicating which address of which disk device 2 of the disk device 2 having a plurality of data in the cache memories 1a-3 and 1b-3, and an LRU link 4 are configured. Front and rear pointers 7 for.

Reference numeral 8 denotes a first area for managing the number of reserves (CRSV: Current Reserve) performed on the disk device 2 for each unit, that is, for each disk device (hereinafter, CRSV [i] when the unit number is i).
9 is a second area for managing the number of reserves (ORSV: Old Reserve) when writing the oldest data existing in the cache memory 3 for each unit (hereinafter, the unit number is i). It is expressed as ORSV [i] when done.

Next, the operation when the host 1A tries to read data from the disk device 2 will be described with reference to the flow chart of FIG. After the operation is started, in ST2-1, it is determined whether or not the data which the host 1A tried to read from the disk device 2 of the unit number i exists in the cache memory 1a-3. If it exists (cache hit), the values of RID5 and CRSV [i] 8 for this data are compared in ST2-2.

If the two do not match, this data is stored in the cache memory 1 before the disk device 2 is reserved.
Since the data is stored in a-3, the data in the cache memory 1a-3 is not used in ST2-3.
The data read from the disk device 2 is transferred to the host 1A and the cache memory 1a-3 is also overwritten with this data. Furthermore, in ST2-4, RID5
Is the value of CRSV [i]. Then ST2-5
At, the pointer is updated by the LRU algorithm so that this data moves to the first data block of the LRU link 4. Further, as a result of the comparison in ST2-2, if they match, ST2-5 is immediately executed.

As a result of the judgment in ST2-1, N
If it is O, that is, if there is no data in the cache memory 1a-3 (cache miss), the last data block of the LRU link 4 is released in ST2-6 to make it a free area. Then, in ST2-7, the data block of the LRU link 4 is traced backward from the end, and the value of RID5 of the data for the same unit found first is set as the value of ORSV [i] 9. Furthermore S
At T2-8, the data is read from the disk device 2 and transferred to the host 1a-3, the data is stored in the free area, and then the processes from ST2-4 are performed.

When writing data to the disk device 2,
In the case of a cache hit, the data is written to both the disk device 2 and the cache memory 1a-3, and the pointer is updated so that this data moves to the head data block of the LRU link 4. At this time, the value of RID5 is changed. The value is CRSV [i] 8. In the case of a cache miss, the write cache memory 1a is written only in the disk device 2.
-3 does not access.

When the disk device 2 having the unit number i is reserved, 1 is added to the value of CRSV [i] 8.
At this time, if the value of CRSV [i] 8 and the value of ORSV [i] 9 match, it means that the number of reserves has overflowed. At this time, the LRU link 4 is traced from the last data block and the same unit is searched. C in the data of number i
The value of RID5 equal to the value of RSV [i] 9 is all decremented by "1" so that when this data is accessed, the data of the disk device 2 is read instead of the data of the cache memory 1a-3. Can be

Example 2. In the above embodiment, as shown in FIG. 3A, all the data in the cache memory corresponding to the disk device 2 with unit number 0 and unit number 1 are arranged in the access order to form the LRU link. As shown in 3 (b) and 3 (c), the data in the cache memory may be arranged in order of access for each unit number 0 and unit number 1, that is, for each disk device to form the sub LRU links 10 and 11. In this case, the ORSV when the value of CRSV [i] 8 and the value of ORSV [i] 9 at the time of the above-mentioned reserve match and when there is a cache miss
[I] The operation of following the LRU link when updating the value of 9 is
Sub LRU whose unit number is 0 or unit number 1
Only the links 10 and 11 need to be traced, the processing is simplified, and the overhead time can be further shortened.

Example 3. In the case of a cache miss, the ORSV is traced by following the LRU link 4 as in the above embodiment.
The same effect can be obtained by setting the value of RID5 of the data which is the last data of the LRU link 4 as the value of ORSV [j] 9 for the unit, instead of updating the value of [i] 9. . In this case, LRU link 4
The operation of tracing is unnecessary.

[0027]

As described above, according to the first aspect of the invention, the number of times of issuing reserve commands occupying the disk device is stored for each disk device in the cache management table for managing the disk cache. A first area and the number of times the reserve command is issued when accessing the least-accessed data in the cache memory is stored for each disk device
And a third area for storing the number of times the reserve command has been issued so far, for each data in the LRU link in which all the data in the cache memory are arranged in the order of access. These reserve command issuance counts are updated each time issuance and disk access are performed, and the reserve command issuance count in the first area is compared with the reserve command issuance count stored in the third area to compare the reserve command issuance count in the cache memory. Since it is configured to judge whether or not the data of the above is transferred to the cache memory from the disk device in the state where the disk device is occupied, whether the data in the cache memory is valid at the time of a cache hit. You can judge whether it is invalid and flush the cache memory every time you reserve the disk device No need, easily ensure the integrity of the data in the data and the disk device of the cache memory,
There is an effect that the overhead time for the matching can be shortened.

According to the second aspect of the invention, in the cache management table for managing the disk cache, the first area for storing the number of times of issuing the reserve command occupying the disk device for each disk device. When,
A second area for storing, for each disk device, the number of times the reserve command is issued when accessing the least accessed data in the cache memory, and the data in the cache memory for each disk device. A third area for storing the number of reserve command issuances issued so far for each piece of data in the sub-LRU link arranged in the order of access, and the number of reserve counts is issued each time the reserve command is issued and the disk is accessed. By updating and comparing the number of times of issuing the reserve command in the first area with the number of times of issuing the reserve command stored in the third area, it is possible to determine whether the data in the cache memory occupies the disk device. It is configured to determine whether the data is transferred from the disk device to the cache memory. Therefore, it is possible to judge whether the data in the cache memory is valid or invalid at the time of a cache hit, and it is not necessary to flush the cache memory every time the disk device is reserved, and the cache memory data and the disk device data can be matched. It is possible to easily maintain the above, and to simplify the processing when the number of reserves overflows or in the case of a cache miss, thereby shortening the overhead time.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a disk cache management table.

FIG. 2 is a diagram showing a flow at the time of a cache hit.

FIG. 3 is a diagram representing LRU links and sub-LRU links.

FIG. 4 is a diagram showing a system configuration.

FIG. 5 is a diagram showing an LRU link.

[Explanation of symbols]

 1 host 2 disk device 4 LRU link 5 RID (area) 6 unit number / disk address 7 forward and backward pointers 8 CRSV (area) 9 ORSV (area) 10 sub-LRU link 11 sub-LRU link

[Procedure amendment]

[Submission date] June 11, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0021

[Correction method] Change

[Correction content]

If the two do not match, this data is stored in the cache memory 1 before the disk device 2 is reserved.
Since the data is stored in a-3, the data in the cache memory 1a-3 is not used in ST2-3.
The data read from the disk device 2 is transferred to the host 1A and the cache memory 1a-3 is also overwritten with this data. Furthermore, in ST2-4, RID5
Is the value of CRSV [i]. Then ST2-5
At, the pointer is updated by the LRU algorithm so that this data moves to the first data block of the LRU link 4. In addition, as a result of the comparison in ST2-2, if they match , the cache is transferred in ST2-9.
Data from the memory 1a-3 to the host 1A, and S
Execute T2-5.

[Procedure Amendment 2]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 2

[Correction method] Change

[Correction content]

[Fig. 2]

Claims (2)

[Claims] 1. In a disk cache control method in which two or more CPUs share a disk device, the number of times a reserve command that occupies the disk device is issued in a cache management table for managing the disk cache. For each disk device, and a second area for storing, for each disk device, the number of times the reserve command is issued when accessing the least accessed data in the cache memory.
Area and a third area for storing the number of times the reserve command has been issued so far for each data in the LRU link in which all the data in the cache memory are arranged in the order of access. The number of reserve command issuances is updated each time issuance and disk access is performed, and the number of reserve command issuances stored in the first area is compared with the number of reserve command issuances stored in the third area to compare the cache A disk cache control method, wherein it is determined whether or not the data in the memory is transferred from the disk device to the cache memory in a state where the data is exclusively occupied by the disk device. 2. In a disk cache control method in the case where two or more CPUs share a disk device and use it, the number of times a reserve command that occupies the disk device is issued in a cache management table for managing the disk cache. For each disk device, and a second area for storing, for each disk device, the number of times the reserve command is issued when accessing the least accessed data in the cache memory.
And a third area for storing the number of times the reserve command has been issued so far, for each data in the sub-LRU link in which the data in the cache memory is arranged in the access order for each disk device. These reserve counts are updated each time a command is issued and a disk is accessed, and the reserve count issuance stored in the first area is compared with the reserve command issuance count stored in the third area. A disk cache control method, wherein it is determined whether or not the data in the cache memory is transferred from the disk device to the cache memory in a state where the data is exclusively occupied by the disk device.