JPH06229802A - Gas meter with automatic shut-off function - Google Patents

Abstract

PURPOSE:To provide a gas meter with an automatic shut-off function in which, when a malfunction occurs, its cause and a state at the time of occurrence are stored in a memory, and a stored content can be read by an external opera tion. CONSTITUTION:The gas meter with an automatic shut-off function comprises a battery voltage detector 15 for outputting a battery voltage drop signal, an oscillation stop detector 16 for detecting that an oscillation of a clock signal is stopped, an auxiliary clock oscillator 18 for supplying an auxiliary clock signal, and a malfunction storage memory 19 for storing data at the time of occurring a malfunction. The meter further comprises a data reader 20 for reading data of the malfunction memory, a reset signal checking unit 21 for outputting a reset signal, and an initialization deciding unit 22 for deciding execution of an initialization in response to presence/absence of a data read signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a gas meter with an automatic shutoff function capable of shutting off gas when an abnormality occurs.

[0002]

2. Description of the Related Art A conventional gas meter with an automatic shutoff function will be described with reference to FIG. A seismic sensor 802, a pressure sensor 803, a shutoff valve 804, a shutoff valve return device 805, a flow rate sensor 806, a microcomputer 807, a battery 808, an alarm display device 809, and a control unit 810 are incorporated in the meter casing 801. In the gas meter with an automatic shut-off function having such a configuration, the microcomputer 807 of the control unit 810 is the seismic sensor 80.
2. When it is determined that the input data from the pressure sensor 803 is abnormal, the shutoff valve 804 is activated to shut off the gas. The microcomputer 807 usually incorporates the following abnormality processing program. (1) The gas is shut off by judging an abnormality in the gas flow rate. (2) Cut off the gas by judging the abnormal long-term use of the gas equipment. (3) Gas is shut off in the event of a large earthquake by the signal from the seismic sensor. (4) The gas is shut off when an abnormal drop in the gas supply pressure is detected. (5) The gas is shut off by an external signal from a gas leak alarm, an incomplete combustion alarm, or the like. (6) An alarm is output when there is a suspicion of leakage from indoor piping using the function of measuring gas flow rate. Safety is ensured by outputting an alarm in advance or emergency cutoff of gas by these abnormality processing programs.

[0003]

However, in the conventional gas meter with the automatic shut-off function as described above, when a hardware trouble occurs, if the cause is due to defective parts, the cause of the failure is Can be specified, but the CPU is reset by electrical noise, the stored data is lost, oscillation is stopped due to condensation, and the microcomputer function is temporarily stopped due to oscillation abnormality. Regarding the troubles caused by, there is a problem that it is difficult to investigate the cause due to lack of reproducibility and data is lost. In addition, when the microcomputer function is stopped due to a decrease in battery voltage, if a voltage is externally applied for investigation, there is a problem that stored data is lost due to power-on reset.

The present invention has been made to solve such a conventional problem. When an abnormality occurs, the cause and the situation at the time of occurrence are stored in a memory, and the stored contents are stored by an external operation. It is an object to provide a gas meter with an automatic shut-off function that can be read.

[0005]

In order to solve the above-mentioned problems, the present invention detects a voltage drop of a built-in battery in a gas meter with an automatic shut-off function having a meter metering means and a shut-off valve for shutting off gas flow. Voltage detecting means for outputting a low battery voltage signal to a microcomputer, oscillation stop detecting means for detecting that the oscillation of a clock oscillator for supplying a clock signal to the microcomputer is stopped, and this oscillation stop detecting means Auxiliary clock oscillating means for supplying an auxiliary clock signal to the microcomputer according to an oscillation stop detection signal output from the means, an abnormal memory means for storing an abnormal type and an abnormal situation at the time of abnormal occurrence, and the abnormal memory means Data reading means for reading the stored data and when the input reset signal continues for a certain period of time. A reset signal checking means for outputting a reset signal only to the microcomputer,
When the reset signal is input, if the data read signal output from the data read means is on, the data in the abnormality storage means is output, and if the data read signal is off, normal initialization processing is performed. And an initialization determination means for executing.

[0006]

The present invention, by taking such means,
The abnormal reset signal is eliminated by outputting the reset signal to the microcomputer only when the input reset signal continues for a certain period of time, and the auxiliary clock signal is output when detecting that the oscillation of the clock oscillator has stopped, When the voltage drop of the built-in battery is detected, the battery voltage drop signal can be output to the microcomputer, and the type of error when an abnormal condition such as the above abnormal reset signal, oscillation stop, or battery voltage drop occurs. Data such as date and time of occurrence and operating state can be recorded in the built-in memory. Further, when the reset signal is input and the data read signal is on, the stored data can be output without resetting the abnormal memory.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, 1 is a microcomputer, 2 is an LED that indicates a gas cutoff reason, 3 is a test switch for testing the cutoff function, and 4 is a signal from an external gas leak alarm or the like to the microcomputer 1. Gas leak alarm input circuit for 5 is a pressure sensor 6
A pressure sensor input circuit for outputting a signal from the microcomputer 1 to the microcomputer 1, a reference numeral 7 for a vibration sensor input circuit for outputting a signal from the vibration detector 8 to the microcomputer 1, and a reference numeral 9
Is a flow rate pulse input circuit for converting the contact signal of the reed switch 11 which magnetically detects the rotational movement obtained by the meter measuring means 10 into an electric pulse signal and outputs it to the microcomputer 1, and 12 is a microcomputer. A shut-off valve drive circuit that drives the shut-off valve 13 in response to a command from 1, and a lithium battery 14 that supplies power to each electric circuit including the microcomputer 1. Reference numeral 15 is a battery voltage detection unit that detects a voltage drop of the lithium battery 14 and outputs a battery voltage drop signal to the microcomputer 1, and 16 is the oscillation of a clock oscillator 17 for supplying a clock signal to the microcomputer 1. The oscillation stop detector 18 for detecting that
When an oscillation stop detection signal is input from the auxiliary clock oscillating unit that supplies the auxiliary clock signal to the microcomputer 1, the abnormality 19 stores an abnormality type and an abnormal occurrence state at the time of the abnormality according to an instruction from the microcomputer 1. A storage memory, 20 is a data reading section for reading data stored in the abnormality storage memory 19, and 21 is a reset signal to the microcomputer 1 only when the reset signal input from the reset signal input section 22 continues for a certain period of time. When the reset signal is input, the reset signal check unit 22 outputs the data of the abnormal memory 19 when the data read signal output from the data read unit 20 is turned on, and outputs the data read signal. When the is off, the initialization determination unit that executes normal initialization processing A.

Next, the operation of the above-structured apparatus will be described with reference to FIG. The reset signal check unit 21 outputs a reset pulse having a constant pulse width to the reset input RST of the microcomputer 1 only when the pulse width of the reset signal input from the reset signal input terminal 211 continues for a predetermined time or longer. Also,
At the same time, the reset signal input from the reset signal input terminal 211 is also input to the I / O port P1 of the microcomputer 1. When the reset pulse is input from the reset input RST, the microcomputer 1
The presence / absence of a reset signal at the I / O port P1 is monitored at regular intervals, and if it can be confirmed that the reset signal is continuously input for a certain period of time or more, it is determined that the reset signal is normal, and at least a certain period of time If it cannot be confirmed that it is continuing, error processing is started.

The oscillation stop detector 16 is a clock oscillator 17
When it is detected that the clock signal output from is stopped, an oscillation stop signal is output to the auxiliary clock oscillator 18 and the I / O port P2 of the microcomputer 1 to notify that the clock signal is stopped. The auxiliary clock oscillator 18 oscillates the auxiliary clock signal immediately after receiving the oscillation stop signal and outputs it to the microcomputer 1. On the other hand, when the microcomputer 1 detects the oscillation stop signal, it starts error processing using the auxiliary clock signal.

The battery voltage detector 15 checks the voltage of the lithium battery 14 at a constant cycle, and when it detects that the voltage is below a predetermined voltage, the I / O port P3 of the microcomputer 1 is detected.
Output a battery voltage drop signal to. The microcomputer 1 inputs this battery voltage drop signal and starts error processing.

In the microcomputer 1, if it cannot be confirmed that the reset signal of the I / O port P1 continues for a certain time or more after the reset pulse is input to the reset input RST, an abnormal reset, I / O When the oscillation stop signal is input to port P2, oscillation is stopped,
When a battery voltage drop signal is input to the I / O port P3, it is recognized that an abnormal state of battery voltage drop has occurred,
The type of abnormal state, the date and time of occurrence, the operating state of the microcomputer 1 and the like are filed in the abnormal storage memory 19. When a data read signal is input to data read unit 20 from data read signal input terminal 201, data read unit 20 reads the file stored in abnormality storage memory 19 and outputs it to data output terminal 202. When the battery voltage is extremely reduced or the oscillation of the clock signal is stopped, the microcomputer 1 may be in a stopped state or enter an infinite loop, and the data read signal may not be detected. Therefore, when a reset pulse is input to the reset input RST of the microcomputer 1,
The initialization determination section 22 first checks the presence / absence of a data read signal from the I / O port P4, and when the data read signal is on, the "data output mode" is entered and the data in the abnormality storage memory 19 is output. If the data read signal of the I / O port P4 is off, it is determined that there is no data read request, and normal initialization processing is executed.

FIG. 3 shows an example of a storage format when a file is stored in the abnormal storage memory 19. In the first record section, the type of abnormality is represented by a code. Code 1 indicates abnormal reset, code 2 indicates oscillation stop, and code 3 indicates battery voltage drop. The second record section stores the date and time of the abnormality occurrence, and the third record section indicates the operating state of the microcomputer 1 at the time of the abnormality occurrence by a code. Each code 1 indicates that the main processing is in progress.
Code 2 indicates that timer interrupt processing was in progress, code 3
Indicates that the communication interrupt process was in progress.

Next, the operation of the reset signal check section 21 will be described in detail with reference to the circuit diagrams and timing charts of the embodiment shown in FIGS. The reset signal S1 generated by short-circuiting the reset signal terminal 211 is input to the I / O port P1 of the microcomputer 1 and the D terminal of the first stage D-FF circuit. The first-stage D-FF circuit is set in synchronization with the clock signal CK, and its output Q1 is input to the D terminal of the second-stage D-FF circuit. It is set in synchronization with the clock signal CK. Similarly, since the third-stage and fourth-stage D-FF circuits are also set to be delayed by one clock time, the outputs S2 and A of the AND circuit 212 are output.
The output S3 of the ND circuit 213 is as shown in the timing chart of FIG. The microcomputer 1 monitors the presence / absence of the reset signal of the I / O port P1 at a constant period from the falling edge of the reset signal S3 input to the reset input RST, and the reset signal is continuously input for a fixed time or longer. If is confirmed, it is determined that the reset signal is normal, and the initialization process is executed. If it is not confirmed that the operation continues for a certain period of time or more, it is determined that an abnormal reset signal has occurred and error processing is started.

Next, the operations of the oscillation stop detector 16 and the auxiliary clock oscillator 18 will be described in detail with reference to the circuit diagrams and timing charts of the embodiments shown in FIGS.
The waveform of the clock signal S4 output from the clock oscillator 17 is shaped by the Schmitt input inverters 161, 162, and the monostable multivibrator, the resistor R1,
It is input to the rising edge trigger input + TRG of the oscillation stop detector 16 including the capacitor C1. The oscillation stop detector 16 constitutes a monostable multivibrator circuit for retrigger operation, and its output pulse width is set to be longer than the cycle of the clock signal S4. Therefore, while the clock signal S4 is being input, The output Q of the monostable multivibrator becomes Hi level. Now, when the clock signal S4 is stopped, the monostable multivibrator is no longer triggered, so the output Q becomes Low level. Therefore, the inverter output Q of the output Q becomes Low level while the clock oscillator 17 is outputting the clock signal, becomes Hi level when the clock signal is stopped, and is output as the oscillation stop signal S6. This oscillation stop signal S6
Is input to the I / O port P2 of the microcomputer 1 and the AST terminal of the auxiliary clock oscillator 18. The auxiliary clock oscillator 18 includes an astable multivibrator, a resistor R2, and a capacitor C2, and is configured to oscillate only while the input signal at the AST terminal is at the Hi level. Therefore, while the oscillation stop signal S6 is at the Hi level,
That is, the auxiliary clock signal S7 is output to the microcomputer 1 only while the clock signal from the clock oscillator 17 is stopped. When the microcomputer 1 detects the oscillation stop signal S6, it uses the auxiliary clock signal S7 to start error processing.

Therefore, according to the configuration of the above embodiment, the abnormal reset signal is eliminated in advance, the operation is ensured when the clock signal oscillation is stopped, and the abnormal reset signal is generated, the oscillation is stopped, and the battery voltage drops. The type, date and time of occurrence, and the operating state of the microcomputer 1 can be stored in the abnormality storage memory 19. Further, it is possible to read the data in the abnormal memory 19 by giving a data read request.

[0016]

As described above, according to the present invention, not only is the abnormal reset signal removed in advance and the operation of the clock signal is stopped when the oscillation is stopped, but the abnormal reset signal is generated, the oscillation is stopped, and the battery voltage drops. When an abnormal situation such as occurs, data such as the abnormality type, date and time of occurrence, and operating status can be recorded in the built-in memory and replayed, so failure analysis and failure countermeasures can be accurately implemented, and it can be provided to customers. It is extremely effective in improving service and reliability of equipment.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration in an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a main part.

FIG. 3 is an explanatory diagram showing an example of a storage format of an abnormal storage memory.

FIG. 4 is a circuit diagram of an embodiment of a reset signal check unit.

FIG. 5 is a timing chart showing the operation of the above circuit diagram.

FIG. 6 is a circuit diagram of an embodiment of an oscillation stop detector and an auxiliary clock oscillator.

FIG. 7 is a timing chart showing the operation of the above circuit diagram.

FIG. 8 is a block diagram of a conventional device.

[Explanation of symbols]

 15 Battery Voltage Detector 16 Oscillation Stop Detector 17 Clock Oscillator 18 Auxiliary Clock Oscillator 19 Abnormal Memory Memory 20 Data Readout 21 Reset Signal Check 22 Initialization Judgment

Claims (1)

[Claims] 1. A gas meter with an automatic shutoff function, which comprises a metering means and a shutoff valve for shutting off a gas flow,
Battery voltage detection means for detecting a voltage drop of the built-in battery and outputting a battery voltage drop signal to the microcomputer, and oscillation stop for detecting that the oscillation of the clock oscillator for supplying the clock signal to the microcomputer is stopped Detecting means, auxiliary clock oscillating means for supplying an auxiliary clock signal to the microcomputer according to the oscillation stop detecting signal output from the oscillation stop detecting means, and abnormality storing means for storing an abnormality type and an abnormality occurrence state when an abnormality occurs. Data reading means for reading the data stored in the abnormality storage means, reset signal checking means for outputting a reset signal to the microcomputer only when the input reset signal continues for a certain period of time, and reset signal Is input, the data output from the data reading means is input. If the data read signal is turned on, the data in the abnormality storage means is output, and if the data read signal is turned off, an initialization determination means for executing a normal initialization process is provided. Gas meter with shutoff function.