JPH06225530A - Dc power-supply apparatus having series-connected switching regulators - Google Patents

Abstract

PURPOSE:To satisfactorily keep the balance of a current when a load current is large and to keep a constant voltage property when the load current is small in the parallel operation of a plurality of switching regulators. CONSTITUTION:Two switching regulators 3, 4 connected in parallel are provided respectively with FETs 7a, 7b which are connected in series with primary windings 14a, 17b for transformers 6a, 6b. Voltage control circuits 10a, 10b which respond to an output from a common output-voltage detection circuit 5 are installed. Current control circuits 11a, 11b which respond to current- detection resistances 8a, 8b are installed. When a load current is small, the FETs 7a, 7b are controlled by outputs from the voltage control circuits 10a, 10b. When the load current is large, the FETs 7a, 7b are controlled by outputs from the current control circuits 11a, 11b. Whether the load current is large or small is judged on the basis of an output voltage, and the voltage control circuits 10a, 10b and the current control circuits 11a, 11b are operated selectively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC power supply device capable of equalizing output currents during parallel operation of switching power supply devices.

[0002]

2. Description of the Related Art As a parallel operation system of switching power supplies, there is an overflow system in which a plurality of switching power supplies are simply connected in parallel.
However, in this method, the balance of the output current may be deteriorated, and if one of the power supplies bears much of the load current, the life of this power supply will be shortened.

As another method of parallel operation, there is an operation method in which input currents or output currents of a plurality of switching power supplies are detected and the output voltage of the switching power supply having the smaller current is increased to balance the output currents. However, this method has a drawback that the control circuit becomes complicated, and if noise occurs at a light load, the noise is erroneously detected as an output current, and the control operation becomes unstable.

Therefore, an object of the present invention is to provide a DC power supply device capable of stably operating a switching power supply in parallel both in a high load current region and a low load current region.

[0005]

SUMMARY OF THE INVENTION To achieve the above object, the present invention relates to a DC power supply device for connecting a plurality of switching power supply devices in parallel to supply electric power to a common load. A device includes a switching element connected to a DC power supply via a primary winding of a transformer, an output rectifying / smoothing circuit connected between a secondary winding of the transformer and the load, and a voltage of the load. A voltage control circuit that forms a PWM pulse for controlling the voltage of the load to a constant value based on and off control of the switching element, a current detector for detecting the current of the switching element, and the current The switch by forming a current control pulse so as to limit the current detection signal to the level of the reference signal based on the current detection signal and the reference signal obtained from the detector. And a current control circuit for controlling on / off of the switching element, and in a region where the current of the load is small, the PWM pulse of the voltage control circuit controls on / off of the switching element, and the current of the load is large. At times, the present invention relates to a DC power supply device configured to control the switching element to be turned on / off by the current control pulse of the current control circuit. As described in claim 2, an error signal forming circuit,
It is desirable to provide a triangular wave generating circuit, first, second and third comparators and a current control pulse forming circuit.

[0006]

According to the invention of each claim, the constant voltage control operation is performed when the load current is small. In the case of this constant voltage control, the current balance becomes poor, but even if the switching power supply device bears a large load current,
Since the current is small, this life is not reduced. When the load current is large, the load current is supplied based on the current control, so that the current balance is improved. Therefore, the life of the specific switching power supply is not reduced. The power supply device of the present invention is suitable for a load in which the load current is usually small and sometimes large.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a DC power supply device according to an embodiment of the present invention will be described with reference to FIGS. The power supply device of FIG.
First and second switching regulators 3 and 4 connected in parallel between a common DC power supply 1 and a common load 2;
It is configured with a common output voltage detection circuit 5. The first and second switching regulators 3 and 4 have substantially the same configuration. Therefore, the reference numerals of the respective parts of the first and second switching regulators 3 and 4 are indicated by suffixes a and b, and only one of them will be described in detail.

The first and second switching regulators 3 and 4 include transformers 6a and 6b, FETs 7a and 7b as switching elements, and current detection resistors 8a and 8b.
, Output rectifying and smoothing circuits 9a and 9b, and voltage control circuit 10
a, 10b, current control circuits 11a, 11b, drive circuits 12a, 12b, and auxiliary power supply circuits 13a, 13b.

In the first switching regulator 3, the drain of the FET 7a is the primary winding 1 of the transformer 6a.
The power source 1 is connected via 4a, and the source is connected to the ground (common line) via the current detection resistor 8a. The output rectifying / smoothing circuit 9a connected to the secondary winding 15a of the transformer 6a has two diodes D1a and D2a,
It is composed of a reactor L1a and a capacitor C1a, and a load 2 is connected to this output terminal.

The voltage control circuit 10a includes an output voltage detection circuit 5
In response to the signal on the output line 16a of the drive circuit 1, a PWM control pulse for making the voltage of the load 2 constant is formed, and the drive circuit 1
It is given to the gate of the FET 7a via 2a. However, the voltage control circuit 10a is configured not to generate the PWM control pulse when the output voltage is lower than the predetermined value. The current control circuit 11a forms a current control pulse in response to the current detected by the current detection resistor 8a, and supplies this to the gate of the FET 7a via the drive circuit 12a. This current control circuit 11a is associated with the voltage control circuit 10a by a line 17a. When the output voltage drops due to the large load current, the control pulse generated from the current control circuit 11a drives the FET 7a, and when the output voltage exceeds the predetermined level due to the small load current, the voltage control circuit 10a outputs the control pulse. The generated PWM control pulse drives the FET 7a.

The auxiliary power supply circuit 13a includes a tertiary winding 18a of a transformer 15a, a diode D3a, and a capacitor C2a.
And supplies an auxiliary power supply voltage to the output voltage detection circuit 5.

The second switching regulator 4 is the first
Of the switching regulator 3 of
The drain of T7b is connected to the common power supply 1 via the primary winding 17b of the transformer 6b, and the source is the current detection resistor 8
output rectification smoothing circuit 9b
Are connected to a common load 2.

The output voltage detection circuit 5 includes a voltage dividing resistor R1 connected between output terminals 19 and 20 to which the load 2 is connected.
, R2, the error amplifying transistor Q1, the Zener diode ZD as the reference voltage source, and the light emitting diode 2
1 and. Since the base of the transistor Q1 is connected to the voltage dividing point of the voltage dividing resistors R1 and R2, the emitter is connected to the Zener diode ZD, and the light emitting diode 21 is connected to the output terminal 19, the detection voltage and the voltage of the Zener diode ZD are connected. A current corresponding to the difference from the current flows through the light emitting diode 21. Therefore, the light emission amount of the light emitting diode 21 changes in proportion to the output voltage. The emitter of the phototransistor 22 optically coupled to the light emitting diode 21 is connected to the ground, and the collector is connected to the bias power supply line 23 via the resistor R3 and also connected to the base of the transistor Q2 via the diode D4. . The base of the transistor Q2 is connected to the auxiliary power supply circuits 13a and 13b via the resistor R4. Therefore,
The phototransistor 22 forms a bias of the base current of the transistor Q2, and when the output voltage becomes high, the resistance of the phototransistor 22 becomes small, the bias current increases, and the base current of the transistor Q2 becomes small. The resistance between them becomes high. The auxiliary power supply circuit 1 of the second switching regulator 4
3b is connected to a resistor R4 via a reverse current blocking diode D5. An operation stabilizing resistor R5 is connected between the input terminal of the resistor R4 and the ground. The collector of the transistor Q2 is connected to the bias power supply line 23, and the emitter thereof is the detection signal output lines 16a, 16
The voltage control circuits 10a and 10b are respectively connected via b.

FIG. 2 shows the voltage control circuit 10a, the current control circuit 11a and the drive circuit 12a of FIG. 1 in detail. Resistors R6, R7, R8 and a diode D5 are connected between the emitter of the output transistor Q2 of the output voltage detection circuit 5 and the ground. These are the output voltage detection circuit 5
Can be seen as a part of the voltage control circuit 1
It is included in 0a. The first voltage dividing point 24 between the resistors R6 and R7 is connected to one input terminal of an error amplifier 25 as an inverting amplifier and an error signal forming circuit. The other input terminal of the error amplifier 25 is connected to the reference voltage source 26, and its output terminal is the first comparator (comparator) 27.
Connected to one of the input terminals. The error amplifier 25 can be replaced with an inverting amplifier. Comparator 2
The other input terminal of 7 is connected to the triangular wave generating circuit 28.

The current control circuit 11a includes a resistor R9, a capacitor C3, a second comparator 29, a flip-flop 30 as a current control pulse forming circuit, a third comparator 31, and a reference voltage source 32. , Resistor R10 and capacitor C
It consists of 4 and. One input terminal of the third comparator 31 is connected to the upper end of the current detection resistor 8a via the resistor R9, and the other input terminal is connected to the upper end of the capacitor C4. The capacitor C4 is connected between the voltage dividing point 33 of the resistors R7 and R8 and the ground. A resistor R10 is connected between the bias power supply line 23 and the capacitor C4. The output terminal of the third comparator 31 is the OR gate 34.
Is also connected to the set terminal S of the RS flip-flop 30. One input terminal of the second comparator 29 is connected to the triangular wave generating circuit 28, the other input terminal is connected to the reference voltage source 32, and the output terminal is connected to the reset terminal R of the flip-flop 30. It is connected to the OR gate 34. The output terminal Q of the flip-flop 30 is connected to the OR gate 34.

The drive circuit 12a includes an OR gate 34, a bias power supply 35, a pair of transistors 36 and 37,
It is composed of a NOT circuit 38 and a resistor R11, and drives the FET 7a. More specifically, the three comparators 27, 29, 3
The output terminal of the OR gate 34 which receives the output of 1 and the output of the flip-flop 30 is connected to the base of one transistor 36 via the NOT circuit 38 and directly connected to the base of the other transistor 37. . The bias power supply 35 is connected to the gate of the FET 7a via the transistor 36 and the resistor R11. Transistor 3
7 is connected between the gate and the source via a resistor R11. For convenience of illustration, the OR gate 34 is used as the drive circuit 1
Although included in 2a, it can be placed outside the block of the drive circuit 12a.

The triangular wave generating circuits 28 of the voltage control circuits 10a and 10b of the first and second switching regulators 3 and 4 of FIG. 1 are associated with each other as shown in FIG. 3 in order to perform the synchronous operation. . That is, each triangular wave generation circuit 28
Has triangular wave generating capacitors C0a, C0b, timing resistors Rta, Rtb, and charge / discharge control circuits 39a, 39b for capacitors C0a, C0b.
C0b is coupled to each other by a capacitor 40.
This makes it possible to generate the triangular waves of the first and second switching regulators 3 and 4 in synchronization. In addition, changing the capacitor 39 into a resistor, the capacitor C0b of the second switching regulator 4 and the resistor R
It is also possible to omit tb and connect the capacitor terminal of the charge / discharge control circuit 39b to the capacitor C0a of the first switching regulator 3.

FIG. 4 shows the states of points A to H in FIG. 2 when the current of the load 2 is large. The second comparator 29 is shown in FIG.
As shown in FIG. 4A, the triangular wave of the triangular wave generating circuit 28 and the voltage E32 (1.8 V) of the reference voltage source 32 are compared to each other.
The output of (B) is generated. The output of the comparator 31 becomes a reset signal for the flip-flop 30, and the flip-flop 30 is reset at a constant cycle. Third comparator 3
1 is a current detection signal and a reference signal E as shown in FIG.
r is compared with hysteresis to generate the pulse shown in FIG. Since the primary winding 14a of the transformer 15a has an inductance, the drain current of the FET 7a increases with time. Therefore, when the current detection signal reaches the reference signal Er at t1 after the FET 7a is turned on at t0, the pulse shown in FIG. 4 (D) is generated, which is applied to the base of the transistor 36 via the OR gate 34 and the NOT circuit 38. Given that, transistor 36 and FET 7a turn off. At the same time, as shown in FIG. 4 (E), a trigger signal is input to the set terminal S of the flip-flop 30 and is set, and the output of t1 to t2 of the flip-flop 30 becomes the OFF control signal of the FET 7a.
During the period when the load current is large, the output voltage E25 of the error amplifier 25 becomes low as shown in FIG. That is, when the load current is large, the voltage drop from the power supply 1 to the output terminal 19 becomes large and the output voltage drops. Therefore, the intensity of the light emitted from the light emitting diode 21 decreases, the resistance of the phototransistor 22 increases, and the resistance of the transistor Q2 decreases, and the potential of the voltage dividing point 24 in FIG. 2 increases.
Since this is input to the inverting input terminal of the inverting amplification type error amplifier 25, the output of the error amplifier 25 decreases. As a result, the output voltage E25 of the error amplifier 25 becomes lower than the triangular wave, the output of the comparator 27 becomes low level as shown in FIG. 4 (F), and it becomes impossible to control the FET 7a on / off. . The output of the OR gate 34 becomes low level during the period t0 to t1 and high level during the period t1 to t3 as shown in FIG. 4G, and the gate voltage of the FET 7a becomes t0 to t1 as shown in FIG. 4H. High level during the period. Therefore,
During a period when the load current is large, the FET 7a is on / off controlled by a current control pulse regardless of the voltage control circuit 10a.

FE dependent on the current control circuit 11a
Even in the on / off control period of T7a, the reference voltage Er compared with the current detection signal Vi in the comparator 31 changes as shown in FIG. The reference voltage Er changes in proportion to the load current. That is, when the load current increases, the resistance of the transistor Q2 decreases, the potential of the voltage dividing point 33 increases, the charging voltage of the capacitor C4 also increases, and the reference voltage Er increases. The higher the reference voltage Er, the longer the ON period of the FET 7a and the higher the output voltage. When the load current becomes smaller, the ON period of the FET 7a becomes shorter and the output voltage is lowered.

When the load current is small, the operation on the right side of FIG. 5 is performed. That is, when the load current is small, the output voltage becomes high, so the resistance of the transistor Q2 becomes large, and the voltage dividing point
The potential of 4 drops. As a result, the output voltage E25 of the error amplifier 25 becomes high, the comparator 27 crosses the triangular wave, the PWM pulse is generated, and the FET 7a becomes PW.
It turns on / off in response to the M pulse, and constant voltage control is achieved. The potential of the voltage dividing point 33 becomes low during the period when the load current is small, but it does not fall below the level determined by the voltage dividing ratio of the resistors R10 and R8. Therefore, the output PW of the first comparator 27 is reduced.
The M pulse width becomes narrower than the pulse width of the second comparator 29, and the current control circuit 11a becomes irrelevant to the ON / OFF control of the FET 7a.

As is apparent from the above, when the load 2 demands a large current, both the first and second switching regulators 3 and 4 operate under current control, and each supplies a current of substantially the same value. . At this time, the current is supplied so that the output voltage is as close to the predetermined value as possible.
Therefore, the supply of the load current can be continued without significantly deteriorating the constant voltage characteristic of the output voltage. On the other hand, when the load 2 does not require a large current, the first and second switching regulators 3 and 4 operate in constant voltage control. In the case of constant voltage control, the current balance of the first and second switching regulators 3 and 4 becomes poor,
Since the current value is small, even if one of the switching regulators bears a large load current, its life is not significantly reduced. Also, malfunction due to noise is unlikely to occur during the voltage control period.

[0022]

MODIFICATION The present invention is not limited to the above-mentioned embodiments, and the following modifications are possible. (1) The output voltage detection circuit 5 can be independently provided without being shared by the first and second switching regulators 3 and 4. (2) The error amplifier circuit based on the transistor Q1 can be omitted, or the error amplifier 25 can be an inverting amplifier. (3) A circuit for detecting the current of the load 2 is provided to judge the magnitude of the load current. When the current is small, the voltage control circuit 10
Output PWM pulses of a and 10b are selectively sent to the FETs 7a and 7b, and when the load current is large, the current control circuit 11
The pulses of a and 11b can be selectively sent to the FETs 7a and 7b.

[Brief description of drawings]

FIG. 1 is a block diagram showing a DC power supply device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a voltage control circuit, a current control circuit, a drive circuit and parts related to them of the first switching regulator of FIG.

FIG. 3 is a diagram showing the mutual relationship of the triangular wave generation circuits of the first and second switching regulators of FIG.

FIG. 4 is a waveform diagram showing states of points A to H in FIG.

5 is a waveform diagram showing a state of each part of FIG. 2 when a load current changes.

[Explanation of symbols]

 3, 4 First and second switching regulators 10a, 10b Voltage control circuit 11a, 11b Current control circuit

Claims (2)

[Claims] 1. A DC power supply device for connecting a plurality of switching power supply devices in parallel to supply power to a common load, wherein the plurality of switching power supply devices are connected to a DC power supply via a primary winding of a transformer. A switching element connected, an output rectifying / smoothing circuit connected between the secondary winding of the transformer and the load, and a PWM pulse for keeping the voltage of the load constant based on the voltage of the load. Based on a voltage control circuit for controlling ON / OFF of the switching element by forming a current detector for detecting a current of the switching element, and a current detection signal and a reference signal obtained from the current detector. And a current control circuit for forming a current control pulse so as to limit the current detection signal to the level of the reference signal to control ON / OFF of the switching element. Each has an ON / OFF control of the switching element by the PWM pulse of the voltage control circuit in a region where the load current is small, and by the current control pulse of the current control circuit when the load current is large. A direct-current power supply device, which is configured to control the switching element to be turned on and off. 2. A direct current power supply device for connecting a plurality of switching power supply devices in parallel to supply power to a common load, wherein the plurality of switching power supply devices are connected to a direct current power supply via a primary winding of a transformer. A connected switching element, an output rectifying / smoothing circuit connected to the secondary winding of the transformer, an output voltage detecting circuit for detecting a voltage of the load and obtaining a signal indicating this change, the output voltage An error signal forming circuit that forms an error signal between a voltage obtained based on the detection circuit and the reference voltage, a triangular wave generating circuit, an error signal obtained from the error signal forming circuit, and an error signal obtained from the triangular wave generating circuit. A first comparator that compares a triangular wave to form a PWM pulse to control ON / OFF of the switching element, and a current detector that detects a current flowing through the switching element. And a second comparator for periodically generating a signal indicating the ON start time of the switching element by comparing the triangular wave obtained from the triangular wave generation circuit with a reference voltage, and the current detector. A third comparator for comparing the detected signal and the signal obtained from the output voltage detection circuit and outputting a signal indicating the OFF time of the switching element; and an ON start obtained from the second comparator. In response to a signal indicating a time point and a signal indicating an off time point obtained from the third comparator, a current control pulse having a time width from the on start time point to the off time point is formed to control the switching element. A current control pulse forming circuit, and in a region where the load current is small, the switching element is turned on / off based on the PWM pulse obtained from the first comparator, Current DC power supply apparatus characterized by being configured such that the switching element is turned on and off based on the current control pulses obtained from said current control pulse forming circuit in a large region.