JPH06224446A - Static-induction semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE:To realize that a gate-source reverse breakdown strength is ensured or that an ON voltage is lowered so as to be compatible with a normally-OFF characteristic in a static-induction semiconductor device. CONSTITUTION:In a static-induction semiconductor device 1, gate regions 3 and a source region 4 are formed on the surface part on one side of a semiconductor substrate 2 in such a way that the source region is situated between the gate regions 3, and impurity regions 8 whose conductivity type is the same as that of the source region and whose impurity concentration is between the impurity concentration of the source region and the impurity concentration of the semiconductor substrate are formed between the gate regions and the source region on the surface part on one side of the semiconductor substrate.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a static induction semiconductor device and a method for manufacturing the same.

[0002]

2. Description of the Related Art As an electrostatic induction semiconductor device, there is an electrostatic induction transistor as shown in FIG. In the case of the static induction transistor 71, the source region 74 is located between the p ⁺ type gate region 73 and the n ⁺ type source region 74 on the surface portion on one side of the n ⁻ type semiconductor substrate 72. And an n ⁺ -type drain region 75 is provided on the other side of the semiconductor substrate 72, and n ⁻ serves as a main current path between the source region 74 and the drain region 75.
It is a high specific resistance region 76 of the mold.

A gate electrode 83 is provided in contact with the gate region 73, a source electrode 84 is provided in the source region 74, and a drain electrode 85 is provided in contact with the drain region 75. This static induction transistor 7
Reference numeral 1 controls the main current flowing between the source electrode 84 and the drain electrode 75 by adjusting the voltage applied to the gate electrode 83.

The static induction transistor 71 includes a normally ion type in which the gate applied voltage is 0 and the source / drain is conductive, and a normally-off type in which the gate applied voltage is 0 and the source / drain is cut off. There is.
In the case of the latter normally-off static induction thyristor,
Even if the voltage applied to the gate is 0, the built-in voltage of the pn junction causes the depletion layers extending from the gate to be connected to each other and pinch off to be in a cutoff state.

[0005]

In the case of the electrostatic induction thyristor, it can be said that the normally-off type, which is the latter of the normally-ion type and the normally-off type, is more frequently used and is more useful. The reverse breakdown voltage is low. In the case of the electrostatic induction thyristor 71, the reverse breakdown voltage between the gate and the source should be provided by the n ⁻ -type region 79 having the same impurity concentration and a slight thickness as the high resistivity region 76 sandwiched between the gate region 73 and the source region 74. become. In the case of the normally-off type, the interval between the gate regions 73 is narrowed, the width of the n ⁻ type region 79 is very narrow (the interval is very short), and the reverse breakdown voltage between the gate and the source becomes low. .

Besides, the electrostatic induction thyristor 71
In this case, it is difficult to increase the effective area of the source region and reduce the on-voltage between the source and drain. If the pitch between the gate region 73 and the source region 74 is reduced to achieve miniaturization, the effective area of the source region becomes wider and the on-state voltage can be lowered.
As a result, the n ⁻ -type region 7
This is because the width of 9 is very narrow (the interval is very short), and the reverse breakdown voltage between the gate and the source becomes low.

In view of the above circumstances, the present invention provides a highly practical static induction semiconductor device which can realize a reverse breakdown voltage between a gate and a source or a low on-voltage while achieving a normally-off characteristic, and a practical practicable electrostatic induction semiconductor device. An object of the present invention is to provide an electrostatic induction semiconductor device capable of easily manufacturing a simple electrostatic induction semiconductor device.

[0008]

In order to solve the above-mentioned problems, the electrostatic induction semiconductor device of the present invention is such that a source region is provided between a gate region and a source region on a surface portion on one side of a semiconductor substrate. An impurity of the same conductivity type as the source region and between the source region and the semiconductor substrate between the gate region and the source region on the one surface portion of the semiconductor substrate. It is configured to have an impurity diffusion region of concentration,
In this electrostatic induction semiconductor device, a semiconductor substrate in which an impurity diffusion region for a gate region is formed on a surface portion on one side of the substrate is used as the semiconductor substrate, and the source region and the impurity region are formed on the surface on one side of the substrate. After forming a mask in which both regions forming regions are windows and introducing an impurity of a conductivity type opposite to that of the gate region through the windows, subsequently, forming a side wall at the edge of the mask window, It can be obtained by reintroducing an impurity having a conductivity type opposite to that of the gate region so as to have a higher concentration than in the case of the previous introduction, and forming the source region and the impurity diffusion region.

In the case of the electrostatic induction semiconductor device of the present invention, the source region has the same conductivity type as that of the semiconductor substrate and the impurity concentration is as high as four digits (10000 times) or more than that of the semiconductor substrate, and the source region is located between the gate region and the source region. The impurity diffusion region has the same conductivity type as the source region, and has an impurity concentration higher by, for example, one order of magnitude (10 times) that of the semiconductor substrate and an intermediate impurity concentration between the source region and the semiconductor substrate. Gates that try to secure the impurity concentration in the impurity diffusion region
The value is set according to the reverse breakdown voltage between the sources.

The electrostatic induction semiconductor device of the present invention may have not only a transistor structure but also a thyristor structure. In the case of a thyristor structure, the source is commonly referred to as the cathode and the drain is commonly referred to as the anode. The static induction semiconductor device of the present invention usually has normally-off characteristics, but it may have normally-ion characteristics.

[0011]

In the electrostatic induction semiconductor device of the present invention, between the gate region and the source region on the surface portion on one side of the semiconductor substrate, the conductivity type is the same as that of the source region, and the impurity concentration of the source region is the impurity concentration of the semiconductor substrate. Since it is a diffusion region having an impurity concentration between those impurity concentrations, the breakdown voltage is increased, and even in the normally-off characteristic, the reverse breakdown voltage between the gate and the source can be secured and the on-voltage can be lowered. The detailed reason is as follows.

The reverse breakdown voltage between the gate and the source in the electrostatic induction semiconductor device of the present invention is a pin diode composed of a p ⁺ region which is a gate region, an n ⁺ region which is a source region and an n ⁻ region between both regions. It can be regarded as a reach-through breakdown voltage in the structure. The reach-through breakdown voltage of the pin diode structure is controlled by the width and the concentration of the i layer (that is, the n ⁻ region), and if the width is constant, the lower the concentration is, the lower the breakdown voltage is. However, if the concentration of the i layer is too high, it becomes difficult to realize the normally-off characteristic. In the case of the present invention, since an appropriate impurity concentration between the impurity concentration of the source region and the impurity concentration of the semiconductor substrate is appropriately provided only between the gate region and the source region on the surface portion of the semiconductor substrate, the gate-source reverse It is possible to achieve the directional breakdown voltage and lower the on-voltage while achieving compatibility with the normally-off characteristic.

In the electrostatic induction semiconductor device of the present invention, it is necessary to form a fine impurity diffusion region of the same conductivity type as the source region and an appropriate impurity concentration in a narrow space between the gate region and the source region. In the method of manufacturing an electrostatic induction semiconductor device according to the present invention, a mask in which both the source region and the impurity region forming regions serve as windows is formed on the surface of one side of the semiconductor substrate in which the gate region is formed. After being formed, an impurity having a conductivity type opposite to that of the gate region is introduced through the window, and subsequently, a side wall (sidewall) is formed at the edge of the window of the mask and then a conductivity type of the conductivity type opposite to that of the gate region is formed. Impurities are reintroduced so as to have a higher concentration than in the case of the previous introduction to form the source region and the impurity diffusion region. Order to be finished without patterning to open the very small window to a narrow impurity diffusion regions formed between the over scan region, will be readily manufactured electrostatic induction semiconductor device of the present invention.

[0014]

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 shows a sectional structure of a static induction transistor according to an embodiment of the present invention. The static induction transistor 1 shown in FIG. 1 has a p ^- type semiconductor substrate (for example, a silicon substrate) 2 having a p-type
⁺ -Type gate region 3 and the n ⁺ -type source region 4 is provided so as to position the source region 4 between the gate region 3, n ⁺ -type Doren'i region on the back side of the semiconductor substrate 2 (the other side) 5, the source region 4 and the drain region 5 are provided.
An n ⁻ -type high specific resistance region 6 serving as a main current passage is provided between the two.

On the front side of the semiconductor substrate 2, the gate electrode 13 is in the gate region 3 and the source electrode 14 is in the source region 4.
Are in contact with each other through the openings in the insulating film 9, and the drain electrode 15 is in contact with the drain region 5 on the back side. Then, between the gate region 3 and the source region 4 in the front surface portion of the semiconductor substrate 2, an n-type impurity having an appropriate impurity concentration between the impurity concentration of the source region 4 and the impurity concentration of the semiconductor substrate 2 is provided. As described above, the diffusion region 8 is formed and the structure has a high reverse breakdown voltage between the gate and the source.

This static induction transistor 1 is the invention
According to the manufacturing method of the electrostatic induction semiconductor device of
You can get it. First, as shown in FIG. 2, the back surface
N for drain region 5 on the side⁺Layered n ^-/ N⁺
Opening of the window 22 in the gate region forming region on the surface of the semiconductor substrate 2
The insulator (oxide film) mask 21
Is introduced by injecting and diffusing the surface of the semiconductor substrate 1.
N minutes^-P for gate region 3 in the layer⁺Form an area.

Next, as shown in FIG. 3, the semiconductor substrate 2
An insulator (oxide film) mask 23 having a window 24 opened at a position between the gate regions 3 is provided on the surface of, and n-type impurities are introduced by implantation / diffusion, and the n ⁻ layer of the surface portion of the semiconductor substrate 2 is formed. Is an n-type impurity region 10. Subsequently, as shown in FIG. 4, a side wall (side wall) 25 is formed at the edge of the window 24. The sidewall 25 can be formed by etching an insulating film deposited by high temperature CVD by anisotropic dry etching or the like.

Then, as shown in FIG. 5, n-type impurities are introduced again by implantation / diffusion through the window 24 whose opening area is narrowed by the formation of the side wall 25, and the source is formed on the front surface of the semiconductor substrate 2. A region 4 and an impurity diffusion region 8 having an impurity concentration between the impurity concentration of the source region 4 and the impurity concentration of the semiconductor substrate are formed. This second n-type impurity implantation / diffusion is performed so as to have a higher concentration than the first time. Thereafter, required electrodes 13 to 15 are formed to obtain the static induction transistor of FIG. The mask 23 and the side wall 25 become the insulating film 9.

The window 24 is initially formed so as to expose the surface of the substrate by the formation region of the source region 4 and the impurity diffusion region 8. The window 24 after the side wall 25 is formed exposes only the formation region of the source region 4. Therefore, 2
Most of the n-type impurity is introduced only into the source region, and both regions 4 and 8 serve as diffusion regions having appropriate impurity concentrations. The impurity region 10 shown in FIG.
And the outer side becomes the impurity diffusion region 8. No additional mask is required for forming the side wall 25, and only a simple side wall forming step is added, so that the manufacturing is easy.

The present invention is not limited to the above embodiment. Another example is a static induction thyristor in which the n ⁺ layer of the semiconductor substrate 2 is a p ⁺ layer. In the case of the above embodiment,
In the first introduction of the n-type impurity, only the implantation may be performed, and the diffusion may be such that after the second introduction of the n-type impurity, both the first and second n-type impurities are diffused at the same time. .

[0021]

According to the electrostatic induction semiconductor device of the present invention,
In the surface portion of the semiconductor substrate between the gate region and the source region, a diffusion region with an appropriate impurity concentration that increases the reverse breakdown voltage between the gate and the source is provided. It is highly practical because it can be realized while ensuring the breakdown voltage and lowering the on-state voltage while achieving both the normally-off characteristics.

The method of manufacturing an electrostatic induction semiconductor device according to the present invention can easily manufacture the highly practical electrostatic induction semiconductor device described above without any additional difficulty in the manufacturing process, and thus is extremely useful. Is.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing the main configuration of a static induction transistor of an example.

2 is a cross-sectional view showing a gate region forming step in manufacturing the static induction transistor of FIG.

3 is a cross-sectional view showing an n-type impurity introduction step in manufacturing the static induction transistor of FIG.

FIG. 4 is a cross-sectional view showing a side wall forming step in manufacturing the static induction transistor of FIG.

5 is a cross-sectional view showing an n-type impurity re-introduction process in manufacturing the static induction transistor in FIG.

FIG. 6 is a cross-sectional view showing a main part configuration of a conventional static induction transistor.

[Explanation of symbols]

 1 static induction transistor 2 semiconductor substrate 3 gate region 4 source region 5 drain region 6 high resistivity region 8 impurity diffusion region

Claims (2)

[Claims] 1. A gate region and a source region are provided on a surface portion on one side of a semiconductor substrate such that the source region is located between the gate regions, and the gate region on the surface portion on one side of the semiconductor substrate. And an impurity diffusion region having the same conductivity type as that of the source region and an impurity concentration between the impurity concentration of the source region and the impurity concentration of the semiconductor substrate are provided between the source region and the source region. 2. A gate region and a source region are provided on a surface portion on one side of the semiconductor substrate such that the source region is located between the gate regions, and the gate region on the surface portion on one side of the semiconductor substrate. A method of manufacturing an electrostatic induction semiconductor device, wherein an impurity diffusion region having the same conductivity type as the source region and an impurity concentration between the source region and the semiconductor substrate is provided between the source region and the source region. As the semiconductor substrate, a semiconductor substrate in which an impurity diffusion region for a gate region is formed on the surface portion on the one side of the substrate is used, and both the source region and the impurity region formation regions have windows on the surface on the one side of the substrate. After forming a mask, the impurity of the conductivity type opposite to that of the gate region is introduced through the window, and subsequently, the side wall is formed at the edge of the mask window, and then the opposite side of the gate region is formed. A method of manufacturing an electrostatic induction semiconductor device, comprising: introducing a conductivity type impurity again so as to have a higher concentration than that in the case of the previous introduction to form a source region and the impurity diffusion region.