JPH0622138A - Picture processor - Google Patents

Abstract

PURPOSE:To improve the picture quality by adding most proper data to a noted picture element to suppress the generation of moire and improving the reproducibility of an edge of a character and a drawing. CONSTITUTION:The processing unit is provided with an edge quantity arithmetic operation circuit 3 having plural edge emphasis filters to calculate an edge quantity of picture element data subjected to edge emphasis, a selector 4 selecting one of plural calculated edge quantities in the circuit 3, and an adder 5 adding the edge quantity selected by the selector 4 or data being a prescribed number of multiple of the edge quantity to the picture element data so as to emphasize the edge. In the case of, e.g. a 3X3 picture element matrix, it is provided with line buffers LB1, LB2 storing picture data by one line respectively and registration matrices R1-R9 storing data of a picture element matrix pattern, picture data P being a processing object are transferred serially in the unit of picture elements to the register R1 and the buffer LB1. Picture data from the LB1 are inputted to the register R4 and the buffer LB2 synchronously with the transfer of the data P, and the transfer is implemented for the other registers similarly.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus such as a facsimile.

[0002]

2. Description of the Related Art In edge enhancement processing in an image processing apparatus such as a conventional facsimile, an edge amount is calculated using a Laplacian filter as shown in FIG. 12, and the obtained edge amount value or the edge amount is multiplied by a constant. The process of adding the value to the pixel of interest was performed.

[0003]

However, in the above conventional example, in order to emphasize the high frequency component of the image data,
In the case of a halftone dot image, moire may occur due to the relationship between the halftone dot period and the resolution at the time of reading, and there is a problem that the image quality deteriorates. Further, in order to solve the above-mentioned problem, a Laplacian filter as shown in FIG. 13 may be used, but a large number of line buffers are required, the hardware scale becomes large, and the cost increases.

Therefore, an object of the present invention is to provide an image processing apparatus which solves the above problems.

[0005]

To achieve the above object, the present invention provides a plurality of edge enhancement filters for calculating the edge amount of pixel data to be edge enhanced, and a plurality of edge enhancement filters calculated by the plurality of edge enhancement filters. The present invention further comprises a selecting means for selecting one of the edge amounts and an edge enhancing means for enhancing the edge by adding the edge amount selected by the selecting means or data of a constant multiple of the edge amount to the pixel data. Further, an average value calculating means for calculating an average value of pixel data of one column or a plurality of columns in the main scanning direction or the sub-scanning direction, an average value obtained by the average value calculating means, and the pixel A difference value calculating means for calculating a difference value between the value of the pixel of interest in the data or the average value of data of a plurality of pixels including the pixel of interest; Comparing means for comparing the difference value with a predetermined threshold value, and means for edge enhancing the pixel of interest based on the comparison result obtained by the comparing means, further, An average value calculating means for calculating an average value of pixel data of one column or a plurality of columns in the main scanning direction or the sub-scanning direction, an average value obtained by the average value calculating means, and a target pixel of the pixel data. Value or a difference value calculating means for calculating a difference value from an average value of data of a plurality of pixels including a target pixel, and comparing means for comparing the difference value obtained by the difference value calculating means with a predetermined threshold value. A plurality of edge enhancement filters for calculating the edge amount of the pixel data to be edge-emphasized, and one of the plurality of edge amounts calculated by the plurality of edge enhancement filters. Selecting means for selecting based on the comparison result obtained by the comparing means, and edge enhancing means for edge enhancing by adding the edge amount selected by the selecting means or data of a constant multiple of the edge amount to the pixel data. It is characterized by having.

[0006]

According to the present invention, it is possible to suppress the occurrence of moire by adding the most appropriate data to the target pixel and improve the image quality.

[0007]

Embodiments of the present invention will now be described in detail with reference to the drawings.

(Embodiment 1) FIG. 1 is a block diagram showing a first embodiment of the present invention. In FIG. 1, 1 is a line buffer for accumulating image data of a plurality of lines, 2 is a register for accumulating data of a pixel matrix pattern, 3 is an edge for calculating an edge amount of a pixel of interest based on an output value of the register 2. A quantity computing circuit, 4 is a selector for selecting and outputting one of a plurality of edge quantities calculated by the edge quantity computing circuit 3, and 5 is a pixel of interest output of the register 2 for the edge quantity selected by the selector 4. Is added to perform the edge enhancement processing by adding to the value of, and reference numeral 6 is a binarization circuit that converts multi-valued data output from the adder 5 into binary data.

Next, the operation of this configuration will be described.

FIG. 2 is a diagram showing the configuration of the line buffer 1 and the register 2 in the case of a 3 × 3 pixel matrix. In FIG. 2, LB1 and LB2 are line buffers R1 that can store image data for one line, respectively.
R9 is a register matrix for accumulating data of a 3 × 3 pixel matrix pattern.

The image data P to be processed is serially transferred pixel by pixel, and is registered in the register R1 and the line buffer LB.
Input to 1. The image data output from LB1 in synchronization with the transfer of image data is input to the register R4 and the line buffer LB2. The image data P is output from the line buffer LB1 with a delay of one line and is output from LB2 with a delay of two lines. Further, in synchronization with the transfer of the image data P, the image data input to R1, R4 and R7 are sequentially input to R2, R5 and R8, and the image data input to R2, R5 and R8 are sequentially input to R3, R6 and R9. It is shifted to form a 3 × 3 matrix pattern. The output data D1 to D9 of the registers R1 to R9 are input to the edge amount calculation circuit 3. 3 is shown in FIG.
6 shows an example of the configuration of an edge amount calculation circuit 3 using two edge amount calculation filters as shown in FIG. 9B and a selector 4 that outputs the larger one of the two edge amounts from the circuit 3. The edge amount calculation circuit 3 includes adders 3-1 to 3-3, 3-10, 3-11, multiplier (× 2) units 3-4 to 3-6 and subtractors 3-7 to 3-9. The selector 4 is composed of a comparator 4-1 and a selector 4-2. Outputs eg1 and e from the edge amount calculation circuit 3
g2 is the edge amount calculated by the filters of FIGS. 4A and 4B, and the larger absolute value of eg1 and eg2 compared by the comparator 4-1 is from the selector 4-2. The output value and the value of the pixel of interest from the register 2 are added by the adder 5, and edge enhancement is performed.

FIG. 5 shows an example of a 3 × 3 pixel matrix and an actual halftone dot pattern, and FIG. 6 shows an example of a 3 × 3 pixel matrix and an edge pattern such as a character. The numbers in the figure are black in each pixel (hatched)
It shows the ratio of In FIG. 5, eg
1 = -40, eg2 = -40, and -20 when the edge amount is added to the pixel of interest. When the pattern of FIG. 5 is edge-emphasized by the Laplacian filter of FIG. 12, −
At 60, the edge is more emphasized in the halftone dot portion, and moire is likely to occur. On the other hand, in the edge portion of FIG. 6, eg1 = 0, eg2 = −180, and after edge enhancement becomes −160. Similarly, in the case of the Laplacian filter shown in FIG. 12, the edge becomes -40 after edge enhancement, and the edges are more emphasized when the filters shown in FIGS. 4A and 4B are used.

The present invention can be applied not only to a 3 × 3 pixel matrix but also to pixel matrices of other sizes.

(Second Embodiment) FIG. 7 is a block diagram of a second embodiment of the present invention. In the figure, 1 is a line buffer for accumulating image data of a plurality of lines, 2 is a register for accumulating data of a pixel matrix pattern, 1
Reference numeral 0 is an arithmetic circuit that calculates the output value of the register 2, 11 is a comparator that compares the result calculated by the arithmetic circuit 10 with a threshold value, 12 is an edge emphasis circuit that performs edge emphasis processing on the pixel data of interest, 13 Is the value of the pixel of interest from the register 2 or the edge enhancement circuit 1 according to the comparison result of the comparator 11.
The selector 6 outputs either the pixel of interest from 2 or the edge-enhanced value, and 6 is a binarization circuit that converts the multi-valued image data output from the selector 13 into binary image data and outputs it.

Next, the operation of this configuration will be described.

The configurations of the line buffer 1 and the register 2 are as shown in FIG.
The pixel matrix pattern of Register R
Output data D1 to D9 of 1 to R9 are input to the arithmetic circuit 10 as shown in FIG. The adders 10-1 to 10-3 calculate the sum of 3 pixels in the main scanning direction, and 10-4 to 10
At -6, the sum of 3 pixels in the sub-scanning direction is calculated. Specifically, in the adder 10-1, D1 + D2 + D3 is 10-
2 is D4 + D5 + D6, and 10-3 is D7 + D8 +
D9 is calculated. Similarly, in the adder 10-4, D1 + D
When 4 + D7 is 10-5, D2 + D5 + D8 is 10-
At 6, D3 + D6 + D9 is calculated. Subtractor 10-7
Then, the difference value between the outputs of the adders 10-1 and 10-2 is
The subtractor 10-8 calculates the difference value between the outputs of the adders 10-2 and 10-3. Similarly, the subtractor 10-9 calculates the difference value between the adders 10-4 and 10-5, and the subtractor 10-10 calculates the difference value between the adders 10-5 and 10-6. Output values Q1, Q2, Q3, Q of the subtractors 10-7 to 10-10
4 is input to the comparator 11. In the comparator 11, Q1
If at least one of the Q4 data has a threshold value Th or more, the output T = 1, and if all Q1 to Q4 are smaller than Th, T = 0.

In the edge emphasizing circuit 12, the edge amount calculated by the Laplacian filter shown in FIG. 12 is added to the target pixel data, and the edge emphasizing process is performed. Selector 1
In 3, when the output T of the comparator 11 is 1, the edge enhancement circuit 1
When the output T is 0, the edge-enhanced value from 2 is selected and the edge-unemphasized value from the register 2 is selected and output. The binarization circuit 6 binarizes the multi-value output data of the selector 13 and outputs it.

As described above, FIG. 5 shows a pattern example of a 3 × 3 matrix and actual halftone dots, and FIG. 6 shows a pattern example of an edge portion of a 3 × 3 matrix and characters. The numbers in are the black part (hatched part) in each pixel
It shows the closing ratio of Q, but in FIG.
1 = -70, Q2 = 30, Q3 = 40, Q4 = -80, and in FIG. 6, Q1 = Q2 = 0, Q3 = 6.
0, Q4 = -240, and the absolute value of the average difference value is larger in the edge part than in the halftone dot part. Therefore, the halftone dot part and the edge part can be separated, and the edge emphasis is performed in the halftone dot area. Instead, since edge enhancement is performed at the edge portion, the image quality can be improved compared to the conventional case.

(Embodiment 3) FIGS. 9 and 10 are block diagrams of a third embodiment of the present invention, which is different only in the edge emphasizing circuit 12A and the other construction is the second embodiment. Similar to the example (FIG. 7). Adders 12-1, 12-
2, 12-4 ,. Multiplier (× 4) unit 12-3, subtractor 12
In the edge enhancement circuit 12A consisting of −5 (above Laplacian filter in FIG. 12) and the constant multiplier 12-6, the edge amount is calculated by the Laplacian filter shown in the figure, and the value is multiplied by the constant multiplier 12-6. And are selected by the selector 13 based on the output of the comparator 11 as the value of the edge amount added to the target pixel. In this way, it is possible to prevent deterioration of image quality by switching the degree of edge enhancement depending on the halftone dot area or the character area.

The structure of the present invention can be applied not only to the case of a 3 × 3 pixel matrix but also to pixel matrices of other sizes.

(Fourth Embodiment) FIG. 11 is a block diagram of a fourth embodiment of the present invention. In the figure, 1 is a line buffer for storing image data of a plurality of lines, 2 is a register for storing data of a pixel matrix pattern,
Reference numeral 10 is an arithmetic circuit for calculating the output value of the register 2, 11
Is a comparator that compares the result calculated by the arithmetic circuit 10 with a threshold value, 3 is an edge amount arithmetic circuit that calculates the edge amount of the pixel of interest from the output value of the register 2, and 4 is the comparison result of the comparator 11. The selector 5 which selects and outputs one of the plurality of edge amounts calculated by the edge amount calculation circuit 3 based on the above, outputs the output value of the selector 4 and the value of the pixel of interest in the output of the register 2. An adder for adding 6 is a binarizing circuit for converting the multi-valued data output of the adder 5 into binary data.

Next, the operation of this configuration will be described.

The configurations of the line buffer 1 and the register 2 are as shown in FIG. 2, and the outputs D1 to D9 of the registers R1 to R9 are input to the arithmetic circuit 10 and the edge amount arithmetic circuit 3. The configuration of the arithmetic circuit 10 is as shown in FIG. 8, and the output values Q1 to Q4 of the subtractors 10-7 to 10-10 are input to the comparator 11. The operation of the comparator 11 is as described above.

The configuration of the edge amount calculation circuit 3 is as shown in FIG. 3, and shows a configuration example of the edge amount calculation by the two edge amount calculation filters of FIGS. 4 (a) and 4 (b). . Outputs eg1 and eg2 are respectively shown in FIG.
It is the edge amount calculated by the filter of (b).
Either 1 or eg2 or 0 is output. The adder 5 adds the output value of the selector 4 and the value (D5) of the pixel of interest from which the edge is emphasized from the register 2 to perform edge emphasis processing. The binarization circuit 6 binarizes the multi-value output data from the adder 5 and outputs it.

As described above, FIG. 5 shows an example of a pattern of 3 × 3 matrix and actual halftone dots, and FIG. 6 shows an example of a pattern of 3 × 3 matrix and an edge portion such as a character. It is a thing. The numbers in the figure show the proportion of black portions (hatched portions) in each pixel. In FIG. 5, Q1 = -70, Q2 = 30, Q3 =
40, Q4 = -80, and in FIG. 6, Q1 =
Since Q2 = 0, Q3 = 60, and Q4 = -240, and the absolute value of the difference value of the average value is larger in the edge part than in the halftone dot part, the halftone dot part and the edge part of the character or figure are separated. it can. In addition, in the edge amount calculation circuit 3, as shown in FIG.
If the calculation is performed using the edge enhancement filter of (b), then eg
1 = -40, eg2 = -40, and -20 when the edge amount is added to the pixel of interest. On the other hand, when the pattern of FIG. 5 is edge-emphasized by the Laplacian filter of FIG. 12, the value of the pixel of interest is −60, and the edge is further emphasized in the halftone dot portion, and moire is likely to occur. In the edge portion of FIG. 6, eg1 = 0, eg2 = -18
It becomes 0, and when it is added to the pixel of interest, it becomes -160. Similarly, in the case of the Laplacian filter, the value is -40, which is shown in FIG.
Using the filters of (a) and (b) is emphasized more than the edge. By the select signal of the comparator 11,
By outputting one of the edge amounts calculated by the edge amount calculation circuit 3 or 0 and adding it to the pixel of interest, it is possible to suppress the occurrence of moire and to clearly reproduce the edge portion of a character or a figure. Therefore, the image quality can be improved.

The present invention can be applied not only to the case of a 3 × 3 pixel matrix but also to pixel matrices of other sizes. On the other hand, a plurality of edge enhancement filters are prepared, and the edge amount is appropriately adjusted by the output of the comparator. The image quality can be improved by switching.

[0027]

As described above, according to the present invention, it is possible to suppress the occurrence of moire, improve the reproducibility of the edges of characters and figures, and improve the image quality. it can.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a block diagram of line buffers and registers in a 3 × 3 pixel matrix.

FIG. 3 is a block diagram showing a configuration example of an edge amount calculation circuit and a selector.

4A and 4B are diagrams showing examples of edge enhancement filters.

FIG. 5 is a diagram showing a pattern example of a 3 × 3 pixel matrix and halftone dots.

FIG. 6 is a diagram showing a pattern example of a 3 × 3 pixel matrix and an edge portion of a character or a figure.

FIG. 7 is a block diagram of a second embodiment of the present invention.

FIG. 8 is a block diagram of an arithmetic circuit of the embodiment.

FIG. 9 is a block diagram of a third embodiment of the present invention.

FIG. 10 is a block diagram of an edge enhancement circuit according to the same embodiment.

FIG. 11 is a block diagram of a fourth embodiment of the present invention.

FIG. 12 is a diagram showing an example of a conventional edge enhancement filter.

FIG. 13 is a diagram showing an example of another filter.

[Explanation of symbols]

 1 line buffer 2 register 3 edge amount calculation circuit 4 selector 5 adder 6 binarization circuit

Claims (3)

[Claims] 1. A plurality of edge enhancement filters for calculating an edge amount of pixel data to be edge-emphasized, and a selection means for selecting one of the plurality of edge amounts calculated by the plurality of edge enhancement filters. An image processing apparatus comprising: an edge enhancement unit that adds edge amount selected by the selection unit or data that is a constant multiple of the edge amount to the pixel data to enhance the edge. 2. An average value calculating means for calculating an average value of pixel data of one row or a plurality of rows in the main scanning direction or the sub-scanning direction, and an average value obtained by the average value calculating means.
A difference value calculating means for calculating a difference value between the value of the pixel of interest in the pixel data or the average value of data of a plurality of pixels including the pixel of interest, and a difference value obtained by the difference value calculating means are predetermined. An image processing apparatus comprising: comparison means for comparing with a threshold value; and means for edge-enhancing the target pixel based on the comparison result obtained by the comparison means. 3. An average value calculating means for calculating an average value of pixel data of one column or a plurality of columns in the main scanning direction or the sub-scanning direction, and an average value obtained by the average value calculating means,
A difference value calculating means for calculating a difference value between the value of the pixel of interest in the pixel data or the average value of data of a plurality of pixels including the pixel of interest, and a difference value obtained by the difference value calculating means are predetermined. Comparing means for comparing with the threshold value, a plurality of edge enhancement filters for calculating the edge amount of the pixel data for edge enhancement, and one of the plurality of edge amounts calculated by the plurality of edge enhancement filters.
Selecting means for selecting one of the two based on the comparison result obtained by the comparing means, and an edge for edge enhancement by adding to the pixel data a quantity of edge selected by the selecting means or data of a constant multiple of the quantity of edge. An image processing apparatus comprising: an emphasis unit.