JPH0621721A - Oscillator - Google Patents

Abstract

PURPOSE:To sufficiently ensure the amplitude of a signal inputted to a resonator even when a resistance of a resistor to be connected to the resonator in a loop is decreased. CONSTITUTION:An oscillator 10 is connected with a limiter amplifier 11, an adder 12, a resonator 13 employing a crystal vibrator, emitter and collector path of a transistor(TR) 1 and a BPF 14 in a loop. The oscillation loop is formed by applying directly the output of the BPF 14 to the adder 12. The BPF 14 filters the band of a signal fed to an input terminal while the center frequency is fixed and the signal subjected to band filtering is outputted as an output signal a2. Thus, the oscillator 10 uses the adder 12 to add an output signal a1 outputted from the BPF 14 and an output signal b1 outputted from the limiter amplifier 11, and an output signal c1 from the adder 12 is fed to one terminal of the resonator 13, then the amplitude of the signal inputted to the resonator 13 is sufficiently ensured.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillator using a resonator such as a crystal oscillator, and more particularly to an oscillator capable of stabilizing the oscillation frequency when the oscillation frequency is fixed.

[0002]

2. Description of the Related Art Generally, a video tape recorder (hereinafter referred to as
An oscillator using a crystal resonator used as a VTR) as a resonator is used as a variable oscillator for locking to a color sub-carrier during recording, and as a fixed oscillator for reference during reproduction.

FIG. 4 shows a block diagram of such a conventional oscillator.

In FIG. 4, an oscillator 50 has a common terminal c of a changeover switch 51 and a resonator 5 made of a crystal oscillator.
2, while being connected to the first input terminal a1 of the changeover switch 51 via the limiter amplifier 53 and the resistor R11, the connection point between the limiter amplifier 53 and the resistor R11 is connected to the first of the changeover switch 51 via the phase shifter 54 and the resistor R12. It is connected to two input terminals a2.

[0005] The changeover switch 51 is for reproducing a VTR.
That is, in the fixed oscillation frequency mode, firstly, the input terminal a1
Is connected to the common terminal c, and the second input terminal a2 is connected to the common terminal c during recording of the VTR, that is, in the oscillation frequency variable mode. As a result, the oscillator 50 has the resonator 52 and the limiter amplifier 5 in the oscillation frequency fixed mode.
3 and the resistor R11 are connected in a loop shape, and in the case of the oscillation frequency variable mode, the resonator 52, the limiter amplifier 53, the phase shifter 54 and the resistor R12 are connected in a loop shape.

The phase shift amount of the phase shifter 54 is controlled by the control voltage V11 supplied to the input terminal 55.

In such an oscillator 50, when the oscillation frequency is fixed, the signal passing through the resonator 52 is
It returns to the resonator 52 via the limiter amplifier 53 and the resistor R11. As a result, the oscillator 50 oscillates at a frequency fa that does not cause a phase delay in the resonance characteristics of the resonator 52 and the resistor R11.

In the oscillation frequency variable mode, the signal passing through the resonator 52 is fed back to the resonator 52 via the limiter amplifier 53, the phase shifter 54 and the resistor R11. Accordingly, when the phase shift amount is controlled to A degree by the phase shifter 54, the oscillator 50 oscillates at the frequency fX that causes a phase delay of A degree in the resonance characteristics of the resonator 52 and the resistor R12.

Here, in order to widen the frequency variable range of the frequency fX in the oscillation frequency variable mode of the oscillator 50, the resistance value of the resistor R12 may be increased. Further, in order to prevent the variation of the frequency fa in the oscillation frequency fixed mode of the oscillator 50, the resistance value of the resistor R11 may be lowered. However, if the resistance value of the resistor R11 is too small, the amplitude of the signal input to the resonator 52 becomes insufficient, driving of the resonator 52 becomes difficult, and waveform distortion is likely to occur. The value of is compromised. For this reason, the oscillator 50 is not provided with a filter so as to eliminate the phase rotation as much as possible, and as a result, a triple harmonic oscillation is likely to occur, and a countermeasure is required.

Further, when such an oscillator 50 is integrated into a circuit, a resonator 52 is externally attached, which requires 2 pins. Here, in order to take out the oscillation output from the oscillator 50, one pin must be provided in addition to the above two pins, or the terminal of the resonator 52 should be used as the output terminal. It is advantageous to minimize the number of pins of the integrated circuit to increase the density of the integrated circuit, but if the resonator terminal is shared with the output terminal of the oscillator to save the pin, the oscillation frequency variable mode and oscillation frequency fixed The level changes greatly depending on the mode. Switching amplification can be performed so that this level becomes the same, but if an attempt is made to increase the amplitude in the oscillation frequency fixed mode with low resonance impedance, a large drive current for the crystal as the resonator 52 is required, and the power supply is also increased. It is not preferable because the number of leaks increases.

[0011]

In the above-mentioned conventional oscillator, in order to prevent the frequency variation in the oscillation frequency fixed mode of the oscillator, the resistance value of the resistor connected in a loop with the resonator may be lowered. . However, if the resistance value of this resistor is made too small, it becomes difficult to drive the oscillator, the amplitude of the signal input to the resonator becomes insufficient, and waveform distortion easily occurs, so a certain value is compromised. For this reason, no filter is provided, and accordingly 3
Double harmonic oscillation is likely to occur. Further, when the terminal of the resonator is shared with the output terminal of the oscillator in order to save pins when integrated into an integrated circuit, the level greatly changes between the oscillation frequency variable mode and the oscillation frequency fixed mode.

The present invention eliminates the above problems, and in the oscillation frequency fixed mode of the oscillator, even when the resistance value of the resistor connected in a loop to the resonator is lowered, the amplitude of the signal input to the resonator is reduced. Can be secured sufficiently and the level difference between the oscillation frequency variable mode and the oscillation frequency fixed mode can be suppressed with a simple circuit configuration when the resonator terminal is shared with the oscillator output terminal to save pins. It is an object of the present invention to provide an oscillator that can be used.

[0013]

An oscillator according to the present invention is a limiter amplifier for amplifying an input signal and limiting an amplitude, the input signal input to the limiter amplifier, and an output output from the limiter amplifier. An adder that adds signals, and a resonator that outputs a resonance signal from the other end by supplying the output signal from this adder to one end,
A resonance signal from the resonator is supplied to an input electrode, the input signal to be input to the limiter amplifier is supplied to a common electrode, and an output from the output electrode or an output equivalent thereto is fed back to the limiter amplifier. It is characterized by having.

According to a second aspect of the present invention, there is provided an oscillator according to the first and second limiter amplifiers for amplifying and limiting the amplitude of an input signal, the input signal input to the first limiter amplifier and the limiter amplifier. An adder for adding the output signal to be output, an output signal from the adder and a second
The output signal from the limiter amplifier is supplied to one end and the resonance signal is output from the other end, and the resonance signal from this resonator is supplied to the emitter, and the input signal input to the first limiter amplifier is A first transistor which is supplied to the base and which returns an output from the collector or an output equivalent thereto to the first limiter amplifier, and a resonance signal from the resonator are supplied to the emitter and a DC voltage is supplied to the base. And a second transistor for returning an output from the collector or an output equivalent thereto to the second limiter amplifier, and an output from the collector of the second transistor or an output equivalent thereto for the second limiter. It is provided in the path for returning to the amplifier, and the output from the collector of the second transistor or the output equivalent thereto can be adjusted in a phase shift Is provided in the path for supplying the output signal from the adder and the output signal from the second limiter amplifier to the resonator, and in the case of the oscillation frequency fixed mode, A first switch means for guiding an output signal to the resonator and for guiding the output signal from the second limiter amplifier to the resonator in the case of the oscillation frequency variable mode, and a resonance signal from the resonator as a first signal.
And a path for supplying to the second transistor, which guides the resonance signal from the resonator to the first transistor in the case of the oscillation frequency fixed mode, and from the resonator in the case of the oscillation frequency variable mode. A second switch means for guiding a resonance signal to the second transistor.

[0015]

According to the structure of claim 1, the adder adds the input signal input to the limiter amplifier and the output signal output by the limiter amplifier, and the output signal from the adder is applied to one end of the resonator. Since it is supplied, the amplitude of the signal input to the resonator can be sufficiently secured.

According to the second aspect of the invention, in the fixed oscillation frequency mode, the adder adds the input signal input to the first limiter amplifier and the output signal output by the first limiter amplifier. Then, the first switch means guides the output signal from the adder to the resonator, and the second switch means guides the resonance signal from the resonator to the first transistor. On the other hand, in the oscillation frequency variable mode, the first switch means guides the output signal from the second limiter amplifier to the resonator, and the second switch means transfers the resonance signal from the resonator to the second transistor. Lead. Accordingly, when the terminal of the resonator is shared with the output terminal of the oscillator in order to save pins, the level difference between the oscillation frequency variable mode and the oscillation frequency fixed mode can be suppressed with a simple circuit configuration.

[0017]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of an oscillator according to the present invention, which is applied to a crystal oscillator dedicated to a fixed mode.

In FIG. 1, an oscillator 10 comprises a limiter amplifier 11, an adder 12, a crystal resonator 13 and
The emitter / collector path of the transistor Tr1 and the bandpass filter (hereinafter referred to as BPF) 14 are connected in a loop, and the output of the BPF 14 is directly added to the adder 1
The oscillation loop is formed by supplying 2 to the above.

The oscillator 10 will be described in more detail.
The output signal a1 of the PF 14 is the NPN transistor Tr1.
Is supplied to the base and one input terminal of the adder 12, and is amplified and amplitude-limited by the limiter amplifier 11 and is supplied to the other input terminal of the adder 12 as an output signal b1. Output signal c1 from the output terminal of the adder 12
Is guided to an output terminal 15 for extracting an oscillation output and is supplied to one end of the resonator 13. Resonator 13
The resonance signal from the other end of the NPN transistor Tr1 is guided to the emitter of the NPN transistor Tr1. The emitter of the NPN transistor Tr1 is connected to the direct current source I1. NPN
The collector of the transistor Tr1 is connected to the power supply line via the resistor R1 and is also connected to the input terminal of the BPF 14. As a result, the output signal d1 from the collector of the transistor Tr1 is fed back to the BPF 14.

The BPF 14 band-filters the signal supplied to its input terminal with the center frequency fixed,
The signal that has been band-filtered is output as the output signal a1.

FIG. 2 is a timing chart showing the operation of such an oscillator 10. FIG. 2 (a) shows the output signal a1 of the BPF 14, and FIG. 2 (b) shows the limiter amplifier 11.
2 (c) shows the output signal c1 of the adder 12 and FIG. 2 (d) shows the output signal d1 from the collector of the transistor Tr1.

The output signal a1 of the BPF 14 is shown in FIG.
As shown in, it has a sine wave. This output signal a1
Is amplified and limited in amplitude by the limiter amplifier 11,
As shown in FIG. 2B, a rectangular output signal b1 is obtained. This output signal b1 is output by the adder 12 as the output signal a1.
Is added, the output signal c1 is a sine wave in which up-shifting and down-shifting are alternately repeated for each half wavelength shown in FIG. The resonator 13 is driven by such an output signal c1, and the resonance signal of the resonator 13 is supplied to the emitter of the transistor Tr1. This allows
The resonance signal of the resonator 13 is a grounded base amplifier by the transistor Tr1 having the equivalent emitter resistance and the resistance of the resonator 13 as the emitter resistance Re1 (R1 / Re1).
(R1 is the resistance value of the emitter resistance R1 and Re1 is the resistance value of the collector resistance Re1)
As shown in FIG. 2D, the sine wave output signal d1 is fed back to the BPF 14 from the 1 collector.

According to such an oscillator 10, the adder 1
2, the output signal a1 output from the BPF 14 and the output signal b1 output from the limiter amplifier 11 are added, and the output signal c1 from the adder 12 is supplied to one end of the resonator 13, so that the resonator 13 The amplitude of the input signal can be sufficiently secured. As a result, the oscillation resistance of the resonator 13 only needs to be the emitter resistance of the transistor and the emitter resistance Re1 corresponding to the resistance of the oscillator 13, and can be made extremely small. As a result, it is possible to prevent variations in the oscillation frequency in the oscillation frequency fixed mode.
The frequency is maintained with high accuracy despite the provision of the PF 14. Since the loop gain is suppressed by the BPF 14, the triple harmonic wave does not oscillate.

FIG. 3 is a circuit diagram showing another embodiment of the oscillator according to the present invention.

In FIG. 3, the oscillator 20 includes a switch 4
In the case of the oscillation frequency fixed mode, the limiter amplifier 21, the adder 22, the resonator 23 by the crystal oscillator, the emitter / collector path of the transistor Tr2 and the BPF 24 are connected in a loop by switching between 1 and 42 to vary the oscillation frequency. In the case of the mode, by connecting the limiter amplifier 31, the resonator 23 by the crystal oscillator, the emitter / collector path of the transistor Tr3 and the BPF 24 in a loop, both the case of the oscillation frequency fixed mode and the case of the oscillation frequency variable mode It is designed to be compatible with.

The oscillator 20 will be described in more detail.
The output signal a2 of the PF24 is the NPN transistor Tr2.
Is supplied to the other input terminal of the adder 22 as an output signal b2 after being amplified and amplitude-limited by the limiter amplifier 21. Output signal c2 from the output terminal of the adder 22
Is guided to one input terminal a1 of the changeover switch 41. Further, the output signal a2 from the BPF 24 is amplified and amplitude-limited by the limiter amplifier 31 and is guided to the second input terminal a2 of the changeover switch 41 as the output signal b3.

The changeover switch 41 first connects the input terminal a1 to the common terminal c in the oscillation frequency variable mode, and secondly in the oscillation frequency fixed mode in the oscillation frequency fixed mode.
Is connected to the common terminal c.

The common terminal c of the changeover switch 41 is connected to the output terminal 25 for taking out the oscillation output and also to one end of the resonator 23. The other end of the resonator 23 is connected to the common terminal c of the changeover switch 42.

The changeover switch 42 first connects the common terminal c to the output terminal a1 in the oscillation frequency variable mode, and connects the common terminal c to the second terminal in the oscillation frequency fixed mode.
Of the output terminal a2.

The first output terminal a1 of the changeover switch 42
Is connected to the emitter of the NPN transistor Tr2.
The emitter of the NPN transistor Tr2 is a direct current source I
Connected to 2. The collector of the NPN transistor Tr2 is connected to the power supply line via the resistor R2 and is also connected to the input terminal of the BPF 24.

The second output terminal a2 of the changeover switch 42
Is connected to the emitter of the NPN transistor Tr2 via the resistor R3. The emitter of the NPN transistor Tr3 is connected to the direct current source I3. The DC voltage V from the input terminal 27 is applied to the base of the NPN transistor Tr3.
2 is supplied. The collector of the NPN transistor Tr3 is connected to the input terminal of the BPF 24.

The BPF 24 band-filters the signal supplied to the input terminal in the state where the center frequency is controlled by the control voltage V1 from the input terminal 26, and outputs the band-filtered signal as the output signal a2. .

The operation of such an embodiment will be described below.

In the oscillation frequency fixed mode, the changeover switch 41 connects the first input terminal a1 to the common terminal c, and the changeover switch 42 connects the common terminal c to the first output input terminal a1. As a result, the oscillator 20
The limiter amplifier 21, the adder 22, the resonator 23, the emitter / collector path of the transistor Tr2 and the BPF 24 are connected in a loop, and the output of the BPF 24 is directly supplied to the adder 12 to form an oscillation loop. Further, the center frequency of the BPF 24 is made constant by making the control voltage V1 supplied to the input terminal 26 constant. This results in the same circuit connection as in FIG.
Performs the same operation as.

In the variable oscillation frequency mode, the changeover switch 41 secondly connects the input terminal a2 to the common terminal c, and the changeover switch 42 connects the common terminal c to the second output terminal a2. As a result, the BPF 24, the limiter amplifier 31, the resonator 23, the resistor R3, and the transistor T
The emitter and collector paths of r3 are connected in a loop.
Further, by making the control voltage V1 supplied to the input terminal 26 variable, the center frequency of the BPF 24 can be changed, and the BPF 24 can be used as a phase shifter. The transistor Tr3 is substantially of a grounded-base type, and the resonance signal of the resonator 23 supplied via the resistor R3 is the emitter resistance Re2 of the equivalent emitter resistance and the resistance of the resonator 23 (R2 / R
e2) (R2 is the resistance value of the collector resistance R2) and amplified to output to the BPF 24. The output of the BPF 24 is fed back to the resonator 23 via the limiter amplifier 31. In this state, when the phase shift amount of the BPF 24 is controlled to A degree by varying the voltage V1 supplied to the BPF 24, the oscillator 20 produces a frequency that causes a phase delay of A degree in the resonance characteristics of the resonator 23 and the resistor R3. It oscillates at fX.

According to this embodiment, the same effect as that of the embodiment of FIG. 1 is obtained in the oscillation frequency fixed mode, and
It is possible to switch to the oscillation frequency fixed mode, and in the case of the oscillation frequency fixed mode, the adder 22 adds the output signal a2 of the limiter amplifier 21 and the output signal b2 of the BPF 24 and guides them to the output terminal 25. In the fixed frequency mode, the output signal b3 of the limiter amplifier 31
Is directly led to the output terminal 25, it is possible to suppress the level difference between the oscillation frequency variable mode and the oscillation frequency fixed mode with a simple circuit configuration.

In the embodiments shown in FIGS. 1 and 3, the BPF is provided as a filter for preventing oscillation of the triple harmonic, but a filter other than this, for example, a low pass filter may be provided. Further, in the embodiments of FIGS. 1 and 3, the output from the collector of the transistor is fed back to the limiter amplifier, but an output equivalent to the output from the collector of the transistor, that is, the output from the collector of the transistor is used. The amplified output or the like may be fed back.

[0039]

According to the present invention, in the oscillation frequency fixed mode of the oscillator, even when the resistance value of the resistor connected in a loop to the resonator is lowered, the amplitude of the signal input to the resonator is sufficiently secured. Therefore, it is possible to prevent variations in the oscillation frequency, and the frequency can be maintained with high accuracy even when a filter is provided. Since the loop gain is suppressed by providing this filter, oscillation of triple harmonics can be prevented. Further, when the terminal of the resonator is shared with the output terminal of the oscillator in order to save pins, the level difference between the oscillation frequency variable mode and the oscillation frequency fixed mode can be suppressed with a simple circuit configuration.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an oscillator according to the present invention.

FIG. 2 is a timing chart showing the operation of the oscillator shown in FIG.

FIG. 3 is a block diagram showing another embodiment of the oscillator according to the invention.

FIG. 4 is a block diagram showing a conventional oscillator.

[Explanation of symbols]

 10 Oscillator 11 Limiter Amplifier 12 Adder 13 Resonator Tr1 Transistor 14 BPF

Claims (2)

[Claims] 1. A limiter amplifier for amplifying an input signal and limiting an amplitude, an adder for adding the input signal input to the limiter amplifier and an output signal output by the limiter amplifier, and an output from the adder. A resonator that outputs a resonance signal from the other end by supplying a signal to one end, a resonance signal from this resonator is supplied to an input electrode, and the input signal input to the limiter amplifier is supplied to a common electrode. An oscillator comprising: a transistor for feeding back an output from the output electrode or an output equivalent thereto to a limiter amplifier. 2. A first and a second limiter amplifier for amplifying an input signal and limiting an amplitude, and adding the input signal input to the first limiter amplifier and an output signal output by the limiter amplifier. An adder, a resonator to which the output signal from this adder and the output signal from the second limiter amplifier are supplied to one end, and a resonance signal from the other end, and a resonance signal from this resonator to the emitter And a first transistor that supplies an input signal to be input to the first limiter amplifier to the base and returns an output from the collector or an output equivalent thereto to the first limiter amplifier; and a resonator from the resonator. A resonance signal is supplied to the emitter, a DC voltage is supplied to the base, and an output from the collector or an output equivalent thereto is returned to the second limiter amplifier. An output from the collector of the second transistor or an output equivalent to the output of the second transistor to the second limiter amplifier, and an output from the collector of the second transistor or an output equivalent thereto. Is provided in a path for supplying an output signal from the adder and an output signal from the second limiter amplifier to the resonator. In this case, first switching means for guiding the output signal from the adder to the resonator, and for the oscillation frequency variable mode, for guiding the output signal from the second limiter amplifier to the resonator, The resonance signal from the resonator is provided in a path for supplying the first and second transistors, and in the case of the oscillation frequency fixed mode, the resonance signal from the resonator is supplied to the first transistor. Led to register, the oscillator in the case of variable oscillation frequency mode, characterized by comprising a second switch means for guiding the transistors of the second resonance signal from the cavity.