JPH06216082A - Manufacture for semiconductor device - Google Patents

Abstract

PURPOSE:To provide a method for cleaning a viahole before Al for a second layer interconnection is formed after the viahole is etched by RIE. CONSTITUTION:After a viahole 10 is opened by RIE of fluorocarbon gas, it is subsequently etched only with O2 gas by RIE thereby to etch resist 8 and reaction product 5 to certain degree, and the resist and the product are changed in properties to a state to be easily removed in the step of peeling the resist to be thereafter conducted. Further, a property-changed layer 6 of a surface of first layer Al alloy 3 in the viahole which occurs by the RIE process is lightly etched with liquid of (phosphoric acid + nitric acid) thereby to effectively connect the alloy 3 to a second layer Al interconnection 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to RIE (Reactive Ion Etc).
Hing) to improve the removal of the resist and reaction products that occur during the actual practice.

[0002]

2. Description of the Related Art Conventionally, in a two-layer wiring process of a semiconductor device, RIE (Reactive Io) has been used as a method for forming a via hole connecting a first layer wiring and a second layer wiring.
n Etching) method is used. An example in which a via hole is formed by such a dry etching method is shown in FIG. In the figure, 1 is a silicon substrate, 2 is a silicon oxide film, 3 is a first layer Al alloy wiring, 4 is an interlayer insulating film, and reaction products 5 and exposed first side walls of the via holes 10 are exposed.
An altered layer 6 is formed on the surface of the second Al alloy layer 3. It is difficult to completely and stably remove the reaction product 5 and the altered layer 6 by mechanical means such as general resist stripping solution, ashing with oxygen plasma, or ultrasonic cleaning.

[0003]

Therefore, since the reaction product and the altered layer cannot be completely removed by the conventional method, the second layer Al wiring is connected through the first layer Al alloy wiring via hole. In this case, poor connection may occur, which may cause a decrease in yield.

An object of the present invention is to reliably remove a reaction product generated when a via hole is opened by a dry etching method such as RIE method and an altered layer on the surface of the first Al alloy layer to surely remove the first layer. It is an object of the present invention to provide a method of manufacturing a semiconductor device, which improves the connection between the wiring and the second layer wiring.

[0005]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention comprises forming a resist pattern on a substrate and performing RI in a predetermined gas at a predetermined atmospheric pressure.
The gist of the present invention is to etch the resist and the reaction product generated at the time of forming the resist pattern with E, form a predetermined oxide film on the surface of the etched portion, and remove the resist from the etched portion.

[0006]

By the RIE, the resist and the reaction product are transformed into a state in which they can be easily removed in the subsequent resist stripping step.
Further, the oxide film is formed and stabilized on the surface of the altered layer formed on the surface of the etched portion.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention shown in the drawings will be described below. FIG. 1 shows an embodiment of a method of manufacturing a semiconductor device according to the present invention, which has a two-layer structure of a plasma nitride film and a PSG film as an interlayer insulating film in a two-layer wiring process. In the figure, the same reference numerals as those in FIG. 2 represent the same or similar members, 7 is PSG, 8 is a resist pattern, and 9 is a second layer Al wiring.

First, after opening the PSG 7 in the via hole portion, a resist pattern 8 is formed as shown in FIG. 1A in order to open the via hole in the lower plasma nitride film 4.
Therefore, with a mixed gas of CF ₄ and O ₂ , for example, a power of 40
RIE was performed under the conditions of 0 W and a gas pressure of 10 Pa.
A via hole 10 is formed in the plasma nitride film 4 as shown in FIG. At this time, a reaction product 5 is generated on the side wall portion of the via hole, and the exposed Cd. F. The altered layer 6 containing O is formed.

After that, without breaking the vacuum of the RIE apparatus, for example, the gas is O ₂ gas only, and the power is 400 W,
RIE is performed at a gas pressure of 40 Pa to etch the resist 8 and the reaction product 5 to some extent as shown in FIG. 1 (c), and the resist and the reaction product can be easily removed in a subsequent resist stripping step. Let Further, an aluminum oxide film which can be removed by a later acid treatment and is stable in the air and less susceptible to contamination is formed on the surface of the altered layer 6 '.

Next, a resist stripping solution suitable for the resist used is used to strip the resist normally, whereby a via hole 11 having no reaction product 5 can be formed as shown in FIG. 1 (d).

Further, in order to remove the altered layer 6'having an aluminum oxide film on the surface, for example, H ₃ PO ₄ /
Lightly etch with a mixture of HNO ₃ / CH ₃ COOH. As an example, H ₃ PO ₄ / HNO ₃ / CH ₃ COOH
= 60/1/10, good A in about 30 seconds
l alloy surface can be obtained. As a result, the result is as shown in FIG.

Therefore, if the second Al layer 9 is formed as shown in FIG. 1F, the first Al alloy layer 3 and the second Al layer 9 are formed.
A good connection state can be obtained.

Thus, the addition of RIE with O ₂ gas changes the resist and the reaction product to a state in which they can be easily removed in the resist stripping process, and the surface of the exposed deteriorated Al alloy layer is stabilized in the atmosphere. Can be transformed into a smooth aluminum oxide film.

As a result, the reaction product after the via hole RIE can be reliably removed, and H ₃ PO ₄ / HNO ₃ /
The altered layer on the surface of the Al alloy layer in the via hole can be stably removed by the etching treatment with the CH ₃ COOH mixed solution.

[0015]

As described above, according to the present invention, the connection state of the first layer wiring and the second layer wiring in the via hole portion can be improved, and the yield and reliability can be improved. be able to.

[Brief description of drawings]

FIG. 1 is a schematic view showing each step of one embodiment of the method of the present invention.

FIG. 2 is a schematic diagram for explaining a conventional method.

[Explanation of symbols]

1 Silicon Substrate 2 Silicon Oxide Film 3 First Layer Al Alloy Wiring 4 Interlayer Insulation Film 5 Reaction Product by RIE 6 Degradation Layer by RIE 6 ′ O ₂ Degradation Layer with Aluminum Oxide Film Formed on RIE 7 PSG 8 Resist 9 Second layer Al wiring

Claims (1)

[Claims] 1. A resist pattern is formed on a substrate, the resist and a reaction product generated at the time of forming the resist pattern are etched by RIE in a predetermined gas at a predetermined atmospheric pressure, and a predetermined oxide film is formed on the surface of the etched portion. To form
Then, the method for manufacturing a semiconductor device is characterized in that the resist is removed from the etched portion.