JPH0621233A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To reduce a resistance value at a multilayer interconnection contact part by providing a metal film patterned on a substrate and having a through hole on an aluminum interconnection having a hole, and providing holes matched to each other and a metal film in the through hole. CONSTITUTION:A photoresist 23 is formed on a first aluminum interconnection 13 patterned on a semiconductor substrate 11, patterned, and etched to form a hole 25 in the interconnection 13. Then, a CVD oxide film 27, a coated glass film (SOG film) 29 are formed, and heat-treated to vitrify the film 29. Thereafter, the film 29 is etched back, the SOG film 29 is formed on a step sidewall, and a CVD oxide film 31 is formed. Photoresist 35 is formed on the entire interlayer insulating film (27, 29, 31) 33, patterned, and dry etched to form a through hole 17 in the film 33. After a metal film 19 is formed in the hole 17, second aluminum interconnection 21 is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a semiconductor device and a method of manufacturing the same, and relates to a contact between metal wiring when metal wiring is formed by stacking multiple layers such as multilayer wiring. The present invention relates to a semiconductor device capable of reducing resistance and improving adhesive strength, and a manufacturing method thereof.

[0002]

2. Description of the Related Art A conventional wiring technique for multilayer wiring using an alloy containing aluminum as a main component will be described with reference to FIG.
3A to 3C are cross-sectional views showing a conventional method of forming a multilayer wiring in the order of steps.

First, as shown in FIG. 3A, after an interlayer insulating film 15 is formed on the patterned first aluminum wiring 13 on the semiconductor substrate 11, CF ₄ is used by using the patterned photoresist as an etching mask. The through holes 17 are formed by a dry etching method using an etching gas containing (carbon tetrafluoride) as a main component.

Next, as shown in FIG. 3B, the inside of the through hole 17 is etched by a sputter etching method using high frequency (hereinafter referred to as an RF etching method), and the first aluminum wiring 13 is formed. To remove the oxide. After that, the metal film 19 is selectively grown in the through hole 17 by using a selective chemical vapor deposition method (hereinafter referred to as a selective CVD method). The metal film 19 is embedded in the through hole 17 by this selective CVD method.

Further, as shown in FIG. 3C, after the oxide on the surface of the metal film 19 is removed by RF etching, an alloy film containing aluminum as a main component is formed by sputtering. To do. Then, after patterning the photoresist, the second aluminum wiring 21 is formed by a dry etching method using a chlorine-based etching gas with the photoresist as an etching mask.

[0006]

The conventional semiconductor device is
As described with reference to FIG. 3, in order to realize the multilayer wiring structure, the metal film 19 is formed in the through hole 17 by selecting C.
It is embedded using the VD method.

Since the metal film 19 formed by the above-mentioned selective CVD method is formed by the reduction reaction on the surface of the first aluminum wiring 13, the physical strength of the metal film 19 is in contact with the first aluminum wiring 13. Determined by area.

However, in the conventional method, the metal film 19 is used.
Touches the first aluminum wiring 13 only in the bottom area of the through hole 17. Therefore, the first aluminum wiring 1
The adhesive strength with 3 is low, and the metal film 19 is easily peeled off.

For example, the metal film 19 formed by the selective CVD method.
After the formation, when a large stress is generated in the manufacturing process of the semiconductor device, the metal film 19 is peeled off from the first aluminum wiring 13 in the through hole 17, causing a disconnection.

The semiconductor device according to the conventional method is as follows.
When the metal film 19 is filled in the through holes 17 by using the selective CVD method, the adhesive strength with the first aluminum wiring 13 as the base is low. For this reason, not only the reliability of the semiconductor device is lowered, but also the aluminum wiring is broken in the through hole due to the stress.

An object of the present invention is to solve the above problems, to reduce the resistance value at a contact portion of a multilayer wiring, and to prevent disconnection in a through hole due to stress. And a manufacturing method thereof.

[0012]

In order to achieve the above object, the following structure and manufacturing method are adopted in the present invention.

The structure of the semiconductor device according to the present invention is the first
A hole provided in the aluminum wiring, an interlayer insulating film having a through hole that opens in a region of the hole, a metal film provided in the hole and the through hole, and a second aluminum wiring provided on the metal film. And

The method of manufacturing a semiconductor device according to the present invention is
A step of forming a first aluminum wiring on a semiconductor substrate, forming a photoresist on the first aluminum wiring, forming a hole in the first aluminum wiring by etching using the photoresist as a mask, and a step of removing the photoresist, A step of forming an interlayer insulating film on the first aluminum wiring, patterning a photoresist on the interlayer insulating film, and forming a photoresist having openings on the holes, and etching the interlayer insulating film using the photoresist as a mask to pass through. It has a step of forming a hole, a step of removing the photoresist, a step of selectively forming a metal film in the through hole, and a step of forming a second aluminum wiring on the metal film. .

A method of manufacturing a semiconductor device according to the present invention is
Forming a first aluminum wiring on the semiconductor substrate and forming an interlayer insulating film on the first aluminum wiring; forming a through hole by etching the interlayer insulating film with a photoresist as a mask; Forming a hole in the exposed first aluminum wiring, removing the photoresist, selectively forming a metal film in the through hole, and forming a second aluminum wiring on the metal film. And a process.

[0016]

The structure of the semiconductor device and the method of manufacturing the same according to the present invention are the same as the through-hole diameter of the lower-layer metal wiring in the through-hole for the purpose of contacting the lower-layer metal wiring and the upper-layer metal wiring, or A hole having a size smaller than that is formed.

As a result, the contact area between the metal film formed by the selective CVD method for filling the hole and the lower metal wiring is increased. As a result, the contact resistance can be reduced and the adhesive strength can be increased, and a highly reliable semiconductor device can be obtained.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. First, the structure of the semiconductor device of the present invention will be described with reference to FIG.

Hole 25 provided in the first aluminum wiring 13
An interlayer insulating film 15 having a through hole 17 which is open in the region of the hole 25, and the hole 25 and the through hole 17
It is characterized in that a metal film 19 provided inside and a second aluminum wiring 21 provided on the metal film 19 are provided.

Next, a manufacturing method for forming the above-described structure will be described. 1A to 1E are cross-sectional views showing a method of manufacturing a semiconductor device in the order of steps.

First, as shown in FIG. 1A, a photoresist 23 is formed on the entire surface of the patterned first aluminum wiring 13 on the semiconductor substrate 11 by a coating method. After that, the photoresist 23 is exposed and developed using a predetermined photoresist to pattern the photoresist.

Thereafter, the patterned photoresist 23 is used as a mask material in the first aluminum wiring 13 to form the holes 2 by using an etching gas containing chlorine gas as a main component.
5 is formed.

Hole 2 formed in the first aluminum wiring 13
The diameter of 5 may be the same as the diameter of the through hole formed on the hole 25, or may be larger or smaller than that. However, the size of the hole 25 is
Must not be wider than the width of the aluminum wiring 13 of.

The depth of the hole 25 is the first aluminum wiring 13
When the film thickness is less than or equal to, the area corresponding to the area of the side surface of the hole 25 is added to the area of the bottom surface of the hole 25, and the exposed area of the first aluminum wiring 13 increases.

Here, the depth of the hole 25 may be equal to the film thickness of the first aluminum wiring 13. In this case, if the thickness of the first aluminum wiring 13 is 1/4 or more of one side of the diameter of the through hole 17, the contact area of the metal film with the first aluminum wiring 13 increases.

Next, as shown in FIG. 1B, after forming a hole 25 in the first aluminum wiring 13, an oxide film (hereinafter referred to as a CVD oxide film) 27 formed by chemical vapor deposition method 27. To form.

After that, a coated glass film (hereinafter referred to as an SOG film) 29 is formed on the entire surface of the semiconductor substrate 11 by a coating method, and heat treatment is performed at a temperature of about 350 ° C. to 450 ° C. to form a glass of the SOG film 29. To convert.

After that, the SOG film 29 is etched back by a dry etching method using a CF ₄ etching gas to form the SOG film 29 on the side wall of the step.

Further, a CVD oxide film 31 is formed in order to improve the reliability of the insulating property of the interlayer film.

Hereinafter, the CVD oxide film 27 and the SOG film 2 will be described.
An insulating film having a three-layer structure of 9 and the CVD acid film 31 is referred to as an interlayer insulating film 33.

Next, a photoresist 35 is formed on the entire surface of the interlayer insulating film 33. The photoresist 35 is patterned in the same size as the hole 25 in accordance with the position where the hole 25 is formed.

Next, as shown in FIG. 1 (c), CF ₄
Through holes 17 are formed in the interlayer insulating film 33 by a dry etching method using a system etching gas. Then, the resist 35 is ashed and removed using oxygen plasma.

Next, as shown in FIG. 1D, RF etching is performed to remove the surface oxide film of the first aluminum wiring 13 exposed in the through hole 17 of the interlayer insulating film 33. .

After that, as the metal film 19, for example, a tungsten metal film is formed as the through hole 17 by the selective CVD method.
It is formed inside, and the through hole 17 and the hole 25 are filled with the metal film 19.

Further, as shown in FIG. 1E, the surface oxide film of the metal film 19 is removed by the RF etching method, and at the same time, the surface of the metal film 19 and the surface of the interlayer insulating film 33 are made substantially flush with each other.

After that, a second aluminum wiring film is formed by a sputtering method and patterned using a photoresist to form a second aluminum wiring 21.

Next, a second embodiment of the present invention, which is different from the manufacturing method described with reference to FIG. 1, will be described with reference to FIG. 2A to 2D are cross-sectional views showing a method of manufacturing a semiconductor device according to the second embodiment of the present invention in the order of steps.

First, as shown in FIG. 2A, on the patterned first aluminum wiring 13 on the semiconductor substrate 11,
A CVD oxide film 27 is formed by chemical vapor deposition.

After that, the SOG film 29 is formed by a coating method, and a heat treatment for vitrifying the SOG film 29 is performed at a temperature of about 350 ° C. to 450 ° C.

After that, the SOG film 29 is etched back by a dry etching method using a CF ₄ type etching gas to form the SOG film 29 on the side wall of the step.

Further, a CVD oxide film 31 is formed in order to improve the reliability of the insulating property of the interlayer insulating film.

This CVD oxide film 27, SOG film 29 and C
A photoresist 35 formed on an interlayer insulating film 33 having a three-layer structure composed of the VD oxide film 31 is patterned at a through hole position.

Next, as shown in FIG. 2B, CF ₄
Through holes 17 are formed in the interlayer insulating film 33 by a dry etching method using a system etching gas.

Then, using chlorine-based gas,
A hole 25 is formed in the first aluminum wiring 13. The conditions for forming the holes 25 are the same as the method described with reference to FIG.

After that, the resist 35 used as the etching mask material is ashed and removed using oxygen plasma.

Next, as shown in FIG. 2C, in order to remove the surface oxide film of the first aluminum wiring 13 exposed in the through hole 17 and the hole 25 formed in the interlayer insulating film 33. , RF etching is performed.

After that, as the metal film 19, for example, a tungsten metal film is formed in the hole 25 and the through hole 17 by the selective CVD method. As a result, hall 25
And the through hole 17 are filled with the metal film 19.

Next, as shown in FIG. 2D, the metal film 1
The surface oxide film of No. 9 is removed by the RF etching method, and at the same time, the surface of the metal film 19 and the surface of the interlayer insulating film 33 are made to have substantially the same height.

After that, a second aluminum wiring film is formed by the sputtering method, and patterning is performed using photoresist to form the second aluminum wiring 21.

[0050]

As is apparent from the above description, the metal film formed by the selective CVD method according to the present invention can increase the contact area with the first aluminum wiring.

As a result, the adhesive strength between the first aluminum wiring and the metal film is improved, and the contact resistance value is reduced. Moreover, it is possible to prevent disconnection in the through hole due to stress. Therefore, a highly reliable semiconductor device can be obtained.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a structure of a semiconductor device and a manufacturing method according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a method of manufacturing a semiconductor device according to another embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

 11 semiconductor substrate 13 first aluminum wiring 17 through hole 19 metal film 21 second aluminum wiring 25 hole 33 interlayer insulating film

Claims (3)

[Claims] 1. A hole provided in a first aluminum wiring, an interlayer insulating film having a through hole in which a region of the hole is opened, a metal film provided in the hole and the through hole, and a second film provided on the metal film. A semiconductor device comprising: 2. A step of forming a first aluminum wiring on a semiconductor substrate, forming a photoresist on the first aluminum wiring, and forming a hole in the first aluminum wiring by etching using the photoresist as a mask; Removing step and forming an interlayer insulating film on the first aluminum wiring,
Patterning a photoresist on the interlayer insulating film, a step of forming a photoresist having an opening on the hole, a step of etching the interlayer insulating film using the photoresist as a mask to form a through hole, a step of removing the photoresist, A method of manufacturing a semiconductor device, comprising: a step of selectively forming a metal film in a through hole; and a step of forming a second aluminum wiring on the metal film. 3. A step of forming a first aluminum wiring on a semiconductor substrate and forming an interlayer insulating film on the first aluminum wiring; and a through hole is formed on the interlayer insulating film by etching using a photoresist as a mask. Further, a step of forming a hole in the first aluminum wiring exposed in the through hole, a step of removing the photoresist, a step of selectively forming a metal film in the through hole, and a second step on the metal film. And a step of forming aluminum wiring.