JPH06204250A - Manufacture of mis transistor - Google Patents

Abstract

PURPOSE:To efficiently perform doping and laser activation by a method wherein an insulating film, which is used as a gate insulating film, is etched using a gate electrode part as a mask to make thin to a degree that a proper energy is transmitted and after impurities are introduced in a semiconductor region by a high-speed ion beam irradiation through the insulating film, a laser beam is applied. CONSTITUTION:A gate electrode is anodized and after an anodized material film 106 is formed on the gate electrode and the upper surface and side surfaces of a wiring, a gate insulating film is subjected to dry etching. The gate insulating film other than the gate insulating film existing under the lower part of the gate electrode part as a result is etched. At a point of time when the gate insulating film 104 is formed in a thickness of 500Angstrom , the etching is interrupted and a thin-insulating film 107 is formed. A phosphorus/hydrogen plasma flow is applied to implant phosphorus in an insular semiconductor region 103 in a self alignment manner and impurity regions 108 are formed. A KrF excimer laser beam is applied to make the crystallinity, which is deteriorated by the previous impurity implantation process, of the semiconductor regions 108 recover. Accordingly, a reduction in the efficiency of doping is not generated and &f} activation of that follows can be attained.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a MIS transistor. In particular, the present invention, after introducing impurities into the semiconductor region by irradiating with fast ions,
The present invention relates to a method of improving crystallinity by irradiating a semiconductor with a laser or strong light equivalent thereto, such as laser annealing or lamp annealing.

[0002]

2. Description of the Related Art A structure in which a thin insulating film (I) and a control (metal) electrode (M) are provided on a semiconductor (S) is called a MIS structure, and such structure controls a current flowing through the semiconductor. The transistor is called a MIS transistor. When a silicon oxide film is used as the insulating film, a MOS
It is called a transistor.

Conventionally, such a MIS transistor has been
The activation step after the introduction of impurities (that is, the step of recovering the crystal defects generated during the introduction of impurities) was performed by thermal annealing, but for this purpose, a high temperature of 1000 ° C. or higher was required. In recent years, due to the demand for lowering the temperature of the process, alternatives to such thermal annealing at high temperatures have been investigated. Among them, a predominant method is a method of activating by irradiating strong light such as laser, and is called laser annealing or lamp annealing depending on the light source used.

An example of manufacturing a conventional MIS transistor using laser annealing will be described with reference to FIGS. Board 30
A base insulating film 302 is deposited on the first substrate 1, a substantially intrinsic crystalline semiconductor film is further deposited thereon, and this is patterned to form an island-shaped semiconductor region 303. Then, an insulating film 304 functioning as a gate insulating film is deposited, and further,
The gate electrode 305 is formed. (Fig. 3 (A))

If necessary, the gate electrode is anodized,
Anodic oxide 306 on top and side of gate electrode / wiring
To form. The method of forming such an anodic oxide and its merits are described in detail in Japanese Patent Application Nos. 4-30220, 4-34194, 4-38637 and the like. Needless to say, it is not necessary to use such an anodic oxidation process if there is no need. (FIG. 3B) After that, impurity doping is performed by an ion implantation method or an ion (plasma) doping method. That is, the substrate is placed in a high-speed ion current, and the gate electrode portion, that is, the gate electrode and the anodic oxide around the gate electrode portion is used as a mask to inject impurities into the island-shaped semiconductor region 303 in a self-aligned manner, and the impurity regions (source, drain) Becomes)
307 is formed. (Fig. 3 (C))

Further, by irradiating strong light such as laser light,
The crystallinity of the semiconductor region whose crystallinity is deteriorated by the above impurity implantation step is recovered. (FIG. 3D) After that, an interlayer insulator 308 is deposited, a contact hole is provided in this, and a source and drain electrode 309 is formed and completed. (Fig. 3 (E))

[0007]

According to the above method, if the withstand voltage of the gate insulating film of the transistor is improved,
It was preferable that the gate insulating film had a large thickness. However, this requires that the acceleration voltage of the impurity ions be increased at the same time and the doping processing time be lengthened. Particularly in the case of forming a shallow impurity region, a monochromatic ion beam with extremely uniform energy was required, but the dose amount per unit time was remarkably reduced.

On the other hand, when the gate insulating film is removed to expose the semiconductor surface in order to efficiently perform doping, the surface becomes rough when activated by irradiation with strong light such as laser light, and contact failure occurs. Was the cause of The present invention has been made in view of such problems, and provides a method for efficiently performing doping and laser activation.

[0009]

According to the present invention, an insulating film formed as a gate insulating film is etched in a self-aligned manner by using a gate electrode portion as a mask to make it thin enough to allow ions of appropriate energy to pass therethrough. Through this, impurities are introduced into the semiconductor region by fast ion irradiation. After that, annealing is achieved by laser irradiation or strong light equivalent thereto. Prior to laser irradiation, a transparent insulating film may be formed on the semiconductor surface. By adopting such a method, the reduction of the doping efficiency as described above does not occur, and the doping and the subsequent activation can be achieved extremely efficiently.

[0010]

EXAMPLE 1 Example 1 is shown in FIG. A 1000 Å thick silicon oxide film is deposited as a base insulating film 102 on a non-alkali glass substrate 101 such as Corning 7059, and a substantially intrinsic amorphous silicon semiconductor film (thickness 1500 Å) is deposited at 600 ° C. 1
It was crystallized by annealing for 2 hours.
This was patterned to form the island-shaped semiconductor region 103. Then, a silicon oxide film 104 having a thickness of 1200 Å was deposited as a gate insulating film, and further, a gate electrode 105 was formed using aluminum having a thickness of 6000 Å. (Fig. 1 (A))

After that, the gate electrode was anodized to form anodic oxide 106 on the upper and side surfaces of the gate electrode / wiring. For the method of forming such an anodic oxide and its merits, see JP-A-4-30220 and JP-A-4-30220.
34194, 4-38637 and the like. Needless to say, it is not necessary to use such an anodic oxidation process if there is no need. (Fig. 1
(B))

After that, the gate insulating film was etched by the dry etching method. Carbon tetrafluoride or the like was used as the etching gas. At this time, the anodic oxide (alumina) was not etched, and as a result, the gate insulating film was etched except for those existing under the gate electrode portion (gate electrode 105 and anodic oxide 106). When the gate insulating film 104 reached 500 Å, the etching was stopped to form a thin insulating film 107. Then, by irradiating a phosphorus / hydrogen plasma flow accelerated to 15 to 50 keV, for example, 30 keV, phosphorus is implanted in the island-shaped semiconductor region 103 in a self-aligned manner to form an impurity region (which becomes a source and a drain) 108. . (Fig. 1
(C))

Then, KrF excimer laser light (wavelength 248 nm) was irradiated to restore the crystallinity of the semiconductor region 108 whose crystallinity was deteriorated by the above-mentioned impurity implantation step. The energy density at this time is 150 to 300 m.
J / cm ² , for example, 200 mJ / cm ² . (FIG. 1D) After that, an interlayer insulator 109 was deposited, a contact hole was provided in this, and a source and drain electrode 110 was formed and completed. Through the above steps, an N-channel transistor was formed (FIG. 1E).

Similarly, a P-channel type transistor can be formed, and if a known CMOS technique is used, it is possible to mount the N-channel type transistor and the P-channel type transistor on the same substrate. For example, the typical mobility of a MOS transistor manufactured by the method shown in this embodiment is 120 cm ² / V for N-channel type.
s, P-channel type was 80 cm ² / Vs. Also,
In a CMOS shift register (five stages) manufactured by forming an N-channel transistor and a P-channel transistor on the same substrate, 15 MHz synchronization was confirmed at a drain voltage of 20V.

Second Embodiment FIG. 2 shows this embodiment.
A 1000 Å thick silicon oxide film is deposited as a base insulating film 202 on a non-alkali glass substrate 201, and a substantially intrinsic amorphous silicon semiconductor film (thickness 5
00Å) was deposited and crystallized by a known laser annealing method. This was patterned to form an island-shaped semiconductor region 203. Then, a silicon oxide film 204 having a thickness of 1200 Å is deposited as a gate insulating film, and further,
The gate electrode 20 is made of aluminum with a thickness of 6000Å.
5 was formed. After that, the gate electrode was anodized to form anodic oxide 206 on the upper and side surfaces of the gate electrode / wiring. (Fig. 2 (A))

After that, the gate insulating film was etched by the dry etching method. Carbon tetrafluoride or the like was used as the etching gas. At this time, the anodic oxide (alumina) was not etched, and as a result, the gate insulating film was etched except for those existing under the gate electrode portion (gate electrode 205 and anodic oxide 206). The etching was stopped when the gate insulating film 204 reached 500 Å. As a result, a thin insulating film 207 was formed. And 15 to 50 keV, for example, 30 keV
By irradiating an accelerated phosphorus / hydrogen plasma flow on the substrate, phosphorus is implanted into the island-shaped semiconductor region 203 in a self-aligned manner to form an impurity region (which becomes a source and a drain) 208. (Fig. 2 (B))

The thickness of the interlayer insulator 209 is 5
A 000 Å silicon oxide film was deposited and irradiated with KrF excimer laser light (wavelength: 248 nm) to recover the crystallinity of the semiconductor region 107 whose crystallinity was deteriorated by the previous impurity implantation step. The energy density at this time is 150
˜300 mJ / cm ² , for example, 200 mJ / cm ² . In the state where only the thin insulating film covers the semiconductor surface at the time of laser irradiation as in Example 1, the surface is roughened due to the impact during crystallization of the semiconductor, which causes a problem during contact formation. This was not the case when a thick insulating film was formed on the surface. (Fig. 2C
D))

After that, contact holes were formed in the interlayer insulator 209 to form the source and drain electrodes 210, which was completed. Through the above steps, an N-channel transistor was formed (FIG. 2D)

In this embodiment, a thick insulating film which also functions as an interlayer insulating film is deposited on the thin insulating film 207, but the thin insulating film is completely removed before the thick insulating film is removed. It may be deposited. When the impurity ions are irradiated, many impurities are also taken into the insulating film, which causes the laser light to be absorbed. Therefore, the efficiency of the subsequent laser annealing can be improved by completely removing the insulating film containing such impurities.

[0020]

According to the present invention, a method for efficiently performing ion implantation or ion doping and laser annealing or lamp annealing is provided. It will be apparent that the present invention contributes to the lowering of the process temperature, and that the industrial benefit thereof is great. In the embodiments, the present invention has been described with respect to a MIS transistor having a thin film active layer, that is, a so-called thin film transistor. This is because a low temperature process is indispensable especially in a thin film transistor that is easily subject to substrate restrictions. However, it will be apparent that the same effect can be obtained by applying the present invention to a MIS transistor formed on a single crystal semiconductor substrate.

In the present invention, the type of semiconductor forming the semiconductor region may be silicon, germanium, silicon carbide, silicon-germanium alloy, gallium arsenide, or the like. Further, as a material forming the gate electrode, doped silicon, molybdenum, tungsten, titanium, aluminum, and alloys, silicides, nitrides thereof, or the like are used. In the present invention, when a laser is used, ArF laser (wavelength 193 nm), KrF laser (248 nm), XeCl laser (308 nm),
Excimer laser such as XeF laser (350 nm), Nd: YAG laser (wavelength 1064 nm), its second harmonic (532 nm), third harmonic (354n)
m), the fourth harmonic (266 nm), etc. are suitable, but it goes without saying that the use of other lasers and light sources is also included in the scope of the present invention.

[Brief description of drawings]

FIG. 1 shows a manufacturing process of an example.

FIG. 2 shows a manufacturing process of an example.

FIG. 3 shows a conventional manufacturing process.

[Explanation of symbols]

 101, 201, 301 ... Substrate 102, 202, 302 ... Base insulating film 103, 203, 303 ... Island semiconductor region 104, 204, 304 ... Gate insulating film 105, 205, 305 ... Gate electrodes 106, 206, 306 ... Anodic oxides 107, 207 ... Thin insulating films 108, 208, 307 ... Impurity regions 109, 209, 308 ... Interlayer insulators 110, 210, 309. ..Source and drain electrodes

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical indication H01L 21/265 9056-4M H01L 29/78 311 Y

Claims (2)

[Claims] 1. A step of forming an insulating film to be a gate insulating film on a semiconductor region, a step of forming a gate electrode portion on the insulating film, and a step of using the gate electrode portion as a mask.
Etching the insulating film to thin the insulating film; introducing an impurity element into the semiconductor region in a self-aligned manner using the gate electrode as a mask; And a step of irradiating the same strong light as that to improve the crystallinity of the semiconductor region. 2. A first gate insulating film formed on a semiconductor region.
Forming an insulating coating on the first insulating coating, forming a gate electrode portion on the first insulating coating, and etching the first insulating coating using the gate electrode portion as a mask to remove the first insulating coating. A step of thinning the film, a step of introducing an impurity element into the semiconductor region in a self-aligned manner using the gate electrode as a mask, a step of forming a transparent second insulating film, and a step of passing through the second insulating film. A step of irradiating the semiconductor region with a laser or strong light equivalent thereto to improve the crystallinity of the semiconductor region.