JPH06197163A - Signal reception circuit diagnostic system - Google Patents

Abstract

PURPOSE:To enable diagnosis for all lines and to shorten a diagnostic time by transmitting identical signals to all the lines of a signal reception circuit, reading a reception result for each line of a DSP from a memory storing inspected results and performing the diagnosis. CONSTITUTION:Receivable signals are transmitted from a signal transmission circuit 1 first at the time of the diagnosis and connected to all the lines by a network device 2. When all digital signal processors(DSP) 4-5 are normally operated, the reception results are all '0' and when the reception results for all the lines are ORed in a detected result comparator circuit 8 and stored through a changeover circuit 6 in the corresponding address of the memory 7, the diagnosis for all the lines can be performed by reading once by a reception result read circuit 9. Also, when even one line performs an abnormal operation, since the line outputs '1' without the reception result and the OR is '1', abnormality is confirmed. Further, when inreceivable signals are transmitted from the signal transmission circuit 1 to all the lines and the detection results for all the lines are ANDed, the diagnosis can be performed similarly.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal device of a digital exchange, and more particularly to a signal receiving circuit diagnosing method suitable for shortening a diagnostic time of a signal receiving circuit by a digital signal processor.

[0002]

2. Description of the Related Art A conventional signal receiving circuit diagnostic system is a PB signal receiving circuit as described in page 24 to page 33 of application of digital switching hardware issued by Nippon Telegraph and Telephone Corporation.
The PB signal transmitting circuit is used, and the PB signal is transmitted from the PB signal transmitting circuit to the PB signal receiving circuit. FIG. 5 shows a schematic diagram of a conventional diagnosis method. In the figure, a receivable signal or a non-receivable signal is transmitted from the signal transmission circuit 10 to the signal reception circuit 12 for performing diagnosis via the network device 11. In the signal receiving circuit 12, DSP (0)
The signal is received by the 13-DSP (M-1) 14.
The DSP (0) 13 to DSP (M-1) 14 are digital signal processors, each of which processes N lines, and by using M, signals of M × N lines can be received. The reception result of M × N lines is temporarily stored in the memory 16 at an address corresponding to the line by the switching circuit 15. The above operation is repeated for each frame. The reception result is read by the reception result reading circuit 17 to read the address content of the memory corresponding to the line, and is compared with the expected value. If they match, the diagnosis result is normal, and if they are different, the diagnosis result is abnormal. Become. The above process is repeated for each line, and all the lines are diagnosed by repeating M × N times.

[0003]

However, the above-mentioned conventional technique has a problem that the diagnostic efficiency cannot be improved because the operation of transmitting a signal for each line and reading the reception result is repeated for all the lines. Normally, the signal length of the received signal is several tens of ms, and the time for outputting the signal with the reception result after the digital signal processor determines that there is a signal is also several tens of ms.
Often Since it takes several ms to several tens of ms to read one line from the reception result reading circuit, the number of lines that can be read in several tens of ms for outputting a signal with reception result is limited. For this reason, it is difficult to send a signal to all the lines at once, and a method of sending the signal and reading the detection result is repeated for each line.

An object of the present invention is to solve such inefficiency of diagnosis, and it is to diagnose all lines without transmitting a signal for each line and reading a detection result.

[0005]

A signal receiving circuit diagnostic method according to the present invention stores a comparison result of detection results of a digital signal processor in a memory or a processing result for each line stored in the memory in a comparison circuit. By making a comparison, it is possible to collectively transmit signals to all lines, eliminating the need for signal transmission / reading of detection results for each line.

[0006]

Since the comparison result of the detection results of the digital signal processor is stored in the memory, only the comparison result has to be read from the reception result reading circuit. Therefore, it is not necessary to read out all the lines, and it becomes possible to transmit signals to all the lines at once, and the diagnosis time can be shortened.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG.

This embodiment shows a circuit for receiving a 400 Hz signal for 96 lines, and DSP (0) 4 to DSP (11) 5 are shown.
Each has a receiving function of 8 lines, and whether to receive or not 1
Bit information is output to the outside. The signal receiving circuit 3 has 12 signal lines per frame as shown in FIG.
This is a circuit for processing and detecting 96 lines of CH0 to CH95 for a signal on the receiving highway 18 having a frame structure of 8 (CH0 to CH127).

FIG. 2 shows that the number of signal lines per frame in the circuit shown in FIG. 1 is 128 (CH0 to CH12).
7) The receiving highway 18 having the frame structure and DSP (0) 4 to DSP (1) for processing and detecting the signals of 96 lines of the signals CH0 to CH95 on the receiving highway 18
1) A diagram showing a relationship with 5. In the figure, during normal operation other than diagnosis, the signal transmitted from the signal transmission circuit 1 is sent to the DSP (0) 4 via the network device 2.
.. are input to the DSP (M-1) 5 and received by the digital signal processor corresponding to the line. The reception result of each digital signal processor is passed through the switching circuit 6,
It is temporarily stored in the address of the memory 7 corresponding to the line number. This operation is repeated for each frame, and the content of the memory 7 is updated for each frame. As the signal detection result, the detection result of each line can be read from the reception result reading circuit 9 by designating the address of the memory 7.

On the other hand, the operation at the time of diagnosis is as follows.

First, a receivable signal is sent from the signal transmission circuit 1 and the network device 2 connects to all the lines of CH0 to CH95. Since this digital signal processor outputs "0" when there is a reception result, all reception results are "0" if all the digital signal processors are operating normally. If the detection result comparison circuit 8 logically sums all lines and stores it in the corresponding address of the memory 7 through the switching circuit 6, the reception result reading circuit 9 reads once to diagnose all lines. It can be performed.

Further, even if one line is abnormally operated, it can be confirmed that the line is abnormal because the line outputs "1" without a reception result and the logical sum becomes "1".

Further, if the unreceivable signal is sent from the signal transmission circuit 1 to all the lines of CH0 to CH95, and the logical product of the detection results of all the lines is taken, the same diagnosis can be performed.

Further, it is not always necessary to provide the comparison circuit 8 in the front stage of the memory 7, and the diagnosis can be similarly performed by providing the comparison circuit 8 in the rear stage of the memory 7 as shown in FIG.

Further, in the present embodiment, since all the lines are compared at once, the failure point cannot be specified, but the failure point can be specified by combining and comparing the specified lines.

[0016]

According to the present invention, it is possible to perform diagnosis for all lines in a signal receiving circuit without repeating signal transmission / reading of signal reception results for each line, which is effective in shortening the signal receiving circuit diagnosis time. There is.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a waveform diagram showing a relationship between a receiving highway and a digital signal processor according to an embodiment of the present invention.

FIG. 3 is a diagram showing an example in which a comparison circuit is provided in a subsequent stage of a memory.

[FIG. 4] One N-line processing digital signal processor
Block diagram showing an embodiment of the present invention in the case of individual pieces

FIG. 5 is a block diagram showing a conventional diagnosis method.

[Explanation of symbols]

 1 ... Signal transmission circuit, 2 ... Network device 3 ... Signal reception circuit, 4 ... Digital signal processor (0), 5 ... Digital signal processor (11), 6 ... Switching circuit, 7 ... Memory, 8 ... Reception result comparison circuit, 9 ... Reception result reading circuit, 10 ... Signal transmission circuit, 11 ... Network device 12 ... Signal reception circuit, 13 ... Digital signal processor (0), 14 ... Digital signal Processor (M-1), 15 ... Switching circuit, 16 ... Memory, 17 ... Reception result reading circuit, 18 ... Reception highway.

Claims (4)

[Claims] 1. In a signal device of a digital exchange, a signal transmission circuit for transmitting a signal, a digital signal processor for receiving the signal, a memory for temporarily storing the reception result, and a content for reading the memory. A device with a reception result reading circuit that stores the reception results of the digital signal processor in memory as it is during normal operation, and sends the same signal from the signal transmission circuit to all lines of the signal reception circuit at one time during diagnostics. A signal receiving circuit diagnosis method characterized in that a verification result of a reception result for each line of a processor is stored in a memory, and a diagnosis is performed by reading the verification result by a reception result reading circuit. 2. The signal device according to claim 1, further comprising a plurality of digital signal processors, and means for storing a verification result of reception results of a plurality of different digital signal processors in a memory. A signal receiving circuit diagnostic method characterized in that diagnosis is performed by reading the verification result. 3. The signal device according to claim 1, wherein during normal operation, the contents stored in the memory are read as they are from the reception result reading circuit, and at the time of diagnosis, diagnosis is performed by reading the verification result of the contents stored in the memory. Characteristic signal receiving circuit diagnosis method. 4. The signal device according to claim 1, further comprising means for storing a verification result in a memory only for a designated line, and performing diagnosis by reading the verification result from a reception result reading circuit. Signal receiving circuit diagnostic method.