JPH06189280A - Picture encoder and picture recorder - Google Patents

Abstract

PURPOSE:To obtain a picture transmission system strong in a transmission error, and besides, to attain interpolation by an adjacent picture element in the same picture so as to reduce the deterioration of picture quality even if there is the uncorrectable error by providing with a blocking means, a com pressed encoding means, and an output means. CONSTITUTION:All the picture elements of the frame are assigned to four block groups. Namely, all the picture elements of an even field picture are assigned every other one picture element to a first encoding block group (picture element of O mark) and a second encoding block group (picture element of mark), and all the picture elements of an odd field picture are assigned every other one picture element to a third encoding block group (picture element of inverted triangle mark) and a fourth encoding block group (picture element of square mark). Then, the lump of adjacent 4 picture element X 4 picture elements in the same encoding block group is made to one encoding block. Thus, four encoding blocks overlap each other in 8 picture elements X 8 picture elements. In this case, possibility that the uncorrectable transmission errors are caused at the same time in the data of plural encoding block groups at the time of the transmission of compressed data is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image coding apparatus and an image recording apparatus, and more specifically, it divides an image into blocks and records the image coding apparatus and coding information for each block. The present invention relates to an image recording device for recording on a medium.

[0002]

2. Description of the Related Art One of the coding methods for highly efficient coding of image signals is a block coding method in which an image is divided into a plurality of blocks and each block is coded. An adaptive discrete cosine transform (ADCT) method is a typical method for encoding the image signal in the block. For example, Takahiro Saito et al., "Still Image Coding Scheme," Television Society Journal, Vol.
44, No. 2 (1990) and Hiroshi Ochi et al., "International Standard Trends in Still Image Coding", Proceeding 14 of 1988 National Conference of Image Electronics Engineers of Japan.

Although images can be transmitted at a low transmission rate by high-efficiency encoding, the influence of transmission errors becomes great and it is necessary to take measures against code errors such as error detection and correction codes. In particular, when an electromagnetic conversion system such as magnetic recording or a satellite communication line is used, deterioration of transmission quality is expected, and therefore measures against code errors are indispensable.

FIG. 2 shows a schematic block diagram of an image transmission system by high efficiency coding. In the input terminal 10,
The image signal to be transmitted is input. The A / D converter 12 digitizes the analog image signal from the input terminal 10,
The blocking circuit 14 divides the image data from the A / D converter 12 into coded blocks of 8 × 8 pixels or 4 × 4 pixels, and outputs the coded blocks in order. FIG. 3 is an example in which an image of one frame is divided into blocks of 4 × 4 pixels.

The high efficiency encoding circuit 16 is a block circuit 1
Image data in units of coded blocks from 4 is encoded with high efficiency in units of coded blocks. As a result, the amount of information is compressed. The error correction coding circuit 18 performs error correction coding on the image data compressed by the high efficiency coding circuit 16. That is, the error detection / correction parity is calculated and added to the compressed image data. The compressed image data that has been error correction coded by the error correction coding circuit 18 is output to the transmission line 20.

The transmission path 20 includes a recording / reproducing system such as an optical fiber, a communication satellite and a wired / wireless communication medium such as a microwave, a magnetic tape, a magnetic disk, an optical disk, a semiconductor memory (for example, a digital video tape Recorder (VTR) and digital audio tape
A recorder (DAT) or the like is considered. The transmission rate is from several tens of kilobits / second to several tens of megabits / second, although it depends on the information amount of the original image, the compression rate, and the transmission time.

FIG. 4 shows a schematic block diagram of an electromagnetic conversion system as the transmission line 20. The modulation circuit 40 performs low-pass suppression modulation of the input signal (output of the error correction coding circuit 18) so as to match the differential characteristics of the magnetic recording system, and its output is equalized by the recording equalization circuit 42. It is amplified to a predetermined level by the recording amplifier 44 and applied to the recording magnetic head 46. The recording magnetic head 46 records the output of the amplifier 44 on the magnetic tape 48.

The signal recorded on the magnetic tape 48 is reproduced by the reproducing magnetic head 50, and its output is applied to the detection demodulation circuit 56 via the reproduction amplifier 52 and the reproduction equalization circuit 54. The detection demodulation circuit 56 demodulates the output of the reproduction equalization circuit 54 and outputs digital data. The output of the detection / demodulation circuit 56 becomes the output of the transmission line 20.

On the receiving side, the data propagated through the transmission line 20 is temporarily stored in the memory 22, and the error correction circuit 24 corrects the transmission error by the error correction parity at the time of transmission. The error-corrected data stored in the memory 22 is read out and applied to the high-efficiency decoding circuit 26. The high efficiency decoding circuit 26 expands the compressed image data.

Interpolation circuit 28 is applied to a coded block including a transmission error that cannot be corrected by error correction circuit 24.
However, the data is interpolated by substituting with the data of the coded block at the same position in the previous frame (or field). The D / A converter 30 converts the output of the interpolation circuit 28 into an analog signal and outputs it to the output terminal 32.

[0011]

In the magnetic recording / reproducing system as described above, since the transmission error generated in the transmission line 20 often exceeds the correction capability of the error correction code by the error correction coding circuit 18, the interpolation circuit 28 is used. The interpolating ability of 1 greatly affects the quality of the reproduced image.

However, in the conventional example, the processing unit of the interpolation circuit 28 is the same as that of the coding block. This is because, usually, interpolation is performed by exchanging a coding block having an uncorrectable coding error for each coding block at the same screen position such as the previous screen. Therefore, since the area is relatively large compared to the screen, there is a drawback that the interpolation becomes conspicuous.

It is an object of the present invention to provide an image coding device and an image recording device which enable interpolation in pixel units.

[0014]

An image coding apparatus according to the present invention has a plurality of coding block groups so that all pixels in a screen belong to different coding block groups, at least some of which are adjacent pixels. To each of the coding block groups, dividing the pixels belonging to each coding block group into coding blocks, compression coding means for compressing and coding the output of the coding means in units of the coding blocks, and each coding block. And output means for outputting the compressed data of the group to different transmission channels.

The image recording apparatus according to the present invention allocates all the pixels in the screen to a plurality of coded block groups so that at least some of the adjacent pixels belong to different coded block groups, and each coded block is allocated. Blocking means for dividing pixels belonging to a group into coding blocks, compression coding means for compressing and coding the output of the blocking means in units of the coding blocks, and compressed data of each coding block group on a recording medium. Recording means for recording on another track.

[0016]

By the above means, when transmitting compressed data,
It is less likely that uncorrectable transmission errors will occur simultaneously in the data of a plurality of coded block groups. As a result, on the receiving side, even if an uncorrectable transmission error occurs in a certain coding block, it can be interpolated by the adjacent pixel data from another coding block group of the same screen. Therefore, compared to substituting the entire erroneous coded block with a coded block on another screen, the image quality is less deteriorated.

[0017]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a schematic block diagram of a recording system according to an embodiment of the present invention. It should be noted that this embodiment relates to a recording / reproducing apparatus for compression-encoding a high-definition signal and digitally recording it on a magnetic tape.

FIG. 1 will be described. Input terminals 100, 10
An analog luminance signal Y, an analog color difference signal Pb, and an analog color difference signal Pr are input to 2 and 104, respectively.
The band of the analog luminance signal input to the input terminal 100 is about 20 MHz, and the band of the analog color difference signals Pb and Pr input to the input terminals 102 and 104 is about 10 MHz.

The analog luminance signal input to the input terminal 100 is converted into a digital signal by the A / D converter 106, and the analog color difference signals Pb and Pr input to the input terminals 102 and 104 are respectively converted to the A / D converter 108 and. 110
Are converted into digital signals by. Color difference signals Pb, P
The sampling rate of r is 1/2 that of the luminance signal Y
Is. The color difference line serialization circuit 112 is the A / D converter 10
The output of 8,110 is line-sequential.

The blocking circuit 114 includes the A / D converter 1
The digital luminance signal from 06 and the line-sequential color-difference signal from the color-difference line-sequencing circuit 112 are divided into coding blocks. FIG. 5 shows an example of a coding block configuration in the blocking circuit 114. In this embodiment, all pixels of one frame are assigned to four block groups (or planes). That is, all the pixels of the even field screen are allocated every other pixel to the first coded block group or plane (pixels marked with ◯) and the second coded block group or plane (pixels marked with Δ), and the odd field screen is displayed. Every 3rd pixel every 3rd
4th encoding block group or plane (pixels marked with ▽)
Allocate to the coding block group or plane (pixels with □). Then, adjacent 4 pixels × 4 pixels of the same coding block group are set as one coding block.

By doing this, four coded blocks overlap each other within 8 pixels × 8 pixels. In the conventional example, the coded blocks are arranged so as not to overlap each other.

The color difference signals Pb and Pr are sampled at half the sampling frequency of the luminance signal Y, and
Since it is line-sequential, the size ratio of the coding blocks of the color difference signal and the luminance signal is 4: 1 as shown in FIG.

The image data blocked by the blocking circuit 114 is applied to the high-efficiency coding circuit 116, and high-efficiency coding is performed for each coding block. As a result, the amount of information (bandwidth) is compressed to about 1/10. The error correction coding circuit 118 adds error correction parity to the output of the high efficiency coding circuit 116 and divides it into two phases to form the modulation circuit 12.
It outputs to 0a and 120b. This is because the bit rate after error correction coding is about 60 Mbps, whereas the band of the magnetic recording system is about 30 Mbps.

The error correction coding circuit 118 first sends the error correction coded data of the first coding block group (pixels in FIG. 5) to the modulation circuit 120a and the second coding block group (FIG. 5, the error correction coded data of the triangle mark 5) is supplied to the modulation circuit 120b, and the error correction coding of the third coding block group (pixels of the triangle mark in FIG. 5) is performed in the next half rotation of the rotary drum. The data is supplied to the modulation circuit 120a, and the error correction coded data of the fourth coding block group (pixels in FIG. 5) is supplied to the modulation circuit 120b.

The modulated outputs of the modulation circuits 120a and 120b are recorded equalization circuits 122a and 122b and the recording amplifier 124.
It is applied to the magnetic heads 126a and 126b via a and 124b and simultaneously recorded on the magnetic tape 128. The magnetic heads 126a and 126b have different azimuth angles.

As shown in FIG. 7, two pairs of magnetic heads 126a and 126b are provided on the rotary drum so as to face each other by 180 degrees. One pair of magnetic heads is designated by reference numeral 126a.
(1) and 126b (1), and the other pair of magnetic heads is indicated by reference numerals 126a (2) and 126b (2). Magnetic heads 126a (1) and 126b (1) and magnetic head 12
6a (2) and 126b (2) are used alternately. The magnetic head 126a (1) and the magnetic head 126a (2) record the output of the recording amplifier 124a on the magnetic tape 128, and the magnetic head 126b (1) and the magnetic head 126b.
In (2), the output of the recording amplifier 124b is the magnetic tape 128.
To record.

Specifically, the magnetic head 126a (1)
However, the modulated data of the first coded block group (pixels marked with a circle in FIG. 5) is recorded on the magnetic tape 128, and the magnetic head 126
b (1) records the modulated data of the second coded block group (pixels in FIG. 5) on the magnetic tape 128, and the magnetic head 126a (2) records the third coded block group (of FIG. 5). The modulated data of the ∇ mark) is recorded, and the magnetic head 126b (2) causes the fourth encoding block group (□ in FIG. 5).
The modulated data of the pixel) is recorded. Magnetic tape 128
The track pattern of the above is shown in FIG.

FIG. 9 shows a schematic block diagram of a reproducing system corresponding to FIG. As shown in FIG.
The data recorded in the magnetic heads 126a, 126b
Played by. The reproduction outputs of the magnetic heads 126a and 126b are reproduction amplifiers 130a and 130b, reproduction equalization circuits 132a and 132b, and demodulation circuits 134a and 134b.
Stored in the memory 136 via the. That is, the reproduction amplifiers 130a and 130b amplify the outputs of the magnetic heads 126a and 126b to a predetermined level, and reproduce reproduction equalization circuits 132a and 1b.
32b waveform-equalizes the outputs of the reproduction amplifiers 130a and 130b, and demodulation circuits 134a and 134b form the reproduction equalization circuit 13.
The outputs of 2a and 132b are demodulated to restore digital data.

The memory 136 includes an error correction coding circuit 1
The error correction parity added in 18 is also stored, and the error correction circuit 138 corrects the recording / reproduction error using the error correction parity. The error-corrected image data is read from the memory 136 to the high-efficiency decoding circuit 140, and the high-efficiency decoding circuit 140 expands the compressed image data to restore the digital image signal. The restored image data is applied to the interpolation circuit 142.

The error correction circuit 138 supplies an uncorrectable flag to the interpolation circuit 142 for uncorrectable errors. The interpolation circuit 142, in accordance with the uncorrectable flag, of the image data output from the high-efficiency decoding circuit 140,
Interpolate data with uncorrectable errors.

For example, it is assumed that the data of the second to fourth block groups can be correctly reproduced, but the data of the first block group (pixels marked with a circle in FIG. 5) cannot be corrected. This is a case where a dropout occurs in the magnetic head 126a (1), and in FIG. 5, the coding block including the pixels marked with a circle cannot be decoded, and the other triangle marks, the ▽ mark, and the □ mark are not decoded. A coded block made up of pixels corresponds to the fact that decoding was possible. In this case, the pixels marked with ◯ can be accurately interpolated by the average value of the pixels marked with Δ and / or ∇. Of course, a weighted average value may be used instead of a simple average value. Furthermore, □
It is also possible to use the marked pixels and interpolate from all the surrounding pixels.

Of course, when an uncorrectable error occurs in any of the second to fourth block groups, the data of another block group including the first block group and having no uncorrectable error is used, Interpolation can be performed using adjacent pixel data.

The interpolation circuit 142 outputs the luminance data of the interpolated image data to the D / A converter 146 and the line-sequential color difference signal to the color difference line synchronization circuit 144. The color difference line synchronization circuit 144 synchronizes the line-sequential color difference signals, the color difference data Pb to the D / A converter 148, and the color difference data Pr to D / A.
Output to the converter 150. D / A converters 146, 14
8 and 150 are luminance data Y and color difference data Pb, respectively.
And the color difference data Pr are converted into analog signals. As a result, the analog high-definition signal of the reproduced video is output to the outside.

In the conventional example, the pixels around the coded block could be interpolated from the data of the adjacent coded block, but it was impossible to interpolate the pixel in the center part, and the deterioration of the image quality was unavoidable. However, in the present embodiment, since it is possible to interpolate from adjacent pixels in the same screen regardless of whether it is the periphery or the center of the encoded block, it is possible to further suppress image quality deterioration.

In the present embodiment, the data of four coded block groups are also allocated to two transmission channels and transmitted in time series. Therefore, two or more coded block groups cannot be simultaneously corrected by one transmission error. In this respect, it is resistant to transmission errors.

In the above embodiment, the coding block having a 4 × 4 pixel structure has been described as an example, but it may have a different size (for example, 8 × 8 pixels or 4 × 8 pixels). Needless to say. Also, the number of coding block groups is not limited to four, and the allocation of each pixel to the block groups is not limited to the above example. The number of tracks per frame is not limited to four.

Further, in the above embodiment, one pixel belongs to only one coded block, but peripheral pixels in the coded block also belong to one or more adjacent coded blocks. Good.

The application example to the magnetic recording / reproducing system has been described.
It is needless to say that the present invention can obtain the same operational effect even when applied to a transmission system capable of transmitting coded image data through a plurality of transmission channels.

[0040]

As can be easily understood from the above description, according to the present invention, it is possible to provide an image transmission system that is resistant to transmission errors. Further, even if there is an uncorrectable error, it is possible to perform interpolation using adjacent pixels in the same screen, and it is possible to further reduce image quality deterioration.

[Brief description of drawings]

FIG. 1 is a block configuration diagram of a recording system according to an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional example.

FIG. 3 is a configuration diagram of a coding block of a conventional example.

FIG. 4 is a configuration block diagram of a magnetic recording / reproducing system as a transmission line 20.

FIG. 5 is a configuration diagram of a coding block according to the present embodiment.

FIG. 6 is a comparison diagram of coding blocks of a luminance signal and a color difference signal.

FIG. 7 is a plan view of the head configuration of this embodiment.

FIG. 8 is a track pattern of the present embodiment.

9 is a schematic block diagram of a reproduction system corresponding to FIG.

[Explanation of symbols]

10: Input terminal 12: A / D converter 14: Blocking circuit 16: High efficiency coding circuit 18: Error correction coding circuit 20: Transmission path 22: Memory 24: Error correction circuit 26: High efficiency decoding circuit 28 : Interpolation circuit 3
0: D / A converter 32: Output terminal 40: Modulation circuit 42: Recording equalization circuit 44: Recording amplifier 46: Recording magnetic head 48:
Magnetic tape 50: magnetic head for reproduction 52: reproduction amplifier 54: reproduction equalization circuit 56: detection demodulation circuit 10
0, 102, 104: input terminals 106, 108, 11
0: A / D converter 112: Color difference line sequential circuit 11
4: Blocking circuit 116: High efficiency coding circuit 11
8: Error correction coding circuit 120a, 120b: Modulation circuit 122a, 122b: Recording equalization circuit 124a, 124b: Recording amplifier 126a, 126a
(1), 126a (2): Magnetic heads 126b, 12
6b (1), 126b (2): magnetic head 128: magnetic tape 130a, 130b: reproducing amplifier 132
a, 132b: reproduction equalization circuit 134a, 134b: demodulation circuit 136: memory 138: error correction circuit 14
0: High efficiency decoding circuit 142: Interpolation circuit 144: Color difference line simultaneous circuit 146, 148, 150: D / A converter

Claims (2)

[Claims] 1. All pixels in the screen are assigned such that at least some of the adjacent pixels belong to different coding block groups.
Blocking means for allocating to a plurality of coding block groups and dividing pixels belonging to each coding block group into coding blocks, and compression coding means for compressing and coding the output of the blocking means in units of the coding blocks. And an output means for outputting the compressed data of each coding block group to different transmission channels. 2. All pixels in the screen are assigned such that at least some of the adjacent pixels belong to different coding block groups.
Blocking means for allocating to a plurality of coding block groups and dividing pixels belonging to each coding block group into coding blocks, and compression coding means for compressing and coding the output of the blocking means in units of the coding blocks. And an image recording device for recording compressed data of each coded block group on another track of a recording medium.