JPH06187577A - Receiver in radio alarm device - Google Patents

Abstract

PURPOSE:To provide a receiver in a radio alarm device capable of surely processing signals from plural transmitters. CONSTITUTION:A demodulation part 20 demodulates a modulated carrier sent from the transmitter, and outputs a binary signal. A binary signal storage means 22 stores it. A header detecting means 24 reads out the binary signal from the binary signal storage means 22, and detects a header part, and outputs a header detection signal when detecting the header part. A content detecting means 26 detects whether or not the content part of its own ID code is included in the binary signal by receiving the header detection signal, and outputs an identification signal. At this time, the content detecting means 26 judges whether or not either one of plural content parts is included in the binary signal, and outputs the identification signal in accordance with each content part. An alarm means 28 receives the identification signal, and issues an alarm in accordance with the identification signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiver of a wireless alarm device, and more particularly to simplification of its structure and improvement of its reliability.

[0002]

2. Description of the Related Art Recently, the concept of home security has become popular in order to protect home safety from thieves, fires, etc., and in reality home security devices are often used at home. .

FIG. 8 shows an example of a conventional wireless alarm device as the home security device. The device comprises a transmitter 2 and a receiver 12. The transmitter 2 includes an ID code section 4, an opening / closing switch 5, an encoding section 6, and a transmitting section 7, and is provided for each window M and door T as shown in FIG. The receiver 12 includes a receiving unit 14 and a decoding unit 1.
5, the alarm unit 16 is provided, and the alarm unit 16 is provided in a place apart from the transmitter 2.

First, when an intruder enters through the window M ₁ , for example, the open / close switch 5 of the transmitter 2 ₁ provided in the window M ₁ is closed. At this time, the ID code unit 4 sends an ID code specifying that the open / close switch 5 is the window M ₁ to the encoding unit 6. The encoding unit 6 encodes the ID code. Then, the transmitter 7 modulates the carrier wave with the ID code and transmits it to the receiver 12.

Next, in the receiver 12, the receiving unit 14 is used in the transmitter 2.
Receive the carrier from. The decoding unit 15 sets the carrier wave to I
Decode to D code. Then, the alarm unit 16 issues an alarm by the ID code.

Conventionally, such a wireless alarm device has been used.

[0007]

However, the conventional wireless alarm device has the following problems.

Since the transmitter 2 and the receiver 12 are configured to correspond to each other, if a large number of transmitters 2 are provided, a large number of receivers 12 having different carrier waves are required. In other words, there is a problem that the cost of the entire system increases as the number of places where caution is required increases.

It is an object of the present invention to solve the above problems and to provide a receiver of a wireless alarm device which can be constituted by one receiver without changing the carrier wave even if the number of places to be watched increases. To do.

[0010]

A receiver in a wireless alarm device according to claim 1 demodulates a modulated carrier wave sent from a transmitter, and outputs a binary signal from a demodulation section and a demodulation section. By detecting whether the binary signal read out from the binary signal storage means for storing the binary signal includes the header portion of its own ID code, the header portion is detected. Header detection means for outputting a header detection signal, receiving the header detection signal, detecting whether or not the binary signal read from the binary signal storage means includes the content part of its own ID code, and including If there is, a content detecting means for outputting an identification signal corresponding to the content portion of the plurality of identification signals, and an alarm means for issuing an alarm in response to the identification signal from the content detecting means are provided. .

The receiver in the wireless alarm device according to a second aspect of the invention is characterized in that the frequency of the clock signal for reading from the binary signal storage means is set higher than the frequency of the clock signal for storing.

In the receiver of the wireless alarm device according to a third aspect of the present invention, the content detecting means receives the binary signal read from the binary signal storing means with one of its own ID codes stored in advance as an input. A comparator is provided as the other input, and the binary signal is logically ANDed with a prestored ID code and then applied to the other input.

[0013]

In the receiver of the first aspect, the content detecting means detects a plurality of identification signals. Therefore,
A single receiver can detect signals from multiple transmitters. Further, the binary signal is temporarily stored in the binary signal storage means. Therefore, even when a plurality of ID codes are recognized, the detection can be performed quickly and reliably.

The receiver according to claim 2 is characterized in that the frequency of the clock signal when reading from the binary signal storage means is set higher than the frequency of the clock signal when storing. Therefore, it is possible to reliably receive the signal from the transmitter and quickly identify the ID code.

According to the third aspect of the present invention, the binary signal is logically ANDed with its own ID code stored in advance and then given to the comparator. Therefore, it is possible to eliminate the influence of noise and interference in which “0” changes to “1”.

[0016]

1 is a block diagram of a receiver in a wireless alarm device according to an embodiment of the present invention. Demodulation unit 20
Outputs a binary signal by demodulating the modulated carrier wave sent from the transmitter. The binary signal storage means 22 stores this. The header detection unit 24 reads the binary signal from the binary signal storage unit 22 to detect the header portion, and outputs the header detection signal when the header portion is detected. The content detection means 26 receives the header detection signal, detects whether the binary signal includes the content part of its own ID code, and outputs the identification signal. At this time, the content detection unit 26 determines whether or not any one of the plurality of content units is included in the binary signal, and outputs the identification signal corresponding to each content unit. The alarm means 28 receives the identification signal and issues an alarm corresponding to the identification signal.

FIG. 2 shows an example of the binary signal storage means 22. In the memory 30, the write clock WCK and the read clock RCK can be set independently. Two
When writing the value signal MD, the same write clock WCK and read clock RCK are used.

The binary signal MD from the demodulator 20 is stored in the memory 3
Given to 0. As a result, the binary signal MD (serial signal) is stored in the memory 30. The written binary signal MD is read and stored in the latch 32. The read clock RC is input to the latch 32 via a delay circuit 34.
K is given. Therefore, the output from the latch 32 is given to the input of the memory 30 with a delay of one clock. Further, the output Q _{0 of the} latch 32 is input to D ₁ of the memory 30,
The output Q _{1 of the} latch 32 is given to D ₂ of the memory 30 in a state of being shifted by one bit. That is,
As shown in FIG. 3, the memory 30 stores binary signals MD ₁ ,
MD ₂ , MD _3, ... Are stored. By storing in this way, a binary signal can be handled in 8-bit units, and the processing speed is improved.

In FIG. 2, the 8-bit parallel output is MD
It is output as P, and the 1-bit serial output is output as MDS.

FIG. 4 shows the ID code used in this embodiment. The ID code includes a header code HDC which is a header part and DVC, ADC, CTC and IT which are content parts.
Has C. The header code HDC is a code unique to the receiver. By checking this header code HDC, it is possible to detect whether or not the signal is from the transmitter managed by itself. DVC is a device code and indicates the type of sensor (gas sensor, contact sensor, etc.) on the transmitter side. The ADC is an address code and a code indicating the position of the transmitter. CTC is a control code and indicates the type of alarm.
For example, if the transmitter detects that a window has been opened, it may indicate that it was opened intentionally by the user or by someone else without the user's knowledge. , Which is sent from the transmitter side. ITC is an interval code, which is a code indicating the end of one ID code. In this embodiment, the interval code ITC is made up of 12 consecutive "1" s.

The ID code shown in FIG. 4 is continuously sent from the transmitter side. An example of the ID code is shown in FIG.
This ID code is stored as the binary signal MD in the memory 30 shown in FIG. The binary signal MD stored in the memory 30 is read out and it is determined whether or not it is the self ID code. The frequency of the read clock RCK at this time is higher than the frequency of the write clock WCK at the time of writing. As a result, the ID code can be quickly determined.

FIG. 6 shows an example of the header detecting means and the content detecting means used in this embodiment. Read 2
The value signal MDS (serial signal) is given to the counter 46. The counter 46 sequentially counts when "1" is input, and is reset when "0" is input. When the count value becomes "10", the count-up signal UP is output. That is, in the given binary signal MDS, the count-up signal UP is output when ten "1" s continue. As a result, the interval code I included at the end of the ID code
Detect TC. In this embodiment, the interval code ITC has "1" of 12 bits in succession. In this circuit, "1" is detected 10 times in succession to detect this.

The count-up signal UP is processed by the processing circuit 44.
Given to. The processing circuit 44 receives this and then
The place where the binary signal MDS changes to "0" is detected. In this embodiment, the header code HDC is always started from "0". Therefore, the start of the header part can be known by detecting "0".

When the start of the header section is known, the processing circuit 44
Specifies a read address so as to read its own header code PHDC stored in advance from the memory 36. Header code PHDC read from the memory 36
Are held by the latch 38 and applied to one of the inputs P _{0 to} P ₇ of the comparator 40.

On the other hand, the other input Q ₀ of the comparator 40
The parallelized binary signal MDP is sent to Q ₇ . Therefore, the header code HDC included in the binary signal MDP and the header code PHD previously stored
C is compared. If they match, the comparator 40 outputs a match output C. Upon receiving the coincidence output C, the processing circuit 44 knows that the upper 8 bits of the header code have coincided. (See α in FIG. 5).

Subsequently, the processing circuit 44 reads the contents stored in the memory 36 and inputs one of the inputs P ₀ to
P ₇ and one of the other inputs Q ₀ to
The binary signal MDP which is parallelized away is sequentially sent to Q ₇ . Therefore, it is determined whether the lower 8 bits of the header code HDC included in the binary signal MDP match the lower 8 bits of the header code PHDC stored in advance. If they match, the comparator 40 outputs the match output C.
Is output. In response to this, the number of times of processing 44 knows that the header codes completely match (β in FIG. 5).

Similarly, the processing circuit 44 has a memory 36.
Change the read address of the
It is detected whether C and the address code ADC match. Here, a plurality of device codes DVC and address codes ADC are stored in advance, and the binary signal M
It is determined whether DP matches any of these. The processing circuit 44 outputs the matched address code ADC. Further, the control code CTC is also subjected to the same processing and output from the processing circuit 44.

If there is no matching address code ADC, etc., the processing circuit 44 sends the address code A
DC and control code CTC are not output.

The address code ADC output from the processing circuit 44 is given to the alarm means 28 (FIG. 1). The alarm means 28 turns on an alarm lamp or the like corresponding to the address code ADC to notify which part has an abnormality. Also, control code C sent together
Depending on the contents of the TC, it is displayed whether the window or the like is in an abnormal state where the user did not intend to open the window or the user has intentionally opened the window or the like.

FIG. 7 shows a comparator 4 according to another embodiment.
The input part to 0 is shown. In this embodiment, the switching input S of the selector 42 causes the valid inputs to be A _{0 to} A _7.
And B _{0 to} B ₇ can be switched. Input A ₀
In to A _7, like the embodiment of FIG. 6, the binary signal MD
P is given directly. Binary signal MD is input to inputs B _{0 to} B _7.
The logical product of P and the signals of Q _{0 to} Q ₇ (that is, the ID code stored in advance) of the latch 38 is given.

When the processing circuit 44 detects a match of the upper 8 bits of the header code HDC, it sends a switching signal S to the selector 42 to validate the inputs B _{0 to} B ₇ . Binary signal M
Even if noise is superimposed on DP and "0" changes to "1",
Since it is ANDed with the ID code stored in advance, it is not affected by such noise or interference due to transmission of multiple transmitters of the same carrier. In particular, these effects are
This is effective because there are more cases where "0" becomes "1" than cases where "1" becomes "0". That is, it is possible to prevent malfunction due to the influence of noise and interference.

Although the interval code ITC is 12 bits in the above embodiment, it may be another bit length. Further, the determination as to whether or not there is the interval code ITC depends on whether or not "1" continues for 10 bits, but the bit length may be changed depending on the case.

In the above embodiment, each function of FIG. 1 is realized by a logic circuit, but a part or all of it may be realized by a CPU and software.

[0034]

According to the receiver of the first aspect, the plurality of identification signals are detected by the content detecting means. Therefore, one receiver can detect signals from a plurality of transmitters. Further, the binary signal is temporarily stored in the binary signal storage means. Therefore, even when a plurality of ID codes are recognized, the detection can be performed quickly and reliably.

The receiver of claim 2 is characterized in that the frequency of the clock signal when reading from the binary signal storage means is set higher than the frequency of the clock signal when storing. Therefore, it is possible to reliably receive the signal from the transmitter and quickly identify the ID code.

According to the third aspect of the present invention, the binary signal is logically ANDed with its own ID code stored in advance and then given to the comparator. Therefore, it is possible to eliminate the influence of noise and interference in which “0” changes to “1”.

That is, according to the present invention, it is possible to provide a highly reliable receiver of a wireless alarm device with a simple structure.

[Brief description of drawings]

FIG. 1 is a block diagram of a receiver in a wireless alarm device according to an embodiment of the present invention.

FIG. 2 is a diagram showing details of a binary signal storage means 22 of the above embodiment.

FIG. 3 is a diagram showing stored contents of a binary signal storage means 22.

FIG. 4 is a diagram showing an example of a configuration of an ID code.

FIG. 5 is a diagram showing an example of a specific ID code and its recognition process.

FIG. 6 is a diagram showing details of a header detecting means 24 and a content detecting means 26.

FIG. 7 is a diagram showing another embodiment.

FIG. 8 is a block diagram showing a conventional wireless alarm device.

FIG. 9 is a diagram showing a layout of a conventional wireless alarm device.

[Explanation of symbols]

 20 ... Demodulation section 22 ... Binary signal storage means 24 ... Header detection means 26 ... Content detection means 28 ... Alarm means

Claims (3)

[Claims] 1. A demodulation section for demodulating a modulated carrier wave sent from a transmitter to output a binary signal, a binary signal storage means for storing a binary signal output from the demodulation section, and a binary signal storage. The binary signal read from the means has its own I
A header detecting unit that detects whether or not the header portion of the D code is included, and outputs a header detection signal if the header portion is detected. Content detection means for detecting whether or not the value signal includes the content part of its own ID code, and if so, outputting an identification signal corresponding to the content part of the plurality of identification signals, content detection A receiver in a wireless alarm device, comprising: alarm means for issuing an alarm in response to an identification signal from the means. 2. The receiver in the wireless alarm device according to claim 1, wherein the frequency of the clock signal when reading from the binary signal storage means is set higher than the frequency of the clock signal when storing. Receiver at the device. 3. The receiver in the wireless alarm device according to claim 1, wherein the content detecting means has a self-ID stored in advance.
A comparator having a code as one input and a binary signal read from the binary signal storage means as the other input is provided, and the binary signal is logically ANDed with a prestored ID code. One that is later given to the other input.