JPH0618297Y2 - Variable delay signal generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a variable delay signal generator capable of varying a delay time. Specifically, a high-speed sawtooth wave is compared with a low-speed signal whose level can be changed, and a delayed signal is extracted at the point of coincidence between the two. It is provided.

[Prior Art] FIG. 3A is a circuit diagram showing a conventional circuit, and FIG. 3B is a waveform diagram for explaining the operation.

In the sampling oscilloscope, a high-speed sawtooth wave 80 synchronized with the waveform of the observed signal is generated, while a staircase wave 81 is generated to deflect the X-axis of the cathode ray tube, and these two waveforms are compared. The one shown in (a) constitutes a comparison circuit, and the high-speed sawtooth wave 80 is applied to the base of the transistor 30 via the input terminal 7. On the other hand, the staircase wave 81 is applied to the transistor 31 via the input terminal 71. Both transistors 30, 3
The emitter of No. 1 is coupled and connected to the constant current source 17, and as shown in (b), the delay time T _d1 ′ T _d2 ′ from the time when both waveforms 80 and 81 intersect, that is, from the start point of the high-speed sawtooth wave. At a time point delayed by T _d3 ′ T _d4 , from the load resistances 50 and 51, the output terminal 7
A pulse-shaped delay signal can be obtained at 9.

As is clear from FIG. 3B, the value of the delay time T _d is proportional to the level of the staircase wave 81 at the intersection of the two waveforms if the slope of the high-speed sawtooth wave is constant.

However, since the voltage of the power source to which the load resistors 50 and 51 are connected is constant at V ₁ , as the level of the staircase wave 81 changes, both transistors 30 and 31 at the moment when the waveforms 80 and 81 intersect. Such a voltage, for example, the collector-base voltage V _CB changes.

When the delay time T _d increases, the collector-base voltage V _CB decreases, the operating points of the transistors 30 and 31 change, and the delay signal can be obtained later than the original delay time T _d. .

According to the measurement example, the slope of the high-speed sawtooth is 100 nS /
When the level of the staircase wave 81 is 6 V and the level of the staircase wave 81 is constant, both transistors 3 at the intersection of the waveforms 80 and 81
The collector-base voltage V _{CB of} 0, 31 is 4.67V
Power supply voltage + V ₁ is 2 more than the delayed signal obtained at
It was found that the delayed signal obtained when V was lowered to V _CB of 2.67 V was delayed by about 50 pS.

[Problems to be Solved by the Invention] This means that the linearity of the delay time T _d deteriorates as V _CB decreases, and when this circuit is used in a sampling oscilloscope, the accuracy of the time axis deteriorates. Be invited.

This is an important problem that must be solved in the present day when high precision is required due to digital processing and digital display of waveforms.

[Means for Solving Problems] The present invention has been made in order to solve such problems, and a comparator circuit is provided with a change in the level of a low speed signal such as a staircase wave serving as a reference voltage. An addition power supply circuit is provided so that the value of the applied power supply voltage also changes.

[Operation] With this, as the level of the low-speed signal changes,
The output voltage of the summing power supply circuit also changes, and the collector-base voltage V _CB of the two transistors in the comparison circuit is always kept constant at the moment when the high-speed sawtooth wave and staircase wave cross each other. , V
The deterioration of the accuracy of the delay time T _d due to the change of _CB can be completely eliminated.

[Embodiment] A circuit diagram of an embodiment of a variable delay signal generator according to the present invention is shown in FIG. 1 and will be described below with reference to FIG. The same symbols are attached to those corresponding to those shown in FIG.

Reference numeral 11 is a comparison circuit, and the content 43 is an input terminal 7
1 has no effect on the staircase wave 81 applied to No. 1, but the high speed sawtooth wave 8 applied to the input terminal 70
For 0, the transistor 30 is made to operate at high speed as a grounded-emitter transistor, and its output is obtained from the output terminal 79.

Reference numeral 12 denotes an addition power supply circuit, which operates so as to always keep a difference between the voltage of the input terminal 74 to which the staircase wave 81 is applied and the voltage of the addition power supply terminal 75 at a constant value. The staircase wave 81 applied to the input terminal 74 is applied to one input terminal of the operational amplifier (hereinafter abbreviated as operational amplifier) 20 via the resistor 53, and the output of the operational amplifier 20 increases the current supply capability. Is applied to the base of the transistor 32, and the addition power supply voltage which changes stepwise is output from the emitter of the transistor 32 via the addition power supply terminal 75 and applied to the comparison circuit 11. Transistor 32
A resistor 52 is connected between the emitter of the input terminal and the other input terminal of the operational amplifier 20, and a constant current source 18 is connected to the resistor 52 connected to the other input terminal of the operational amplifier 20. The voltage is always set to a constant value. Here, the capacitor 45 prevents noise of a high frequency component from being superimposed on the added power supply voltage.

Reference numeral 13 denotes an addition reference voltage circuit, which includes a staircase wave applied to each of the input terminals 72 and 73 and a DC voltage for changing the DC level of the staircase wave to offset the value of the delay time T _d . And 56 are applied to one input terminal of the operational amplifier 21. The resistor 57 is a feedback resistor, the resistor 58 is a bias resistor for obtaining an appropriate output level, and 59 is a resistor for grounding the other input terminal of the operational amplifier 21.

The resistor 51 and the capacitor 44 remove noise of high frequency components from the staircase wave 81 applied to the input terminal 71.

FIG. 2 shows another embodiment of the addition power supply circuit 12. In FIG. 6A, instead of the resistor 52 and the constant current source 18 shown in FIG. 1, a constant voltage diode 40 and a resistor 60 are connected, respectively. The resistor 60 can be replaced with a constant current source.

In FIG. 2 (b), PN forming an emitter follower
From the emitter of the P-transistor 33 to the constant voltage diode 4
A resistor 61 is connected via 1 and the base of an NPN transistor 34, which is an emitter follower, is connected to the connection point between the constant voltage diode 41 and the resistor 61, and the addition power source is obtained from the emitter. It will be clear here that the resistor 61 can be replaced by a constant current source.

[Effect of the Invention] As apparent from the above description, according to the present invention,
The power supply voltage applied to the comparison circuit changes with the change of the reference voltage, which is a low-speed signal such as a staircase wave, and the difference always keeps a constant value. Therefore, accurate comparison is possible, and the accuracy is extremely high. If a delayed signal can be obtained and used in a sampling oscilloscope or the like, the measurement accuracy can be improved, and therefore the effect of the present invention is extremely large.

[Brief description of drawings]

1 is a circuit diagram showing an embodiment of a variable delay signal generator according to the present invention, FIG. 2 is a circuit diagram showing another embodiment of a summing power supply circuit, and FIG. 3 is a circuit diagram showing a conventional example. Is. 11 ... Comparison circuit, 12 ... Addition power supply circuit 13 ... Addition reference voltage circuit 17, 18 ... Constant current source 20-22 ... Operational amplifier 30-34 ... Transistor 40, 41 ... Constant voltage diode 43-45 ...... Capacitor 50 to 61 ...... Resistance 70 to 74 ...... Input terminal, 75 ...... Additional power supply terminal 79 ...... Output terminal, 80 ...... High speed sawtooth wave 81 ...... Staircase wave.

Claims (1)

[Scope of utility model registration request] 1. A high-speed sawtooth wave and a low-speed reference voltage are applied to the bases of the two transistors, which are emitter-coupled and connected to a constant current source. The emitter of the transistor to which the high-speed sawtooth wave is applied is grounded by a capacitor for operating the transistor to which the sawtooth wave is applied as a grounded-emitter transistor at high speed.
The collectors of the respective transistors are commonly connected to a collector power supply via load resistors, and the high-speed sawtooth wave is adapted to take out a delayed signal from the collector of the transistor to which the high-speed sawtooth wave is applied, and the reference voltage. And a summing power supply circuit for applying a voltage having a potential difference of a constant value to the reference voltage as a power supply for the collector of the comparison circuit. Signal generator.