JPH06181221A - Manufacture of film transistor - Google Patents

Abstract

PURPOSE:To equalize the distribution of film thickness on an insulating substrate by specifying the discharge frequency of high frequency power adding to an discharge electrode, and supplying this high frequency power, repeating on time and off time alternately, according to the on time and off time capable of being set within an optional range, thereby performing film growth. CONSTITUTION:The inside of the chamber of a plasma CVD device, where four sheets of insulating substrates 11 are taken in on a substrate holder 30, is heated to a specified temperature, and then silane (SiH4) gas, ammonium (NH3) gas, and nitrogen (N2) gas are introduced into inside, and the pressure is adjusted to 100Pa. After this, 1000W of high frequency power where frequency is 13.56MHz (1MHz-100MHz), with modulation frequency 500Hz (0-5KHz) and duty ratio 50% is applied intermittently to a discharge electrode 31 so as to form a gate insulating film consisting of a silicon nitride. Hereby, a gate insulating film high in thickness uniformity can be gotten without lowering film growth rate.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor formed on an insulating substrate.

[0002]

2. Description of the Related Art In recent years, a display device using liquid crystal is directed to a television display, a graphic display, etc., and has a large capacity.
There is a growing demand for higher density. Therefore, high-contrast display without crosstalk is required, and so-called active matrix type liquid crystal display device in which active elements are arranged in a matrix as drive control means of each pixel is actively developed and put to practical use. ing.

As a typical example of an active element, hydrogenation is performed on an insulating substrate having a light-transmitting property because a transmissive display is possible, a large area can be easily formed, and a low temperature can be formed. Thin film transistor formed by using amorphous silicon (a-Si: H)
or: TFT).

FIG. 2 shows a schematic sectional structure of one pixel of such a liquid crystal display device. In FIG. 2, 1
Reference numerals 1 and 12 denote translucent insulating substrates such as glass and plastic. A thin film transistor 13 and a display pixel electrode made of a transparent electrode film such as ITO (Indum Tin Oxide) are provided on the main surface of one insulating substrate 11. 14 are arranged in a matrix. Further, on the main surface of the other insulating substrate 12, a counter electrode 15 made of a transparent conductive film is formed on the entire surface. The two insulating substrates 11 and 12 are arranged with a gap so that the main surfaces thereof face each other, and the facing surfaces of the insulating substrates 11 and 12 are covered with the liquid crystal alignment film 16, respectively. Liquid crystal in the gap between 11 and 12
17 are enclosed.

Next, the structure of the thin film transistor 13 portion will be described.

First, 21 is a gate electrode.
21 is integrally formed with a gate line (not shown) on one insulating substrate 11. And this gate electrode 21
And the surface of the insulating substrate 11 including the gate electrode 21 are covered with a gate insulating film 22 made of, for example, silicon nitride. The gate insulating film 22 is formed by the plasma CVD method. Then, in a portion facing the upper surface of the gate electrode 21 through the gate insulating film 22,
For example, a semiconductor layer made of hydrogenated amorphous silicon is formed as the active layer 23 by the plasma CVD method, and an insulating layer made of, for example, silicon nitride is also formed as the etching stopper layer 24 at the center of the upper portion of the active layer 23 by the plasma CVD method. It is formed by the method.

Reference numeral 25 is a drain electrode, which is formed on one of the active layers 23 separated by the etching stopper layer 24 via an ohmic contact layer 26. Further, 27 is a source electrode.
27 is an active layer 23 separated by an etching stopper layer 24
Is formed on the other of the two via the ohmic contact layer 26 of the etching stopper layer 24. As the ohmic contact layer 26, for example, a low resistance semiconductor layer made of an n-type hydrogenated amorphous silicon film is formed by the plasma CVD method.

The display pixel electrode 14 is a gate insulating film.
It is formed on 22 and is conductively connected so as to overlap one end of the source electrode 27. Further, the portion except the display pixel electrode 14 is covered with the inorganic protective film 28. Incidentally, the inorganic protective film
As 28, for example, a silicon nitride film is plasma CVD
Formed by the method. The entire liquid crystal alignment film 16 including the display pixel electrode 14 and the inorganic protective film 28 is covered.

As described above, the predetermined layers forming the thin film transistor 13, such as the gate insulating film 22, the active layer 23, the etching stopper layer 24, the ohmic contact layer 26 or the inorganic protective film 28, are formed by the plasma CVD method. Therefore, when forming the thin film transistor 13, the plasma CVD process is indispensable.

As is well known, the plasma CVD method applies high-frequency power to a predetermined reaction gas to decompose the reaction gas and generate plasma to form a thin film of a predetermined material. In addition to forming each layer, it is an essential step in the crystalline silicon process. In this case, various frequencies and methods are used depending on the type of film to be formed and the application.

For example, the one disclosed in Japanese Unexamined Patent Application Publication No. 1-252782 performs film formation by modulating the applied high frequency power at an arbitrary frequency. That is, by setting the time when the high frequency power is applied and the time when the high frequency power is not applied, and by applying the high frequency power so that these states are repeated alternately, film formation is prevented. ing. Note that this is applied to the field of crystalline silicon, and is a method for preventing the film thickness from becoming non-uniform due to different concentration distributions near the inlet and outlet of the reaction gas. Therefore, by alternately generating a state in which high-frequency power is applied and a state in which this high-frequency power is not applied, and stopping discharge for a certain period of time when high-frequency power is not applied, the gas inlet and exhaust ports and the silicon wafer periphery and the center The concentration distribution of the reaction gas in each part is made uniform, and discharge is performed under the reaction gas having the uniform concentration distribution in the time when the next high-frequency power is applied to enable film formation with a uniform film thickness.

However, a new problem arises in the manufacturing process of the thin film transistor 13 in which a thin film is formed on the insulating substrate 11 by using the plasma CVD process. That is, as the size of the liquid crystal display device to which the thin film transistor 13 is applied increases, the size of the insulating substrate 11 on which the thin film transistor 13 is formed increases, or the productivity is improved even if the insulating substrate is relatively small. Therefore, a plurality of insulating substrates may be processed at the same time, and the area of the insulating substrate 11 with respect to the effective discharge region tends to increase.

FIG. 3 shows a state in which two insulating substrates 11 are set on the substrate holder 30 in order to carry out the plasma CVD process. 2 set in this substrate holder 30
The insulating substrate 11 is taken into a chamber of a plasma CVD device (not shown) and subjected to a predetermined process. The positional relationship of the discharge electrode 31 with respect to the two insulating substrates 11 in this case is shown by a broken line.

Here, the discharge electrode 31 is made of stainless steel (SU
Metal materials such as S) are common. In such a situation, when the area of the insulating substrate 11 becomes 50% or more of the area of the discharge electrode 31, the difference in impedance between the insulating substrate 11 portion and the substrate holder 30 portion viewed from the discharge electrode 31 causes The charge storage amount changes, and the uniformity of discharge is impaired. That is, the discharge concentrates on the substrate holder 30, and the influence thereof increases the film formation rate on the peripheral portion of the insulating substrate 11, so that the uniformity of the film thickness distribution on the insulating substrate 11 is impaired.

[0015]

As described above, when the area of the insulating substrate 11 with respect to the effective discharge area increases and the area of the insulating substrate 11 becomes 50% or more of the area of the discharge electrode 31, the uniformity of discharge is impaired. As a result, the uniformity of the film thickness distribution on the insulating substrate 11 is impaired.

An object of the present invention is to provide a method of manufacturing a thin film transistor which can efficiently secure a thin film transistor having high performance and high uniformity on the insulating substrate even if the area of the insulating substrate with respect to the effective discharge region increases. is there.

[0017]

The present invention provides a method of manufacturing a thin film transistor, wherein a predetermined layer of a thin film transistor is formed by a plasma CVD method at a predetermined position on an insulating substrate occupying 50% or more of the area of a discharge electrode. The discharge frequency of the high frequency power applied to the discharge electrode is 1 MHz to 100 M
The high frequency power is set to Hz and the high frequency power is alternately variably set in the range of 0 to 5 KHz in accordance with the ON time and the OFF time, and the ON state and the OFF state are alternately repeated to supply a film.

[0018]

According to the present invention, the high frequency power applied to the discharge electrode is supplied so that the ON state and the OFF state are alternately repeated in accordance with the ON time and the OFF time which can be arbitrarily set, and each layer of the thin film transistor is formed by the plasma CVD method. As described above, even if the area of the insulating substrate with respect to the effective discharge region is increased, the uniformity of the film thickness is not impaired as in the conventional case, and a thin film transistor with high uniformity can be obtained.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

The structure of the thin film transistor 13 itself is
Since it is the same as that shown in FIG. 2, a case of forming a thin film transistor of amorphous silicon will be described with reference to FIG.

First, the gate electrode 21 is formed integrally with a gate line (not shown) on one insulating substrate 11 made of a transparent material such as glass or plastic.
Then, the surface of this gate electrode 21 and this gate electrode
In order to form a gate insulating film 22 made of, for example, silicon nitride on the surface of the insulating substrate 11 including 21
The insulating substrate 11 on which 21 is formed is set on a substrate holder 30 as shown in FIG. 1 and taken into a plasma CVD apparatus (not shown). In this case, four sheets are set in consideration of mass productivity, and the four insulating substrates 11 set on the substrate holder 30 are symmetrical with respect to the discharge electrode 31 shown by a broken line as shown in the figure. To place.

Then, after heating the inside of the chamber of the plasma CVD apparatus in which these four insulating substrates 11 are taken in to a predetermined temperature, silane (SiH ₄ ) gas, ammonia (NH ₃ ) gas, nitrogen (N ₂ ) Introduce gas and adjust the pressure to 100 Pa. After this, the modulation frequency is 500H
z, a duty ratio of 50%, and a high frequency power of 1000 W having a frequency of 13.56 MHz is intermittently applied to the discharge electrode 31,
A gate insulating film 22 made of silicon nitride is formed.

According to the experiment, under the above-mentioned conditions, the film forming rate was 50 nm / min, and the film thickness uniformity was ± 10% or less. That is, in the plasma CVD process,
By intermittently applying the high frequency power at a predetermined frequency, the gate insulating film 22 having a high film thickness uniformity can be obtained without reducing the film forming rate.

The gate electrode on the gate insulating film 22
A semiconductor layer made of, for example, hydrogenated amorphous silicon is formed as an active layer 23 on a portion facing the upper surface of 21 by a plasma CVD method. For this purpose, the insulating substrate 11 on which the gate insulating film 22 is formed is transported together with the substrate holder 30 and taken into the adjacent chamber. Then, after heating the inside of this chamber to a predetermined temperature, silane (SiH
₄ ) Introduce gas and hydrogen (H ₂ ) gas, and set pressure to 150P
Adjust to a.

After this, a high frequency power of 85 at a frequency of 13.56 MHz with a modulation frequency of 500 Hz and a duty ratio of 25%.
0 W is applied intermittently to form the active layer 23. At this time, the film formation rate is 20 nm / min, and the film thickness uniformity is ± 10% or less. Similarly, the active layer 23 having high film thickness uniformity can be obtained without lowering the film formation rate.

An insulating layer made of, for example, silicon nitride is formed as an etching stopper layer 24 at the center of the upper portion of the active layer 23 by a plasma CVD method. For this purpose, the insulating substrate 11 on which the gate insulating film 22 and the active layer 23 are formed is transported together with the substrate holder 30 into the adjacent chamber, and a silicon nitride film is formed under the same film forming conditions as the gate insulating film 22. Therefore, like the gate insulating film 22, this silicon nitride film is also formed efficiently and with high film thickness uniformity. After that, the silicon nitride film is formed into a predetermined shape at a predetermined position facing the upper surface of the gate electrode 21 as an etching stopper layer 24, as shown in the figure.

Further, a low resistance semiconductor layer made of, for example, an n-type hydrogenated amorphous silicon film is formed as an ohmic contact layer 26 on one side and the other side of the active layer 23 and the etching stopper layer 24, respectively. For this purpose, first, the four insulating substrates 11 on which the gate insulating film 22, the active layer 23 and the etching stopper layer 24 are formed are set in the substrate holder 30 and taken into the adjacent chamber, and the inside of the chamber is heated to a predetermined temperature. After that, silane (S
iH ₄ ) gas, hydrogen (H ₂ ) gas, phosphine (PH
₃ ) Introduce gas and adjust the pressure to 150 Pa. After that, a high frequency power of 850 W having a modulation frequency of 500 Hz and a duty ratio of 25% and a frequency of 13.56 MHz is intermittently applied to form a low resistance semiconductor layer to be the ohmic contact layer 26 by a plasma CVD method.

Next, a low resistance semiconductor layer to be the active layer 23 and the ohmic contact layer 26 is formed in a predetermined shape, and then the display pixel electrode 14 made of a transparent electrode film such as ITO is formed on the gate insulating film 22 in a predetermined pattern. To form.

After that, a drain electrode 25 and a source electrode 27, which are integrated with a data line (not shown), are formed on the low-resistance semiconductor layer to be the ohmic contact layer 26 as shown in the figure, and then, between the drain electrode 25 and the source electrode 27. The low resistance semiconductor layer is removed by etching. As a result, ohmic contact layers 26 located on the left and right of the etching stopper layer 24 are formed.

One end of the source electrode 27 is a display pixel electrode.
It is formed so as to overlap with 14, and the source electrode 27 and the display pixel electrode 14 are conductively connected.

An inorganic protective film made of, for example, a silicon nitride film is formed on the insulating substrate 11 except the display pixel electrode 14.
28 is formed by the plasma CVD method under the same conditions as the gate insulating film 22. Further, by covering the whole including the display pixel electrode 14 and the inorganic protective film 28 with the liquid crystal alignment film 16,
One substrate that constitutes the liquid crystal display device is completed. Then, this one substrate is combined with the other substrate in which the counter electrode 15 and the liquid crystal alignment film 16 made of a transparent conductive film are formed on the main surface of the insulating substrate 12, and the liquid crystal 17 is further interposed between these two substrates. The liquid crystal display device is completed by enclosing it.

Here, on the insulating substrate 11, a predetermined layer of the thin film transistor 13, for example, a gate insulating film 22, an active layer 23, an etching stopper layer 24, an ohmic contact layer 26 and an inorganic protective film 28 are respectively formed by a plasma CVD method. In the case of forming, even when the area of the insulating substrate 11 occupies 50% or more of the area of the discharge electrode 31, high-frequency power is applied intermittently at a predetermined frequency, so that the film formation rate is not reduced and the film is formed. A thin film with high thickness uniformity can be obtained.

In the above embodiment, the discharge frequency of the high frequency power, the ON time to which the high frequency power is applied and the value of the OFF time to which the high frequency power is not applied have been exemplified, but these can be arbitrarily set according to various conditions. That is, the discharge frequency of the high frequency power can be set in the range of 1 MHz to 100 MHz, and the on-time and the off-time can be arbitrarily set in the range of 0 to 5 KHz.

[0034]

According to the method of manufacturing a thin film transistor of the present invention, when the film is formed on the insulating substrate by the plasma CVD method, the high frequency power is intermittently applied to form the film by the intermittent discharge. Even when the area of the insulating substrate occupies 50% or more of the area of the discharge electrode, it is possible to maintain high film thickness uniformity without decreasing the film formation rate. Therefore, the size of the substrate can be increased, or a large number of substrates can be processed at one time, which improves the processing efficiency. Further, the large-sized substrate having the thin film transistor having the high uniformity of the film thickness thus configured enables the liquid crystal display device to be upsized and the quality thereof to be improved.

[Brief description of drawings]

FIG. 1 is a plan view showing an embodiment of a method of manufacturing a thin film transistor according to the present invention.

FIG. 2 is a cross-sectional view illustrating a structure of a thin film transistor applied to a liquid crystal display device.

FIG. 3 is a plan view illustrating a method of manufacturing a conventional thin film transistor.

[Explanation of symbols]

 11, 12 Insulating substrate 13 Thin film transistor 31 Discharge electrode

Claims (1)

[Claims] 1. A method of manufacturing a thin film transistor, wherein a predetermined layer of a thin film transistor is formed at a predetermined position on an insulating substrate occupying 50% or more of the area of the discharge electrode by a plasma CVD method, the discharge of high frequency power applied to the discharge electrode. Frequency is 1MHz
To 100 MHz, and the high frequency power is alternately variably set in the range of 0 to 5 KHz, and an ON state and an OFF state are alternately and repeatedly supplied in accordance with an ON time and an OFF time to form a thin film transistor. Production method.