JPH06178593A - Variable speed driver of motor - Google Patents

Abstract

PURPOSE:To reduce the size and the cost by making rectifier, one smoothing capacitor and one CPU common for controlling the position, speed and current of a plurality of motors individually. CONSTITUTION:Two inverters 21 and 22 are installed at the output side of a smoothing capacitor 6. CT's 31 and 32, motors 41 and 42 and PG's 51 and 52 are also installed at the output side of the smoothing capacitor 6 so that they may correspond to the inverters 21 and 22 respectively. Due to this configuration, the inverters 21 and 22 are individually controlled by ACR's 13A and 13B respectively. There is only one CPU 11 for the two ACR's 13A and 13B. In other words, one and the same CPU 11 is made common for controlling and operating the position, speed or torque of each motor individually. By this method, the size and the cost can be reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable speed drive device for an electric motor which drives the electric motor using a VVVF (variable voltage variable frequency) inverter.

[0002]

2. Description of the Related Art FIG. 2 shows a conventional example of this type. In the figure, 1 is a rectifier, 2 is an inverter, 3 is a current transformer (Hall CT), 4 is an electric motor (motor), 5 is a pulse generator (PG), 6 is a smoothing capacitor, 11 is a processing device (CP).
U), 12 is a gate array, 13 is a current control device (AC
R). The gate array 12 includes a plurality of registers provided with addresses (see address lines AD0 to AD14), counts input pulses, temporarily stores count data, and analog / digital (A / D) or vice versa. Not only has functions such as D / A conversion, but also C
It also has a function of controlling the interface with the PU 11. Further, although the gate array 12 is illustrated as an independent device here, the illustration may be omitted by incorporating a function similar to this in the CPU 11.

That is, the gate array 12 counts the number of pulses of the command pulse signals CA and CB and temporarily stores the count data. Therefore, by giving a predetermined address from the CPU 11 via the address lines AD0 to 14, Data can be read out via the data lines D0-7. On the other hand, the encoder 5 connected to the motor 4
Output signals A, B, Z (feedback pulse) of the gate array 1
Since these signals are input to 2, the gate array 12 counts these signals and temporarily stores the count data, so that these data can also be read based on an instruction from the CPU 11.

The CPU 11 executes a predetermined control calculation so that the count data and the count data of the command pulse coincide with each other, and outputs this as speed command data, and at the same time, the speed command data and the count data of the feedback pulse. calculates the speed actual value based on bets, further calculates a torque command value to match the speed actual value and the speed command data, phase current command values i _u from the torque command value ^*, i _v ^* , I _w ^* are calculated. These phase current command values _iu ^* , _iv ^* , and _iw ^* are the gate array 12
Given to the ACR and converted to an analog quantity here
It is output to 13.

In the ACR 13, the output signals i _u , i _v , from the Hall CT 3 for detecting the phase currents of the inverter 2 are detected.
By inputting i _w and outputting a predetermined output so that the detected current value of each phase matches the command value of each phase current, the ON / OFF control of the switching element of each phase of the inverter 2 is performed to obtain a desired output. I am trying to control the current. It should be noted that although the ACR is provided separately here,
The function can be omitted by incorporating it in the CPU 11. Further, since the two-phase pulse signals A and B and the origin position signal Z are inputted via the PG5, the rotation angle (position) and speed can be detected from these signals, and the position control is performed based on this. Of course, speed control is possible.

[0006]

By the way, the variable speed device as described above may cause a demand for operating two or more motors in synchronization with each other. In general, a plurality of variable speed devices, that is, each of the motors is provided with a CPU, a rectifying circuit, and the like to deal with the problem. However, this causes a problem that not only the device becomes large but also the cost becomes high. Therefore, an object of the present invention is to reduce the size of the device and reduce the cost.

[0007]

In order to solve such a problem, the present invention provides a variable voltage variable frequency (VVV).
F) In a variable speed drive device for an electric motor that drives an electric motor using an inverter, two or more inverter main circuits are connected in parallel to the output stage of a DC converter composed of a rectifier and a smoothing capacitor, and an electric motor is connected to each of them. On the other hand, the position of each motor is controlled by using one processing unit as the control circuit.
It is characterized by controlling speed or current independently of each other.

[0008]

In controlling the position, speed or current of a plurality of electric motors, a rectifier, a smoothing capacitor and a CPU
By sharing the above, we aim to reduce size and cost.

[0009]

1 is a block diagram showing an embodiment of the present invention. As is clear from the figure, two inverters 21 and 22 are provided on the output side of the smoothing capacitor 6, and the CTs 31 and 32, the motors 41 and 42, and the PG 5 corresponding to each of them.
1, 52 are provided, and the inverters 21 and 22 are connected to the ACR 13
The feature is that they are individually controlled by A and 13B. In other words, CP for two ACRs 13A and 13B
Only one U is provided, in which the control calculation is independently performed for the position, speed or torque of each axis motor, and the control calculation is performed in common to reduce the size and cost. In this case as well, the ACRs 13A and 13B are provided separately from the CPU 11, but the fact that the functions can be omitted by incorporating them into the CPU 11 is the same as in the conventional case.
Others are the same as in the case of FIG. 2, and thus details are omitted.

[0010]

According to the present invention, a plurality of motors are independently controlled by a single processing unit (CPU), so that there is an advantage that the size and cost of the entire apparatus can be reduced. .

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

FIG. 2 is a configuration diagram showing a conventional example.

[Explanation of symbols]

1 ... Rectifier, 2, 21, 22 ... Inverter, 3, 31,
32 ... Current transformer (Hall CT), 4, 41, 42 ... Motor, 5, 51, 52 ... Pulse generator (PG), 6
... capacitor, 11 ... processing device (CPU), 12 ... gate array, 13, 13A, 13B ... current control device (AC
R).

Claims (1)

[Claims] 1. A variable speed drive apparatus for an electric motor for driving an electric motor using a variable voltage variable frequency (VVVF) inverter, wherein two or more inverter main circuits are connected in parallel to an output stage of a DC converter including a rectifier and a smoothing capacitor. A variable speed drive device for an electric motor, characterized in that while connecting and connecting an electric motor to each of them, one processing device is used as a control circuit to control the position, speed or current of each electric motor independently of each other.