JPH06177681A - High frequency amplifier - Google Patents

High frequency amplifier

Info

Publication number
JPH06177681A
JPH06177681A JP4321545A JP32154592A JPH06177681A JP H06177681 A JPH06177681 A JP H06177681A JP 4321545 A JP4321545 A JP 4321545A JP 32154592 A JP32154592 A JP 32154592A JP H06177681 A JPH06177681 A JP H06177681A
Authority
JP
Japan
Prior art keywords
output
amplifier
input
level
envelope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4321545A
Other languages
Japanese (ja)
Inventor
Masahiro Muraguchi
正弘 村口
Masayoshi Aikawa
正義 相川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP4321545A priority Critical patent/JPH06177681A/en
Publication of JPH06177681A publication Critical patent/JPH06177681A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To attain linear amplification in which the output is proportional to the input of an amplifier while the amplifier is operated at a saturation region offering an excellent efficiency by changing a control voltage so that a saturation output is changed with a change in an input amplitude. CONSTITUTION:An amplifier is provided with an amplifier means 5 receiving a modulation wave as its input signal, an envelope signal detection means 2 detecting an envelope signal of the modulation wave, and a conversion means 3 converting a level of the detected envelope signal, and the amplifier 5 is made up of an amplifier circuit employing a cascode amplifier element in which a drain of a common source FET and a source of a common gate FET are connected directly to each other. An output of the level conversion means 3 is inputted to the gate of the common gate FET of the cascode amplifier element, an output of the amplifier means 5 is increased when the envelope level of the input signal is high and the output of the amplifier means 5 is decreased when the envelope level of the input signal is low to keep a level ratio of the input and the output almost constant.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、高周波通信装置に用い
る高周波増幅装置に関し、特に、帯域制限されたディジ
タル信号の高効率増幅を可能にする高周波増幅装置に係
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency amplifying device used in a high frequency communication device, and more particularly to a high frequency amplifying device which enables highly efficient amplification of a band-limited digital signal.

【0002】[0002]

【従来の技術】ディジタル通信において隣接チャンネル
の干渉妨害を防ぐために帯域制限を行なった位相変調を
採用した場合、変調信号は一定振幅とはならず振幅が変
化する。このような変調信号を増幅する場合、飽和形増
幅器を用いたのではその非線形性のために振幅変化が圧
縮されて出力されるため変調信号スペクトラムが広が
り、隣接チャンネルに電力が漏洩するという問題が生じ
る。
2. Description of the Related Art In digital communication, when phase modulation in which band limitation is performed in order to prevent interference of adjacent channels is adopted, the modulation signal does not have a constant amplitude but the amplitude changes. In the case of amplifying such a modulation signal, if a saturation type amplifier is used, the amplitude change is compressed and output due to its non-linearity, so that the modulation signal spectrum spreads and power leaks to adjacent channels. Occurs.

【0003】従って、帯域制限を行なった位相変調信号
を増幅するには、入力の振幅の変化(包絡線)に対して
出力の振幅変化が忠実に追随する線形増幅器が必要であ
る。この線形増幅器は、増幅器をA級バイアスで線形領
域(小信号領域)で動作させることで得られる。
Therefore, in order to amplify the band-limited phase-modulated signal, it is necessary to use a linear amplifier in which the change in the amplitude of the output faithfully follows the change in the amplitude (envelope) of the input. This linear amplifier is obtained by operating the amplifier with a class A bias in the linear region (small signal region).

【0004】A級増幅器の入力に対する出力および効率
の変化を図2に示す。線形領域では出力が入力に比例し
て変化しており、線形増幅を示す。しかしこの領域は、
出力が入力に比例して増加しない飽和領域と比較して、
効率が極端に悪いことが分かる。このように増幅器を線
形領域で動作させる線形増幅器は、飽和領域で動作させ
る飽和形増幅器と比較して効率が悪い。
The change in output and efficiency with respect to the input of a class A amplifier is shown in FIG. In the linear region, the output changes in proportion to the input, indicating linear amplification. But this area is
Compared to the saturation region where the output does not increase in proportion to the input,
It turns out that the efficiency is extremely poor. Thus, the linear amplifier that operates the amplifier in the linear region is inefficient as compared with the saturated amplifier that operates in the saturation region.

【0005】移動通信用の携帯電話機(以下、携帯機と
も言う)の高周波回路は低消費電力であることが必要で
あり、特に送信用増幅器は携帯機の消費電力の大部分を
占めているため効率向上は必須の条件である。
A high frequency circuit of a mobile phone for mobile communication (hereinafter, also referred to as a portable device) needs to have low power consumption, and particularly, a transmission amplifier occupies most of the power consumption of the portable device. Efficiency improvement is an essential condition.

【0006】従来のアナログ方式移動通信の携帯機で
は、飽和形増幅器を使用できるため増幅器の効率を例え
ば60%にすることも可能であった。ところが帯域制限
された位相変調を用いるディジタル方式移動通信の携帯
機では、前記のように線形増幅が要求されるため低効率
となってしまうという問題があった。例えば、線形領域
を用いた増幅器の場合、効率は通常30%程度となる。
In a conventional portable device of analog type mobile communication, a saturation type amplifier can be used, so that the efficiency of the amplifier can be set to, for example, 60%. However, the portable device of the digital mobile communication using the band-limited phase modulation has a problem that the efficiency is low because the linear amplification is required as described above. For example, in the case of an amplifier using the linear region, the efficiency is usually about 30%.

【0007】そこで、効率の高い飽和形増幅器を用いな
がら、スペクトラムの広がりを抑圧し、帯域制限された
位相変調信号を増幅する試みがなされている。この原理
は、増幅器の飽和出力を入力振幅の変化(包絡線)に応
じて変化するように制御させることにあり、制御をうま
く行なえば増幅器を常に効率の良い飽和領域で動作させ
ながら、入力に対して出力が比例する線形増幅を得るこ
とができる。
Therefore, an attempt has been made to suppress the spread of the spectrum and amplify the band-limited phase-modulated signal while using a highly efficient saturated amplifier. The principle is to control the saturation output of the amplifier so that it changes according to the change (envelope) of the input amplitude. If the control is done well, the amplifier will always operate in the efficient saturation region and the input In contrast, a linear amplification whose output is proportional can be obtained.

【0008】これを実現する従来技術を図4に示す。
(この増幅器の詳細は、特開昭62−274906号公
報に開示されている。)同図において、41は入力端
子、42は信号分配手段、43は包絡線信号検出手段、
44はドレインバイアス用電源、45は直流電圧(電
流)変換手段、46は増幅手段、46aは入力回路、4
6bはFET、46cは出力回路、47は出力端子を表
わしている。
A conventional technique for realizing this is shown in FIG.
(Details of this amplifier are disclosed in Japanese Patent Laid-Open No. 62-274906.) In the figure, 41 is an input terminal, 42 is a signal distributing means, 43 is an envelope signal detecting means,
44 is a drain bias power supply, 45 is a DC voltage (current) conversion means, 46 is amplification means, 46a is an input circuit, 4
6b is an FET, 46c is an output circuit, and 47 is an output terminal.

【0009】そして、この増幅手段の飽和出力を変化さ
せるためにソース接地FET46bのドレイン電圧を変
化させていた。
The drain voltage of the source-grounded FET 46b is changed in order to change the saturation output of the amplifying means.

【0010】[0010]

【発明が解決しようとする課題】上述したように、従来
の技術では増幅器の飽和出力を変化させるために、ソー
ス接地FETのドレイン電圧を変化させていた。このよ
うな従来の技術には次のような好ましくない点があっ
た。即ち、高出力FETのドレインバイアスは大電流を
伴うため、印加電圧を変化させるには可変出力の電源回
路が必要となる。
As described above, in the conventional technique, the drain voltage of the source-grounded FET is changed in order to change the saturation output of the amplifier. Such conventional techniques have the following disadvantages. That is, since the drain bias of the high output FET is accompanied by a large current, a variable output power supply circuit is required to change the applied voltage.

【0011】高効率な可変出力電源回路としては、出力
可変のDC−DCコンバータがあるが、DC−DCコン
バータの場合においても電力変換効率は100%とはな
らないため、この効率も含めて総合効率を考えた場合、
大きな効率改善手段とはならなかった。
As a highly efficient variable output power supply circuit, there is a variable output DC-DC converter. However, even in the case of a DC-DC converter, the power conversion efficiency does not reach 100%. If you consider
It did not become a big efficiency improvement tool.

【0012】例えば、増幅器の効率が60%であって
も、可変出力DC−DCコンバータの電力変換効率が7
0%ならば総合効率42%となる。また、DC−DCコ
ンバータはトランス、キャパシタ等のハイブリッド部品
を必要とするため、これが薄型化・小型化の障害となっ
ていた。
For example, even if the efficiency of the amplifier is 60%, the power conversion efficiency of the variable output DC-DC converter is 7%.
If it is 0%, the total efficiency will be 42%. Further, the DC-DC converter requires hybrid parts such as a transformer and a capacitor, which has been an obstacle to thinning and downsizing.

【0013】本発明は、このような従来の問題点を解決
するため成されたもので、帯域制限された位相変調等の
ディジタル信号を高効率で増幅する超小型の高周波増幅
装置を実現することを目的としている。
The present invention has been made in order to solve such a conventional problem, and realizes a microminiature high-frequency amplifier which amplifies a digital signal such as band-limited phase modulation with high efficiency. It is an object.

【0014】[0014]

【課題を解決するための手段】本発明によれば、前述の
問題点は前記特許請求の範囲に記載した手段により解決
される。
According to the invention, the aforesaid problems are solved by the means defined in the claims.

【0015】すなわち、請求項1の発明は、変調波を入
力信号とする増幅手段と、前記変調波の包絡線信号を検
出する包絡線信号検出手段と、検出した包絡線信号のレ
ベル変換手段を備えており、前記増幅手段はソース接地
型FETのドレイン端子とゲート接地型FETのソース
端子を互いに直接接続したカスコード増幅素子を用いた
増幅回路からなり、前記レベル変換手段の出力をカスコ
ード増幅素子のゲート接地型FETのゲートに入力し、
前記入力信号の包絡線レベルが高い場合は前記増幅手段
の出力を上昇せしめ、前記入力信号の包絡線レベルが低
い場合には前記増幅手段の出力を低下せしめて、入力と
出力のレベル比をほぼ一定に保つようにしたことを特徴
とする高周波増幅装置である。また請求項2の発明は、
請求項1の発明におけるFETをバイポーラトランジス
タに置き替えたものである。
That is, the invention of claim 1 comprises an amplifying means for inputting a modulated wave as an input signal, an envelope signal detecting means for detecting an envelope signal of the modulated wave, and a level converting means for the detected envelope signal. The amplification means comprises an amplification circuit using a cascode amplification element in which the drain terminal of the source-grounded FET and the source terminal of the gate-grounded FET are directly connected to each other, and the output of the level conversion means is the output of the cascode amplification element. Input to the gate of the grounded-gate FET,
When the envelope level of the input signal is high, the output of the amplifying means is increased, and when the envelope level of the input signal is low, the output of the amplifying means is decreased, so that the level ratio between the input and the output is almost equal. It is a high-frequency amplification device characterized by being kept constant. The invention of claim 2 is
The FET in the invention of claim 1 is replaced with a bipolar transistor.

【0016】[0016]

【作用】本発明の高周波増幅装置は、カスコード増幅素
子を用いた増幅回路のゲート接地FETのゲート端子、
または、ベース接地バイポーラトランジスタを用いた場
合はベース端子(以下制御端子とも言う)の電圧V
c (以下制御電圧Vc とも言う)を変化させた時に飽和
出力が変化することを利用し、入力振幅の変化(包絡
線)に応じて飽和出力が変化するように制御電圧Vc
変化させることにより、増幅器を常に効率の良い飽和領
域で動作させながら、入力に対して出力が比例する線形
増幅を達成する。
The high frequency amplifying device of the present invention is a gate terminal of a grounded-gate FET of an amplifying circuit using a cascode amplifying element,
Alternatively, when a grounded base bipolar transistor is used, the voltage V of the base terminal (hereinafter also referred to as the control terminal)
By utilizing the fact that the saturation output changes when c (hereinafter also referred to as the control voltage V c ) is changed, the control voltage V c is changed so that the saturation output changes according to the change (envelope) of the input amplitude. This allows the amplifier to always operate in the efficient saturation region while achieving linear amplification with output proportional to input.

【0017】[0017]

【実施例】図1に本発明の一実施例の構成をブロック図
で示す。本実施例は信号分配手段1、包絡線信号検出手
段2、レベル変換手段3、ドレインバイアス用電源4、
および、ソース接地型FET5bのドレイン端子とゲー
ト接地型FET5cのソース端子を互いに直接接続した
カスコード増幅素子を用い入力回路5aおよび出力回路
5dを有する増幅手段5で構成されている。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In this embodiment, the signal distribution unit 1, the envelope signal detection unit 2, the level conversion unit 3, the drain bias power supply 4,
Also, the cascode amplifying element in which the drain terminal of the source-grounded FET 5b and the source terminal of the gate-grounded FET 5c are directly connected to each other is used to constitute the amplification means 5 having the input circuit 5a and the output circuit 5d.

【0018】また、同図において、6は入力端子、7は
出力端子を表わしている。信号分配手段1は変調波を分
配する機能を有しており、簡易な方法ではキャパシタに
よる容量性結合で信号を分配することが可能である。若
し、分配端子間のアイソレーションが必要ならば方向性
結合器を用いても良い。 包絡線信号検出手段は分配さ
れた変調波の包絡線信号を検出する目的で使用し、通常
はダイオード検波回路を用いる。レベル変換手段は検波
により得られた包絡線信号のレベルを調整し、所望の飽
和出力に応じた制御電圧Vc を出力する。カスコード増
幅素子の制御電圧Vc を変化させたときの出力および効
率特性の測定値を図3に示す。
In the figure, 6 is an input terminal and 7 is an output terminal. The signal distribution unit 1 has a function of distributing the modulated wave, and can distribute the signal by capacitive coupling with a capacitor by a simple method. If isolation between distribution terminals is required, a directional coupler may be used. The envelope signal detecting means is used for the purpose of detecting the envelope signal of the distributed modulated wave, and usually a diode detection circuit is used. The level converting means adjusts the level of the envelope signal obtained by the detection, and outputs the control voltage V c according to the desired saturation output. FIG. 3 shows measured values of output and efficiency characteristics when the control voltage V c of the cascode amplifier element is changed.

【0019】同図において、制御電圧Vc を負の方向に
制御すると飽和出力が減少することが分かる。本発明を
FETで実現した場合、電流を必要としない電圧のみの
制御が可能であり、レベル変換手段での消費電力は増幅
手段の消費電力と比較して無視できる程度小さくでき
る。また、本発明をバイポーラトランジスタで実現した
場合でも、ベース電流はコレクタ電流と比較して十分小
さいので本発明の優位性は損なわれない。
In the figure, it can be seen that the saturation output decreases when the control voltage V c is controlled in the negative direction. When the present invention is realized by the FET, only the voltage that does not require current can be controlled, and the power consumption of the level conversion means can be made negligibly small as compared with the power consumption of the amplification means. Even when the present invention is implemented by a bipolar transistor, the base current is sufficiently smaller than the collector current, so that the superiority of the present invention is not impaired.

【0020】本発明の増幅装置ではドレインバイアス用
電源の出力が100%増幅装置に入力されるため、従来
例の様に電源効率による総合効率の劣化はない。図3に
示す特性のカスコード増幅素子を用いた本発明の増幅装
置で、変調信号のピークファクタが3dBであると仮定
すると50%程度の効率を期待できる。
In the amplifying device of the present invention, the output of the drain bias power supply is input to the amplifying device 100%, so that there is no deterioration of the total efficiency due to the power supply efficiency as in the conventional example. In the amplifying apparatus of the present invention using the cascode amplifying element having the characteristic shown in FIG. 3, assuming that the peak factor of the modulation signal is 3 dB, an efficiency of about 50% can be expected.

【0021】[0021]

【発明の効果】以上説明したように、本発明の増幅装置
を用いれば、帯域制限された位相変調等のディジタル信
号を高効率で増幅することが可能で、ディジタル方式の
携帯機の通話時間を延ばすことができる。
As described above, by using the amplifying device of the present invention, it is possible to amplify a band-limited digital signal such as phase modulation with high efficiency and reduce the talk time of a digital portable device. It can be postponed.

【0022】また、カスコード増幅素子を用いた本発明
の増幅器は、1段増幅器でソース接地FETを用いた2
段増幅器とほぼ同等の利得が得られるため多段増幅器の
段数を半減できるから増幅器自体の小型化を図ることが
できるとともに、電流を伴わない電圧制御で出力制御が
できるので制御回路の小型化・簡易化・高効率化も可能
となる利点がある。
Further, the amplifier of the present invention using the cascode amplifying element is a single-stage amplifier which uses a source-grounded FET.
Since the gain is almost the same as that of the stage amplifier, the number of stages of the multistage amplifier can be reduced by half, so that the amplifier itself can be downsized, and the output control can be performed by voltage control without current, so the control circuit can be downsized and simplified. There is an advantage that higher efficiency and higher efficiency are possible.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing an embodiment of the present invention.

【図2】A級バイアス条件で動作させた増幅器の入出力
特性と効率特性を示す図である。
FIG. 2 is a diagram showing input / output characteristics and efficiency characteristics of an amplifier operated under a class A bias condition.

【図3】コスコード増幅素子の出力および効率の制御電
圧依存性を示す図である。
FIG. 3 is a diagram showing control voltage dependence of output and efficiency of a coscode amplifier element.

【図4】従来の増幅装置の例を示すブロック図である。FIG. 4 is a block diagram showing an example of a conventional amplification device.

【符号の説明】[Explanation of symbols]

1,42 信号分配手段 2,43 包絡線信号検出手段 3 レベル変換手段 4,44 ドレインバイアス用電源 5,46 増幅手段 5a,46a 入力回路 5b,5c,46b FET 5d,46c 出力回路 6,41 入力端子 7,47 出力端子 45 直流電圧(電流)変換手段 1,42 Signal distribution means 2,43 Envelope signal detection means 3 Level conversion means 4,44 Drain bias power source 5,46 Amplification means 5a, 46a Input circuit 5b, 5c, 46b FET 5d, 46c Output circuit 6,41 input Terminal 7,47 Output terminal 45 DC voltage (current) conversion means

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 変調波を入力信号とする増幅手段と、 前記変調波の包絡線信号を検出する包絡線信号検出手段
と、 検出した包絡線信号のレベル変換手段を具備し、 前記増幅手段はソース接地型FETのドレイン端子とゲ
ート接地型FETのソース端子を互いに直接接続したカ
スコード増幅素子を用いた増幅回路からなり、 前記レベル変換手段の出力をカスコード増幅素子のゲー
ト接地型FETのゲートに入力し、 前記入力信号の包絡線レベルが高い場合は前記増幅手段
の出力を上昇せしめ、 一方、前記入力信号の包絡線レベルが低い場合には前記
増幅手段の出力を低下せしめて、 入力と出力のレベル比をほぼ一定に保つようにしたこと
を特徴とする高周波増幅装置。
1. An amplifying means for inputting a modulated wave, an envelope signal detecting means for detecting an envelope signal of the modulated wave, and a level converting means for the detected envelope signal, the amplifying means comprising: An amplifier circuit using a cascode amplifier element in which the drain terminal of the source-grounded FET and the source terminal of the gate-grounded FET are directly connected to each other, and the output of the level conversion means is input to the gate of the gate-grounded FET of the cascode amplifier element. However, when the envelope level of the input signal is high, the output of the amplifying means is increased, while when the envelope level of the input signal is low, the output of the amplifying means is decreased to reduce the input and output. A high frequency amplifying device characterized in that the level ratio is kept substantially constant.
【請求項2】 変調波を入力信号とする増幅手段と、 前記変調波の包絡線信号を検出する包絡線信号検出手段
と、 検出した包絡線信号のレベル変換手段を具備し、 前記増幅手段はエミッタ接地型バイポーラトランジスタ
のコレクタ端子とベース接地型バイポーラトランジスタ
のエミッタ端子を互いに直接接続したカスコード増幅素
子を用いた増幅回路からなり、 前記レベル変換手段の出力をカスコード増幅素子のベー
ス接地型バイポーラトランジスタのベースに入力し、 前記入力信号の包絡線レベルが高い場合は前記増幅手段
の出力を上昇せしめ、一方、前記入力信号の包絡線レベ
ルが低い場合には前記増幅手段の出力を低下せしめて、
入力と出力のレベル比をほぼ一定に保つようにしたこと
を特徴とする高周波増幅装置。
2. An amplifying means for inputting a modulated wave, an envelope signal detecting means for detecting an envelope signal of the modulated wave, and a level converting means for the detected envelope signal, wherein the amplifying means An amplifier circuit using a cascode amplifier element in which the collector terminal of the grounded-emitter bipolar transistor and the emitter terminal of the grounded-base bipolar transistor are directly connected to each other, and the output of the level converting means is the base-grounded bipolar transistor of the cascode amplifier element. When input to the base, if the envelope level of the input signal is high, the output of the amplifying means is increased, while if the envelope level of the input signal is low, the output of the amplifying means is decreased,
A high frequency amplifying device characterized in that the level ratio of input and output is kept substantially constant.
JP4321545A 1992-12-01 1992-12-01 High frequency amplifier Pending JPH06177681A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4321545A JPH06177681A (en) 1992-12-01 1992-12-01 High frequency amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4321545A JPH06177681A (en) 1992-12-01 1992-12-01 High frequency amplifier

Publications (1)

Publication Number Publication Date
JPH06177681A true JPH06177681A (en) 1994-06-24

Family

ID=18133760

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4321545A Pending JPH06177681A (en) 1992-12-01 1992-12-01 High frequency amplifier

Country Status (1)

Country Link
JP (1) JPH06177681A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6184728B1 (en) 1998-11-05 2001-02-06 Nec Corporation Output circuit
EP1524763A1 (en) * 2003-10-14 2005-04-20 Broadcom Corporation Modulation dependent biasing for efficient and high-linearity power amplifiers
JP2006005839A (en) * 2004-06-21 2006-01-05 Samsung Electronics Co Ltd Amplifier
KR100801872B1 (en) * 2006-10-30 2008-02-11 지씨티 세미컨덕터 인코포레이티드 Low noise amplifier with improved linearity

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5648117B2 (en) * 1977-04-22 1981-11-13
JPS59231908A (en) * 1983-06-15 1984-12-26 Nec Corp Gain control circuit
JPS62122307A (en) * 1985-08-28 1987-06-03 Toshiba Corp Gain control amplifier circuit
JPS63185211A (en) * 1987-01-28 1988-07-30 Toshiba Corp Monolithic microwave amplifier
JPH01198817A (en) * 1988-02-03 1989-08-10 Nippon Telegr & Teleph Corp <Ntt> Field effect transistor amplifier
JPH03104422A (en) * 1989-09-19 1991-05-01 Nippon Telegr & Teleph Corp <Ntt> Linear transmission equipment
JPH04119707A (en) * 1990-09-10 1992-04-21 Uchu Tsushin Kiso Gijutsu Kenkyusho:Kk High efficiency amplifier

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5648117B2 (en) * 1977-04-22 1981-11-13
JPS59231908A (en) * 1983-06-15 1984-12-26 Nec Corp Gain control circuit
JPS62122307A (en) * 1985-08-28 1987-06-03 Toshiba Corp Gain control amplifier circuit
JPS63185211A (en) * 1987-01-28 1988-07-30 Toshiba Corp Monolithic microwave amplifier
JPH01198817A (en) * 1988-02-03 1989-08-10 Nippon Telegr & Teleph Corp <Ntt> Field effect transistor amplifier
JPH03104422A (en) * 1989-09-19 1991-05-01 Nippon Telegr & Teleph Corp <Ntt> Linear transmission equipment
JPH04119707A (en) * 1990-09-10 1992-04-21 Uchu Tsushin Kiso Gijutsu Kenkyusho:Kk High efficiency amplifier

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6184728B1 (en) 1998-11-05 2001-02-06 Nec Corporation Output circuit
EP1524763A1 (en) * 2003-10-14 2005-04-20 Broadcom Corporation Modulation dependent biasing for efficient and high-linearity power amplifiers
JP2006005839A (en) * 2004-06-21 2006-01-05 Samsung Electronics Co Ltd Amplifier
KR100801872B1 (en) * 2006-10-30 2008-02-11 지씨티 세미컨덕터 인코포레이티드 Low noise amplifier with improved linearity

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