JPH03104422A - Linear transmission equipment - Google Patents

Linear transmission equipment

Info

Publication number
JPH03104422A
JPH03104422A JP1242465A JP24246589A JPH03104422A JP H03104422 A JPH03104422 A JP H03104422A JP 1242465 A JP1242465 A JP 1242465A JP 24246589 A JP24246589 A JP 24246589A JP H03104422 A JPH03104422 A JP H03104422A
Authority
JP
Japan
Prior art keywords
signal
voltage control
control circuit
frequency
envelope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1242465A
Other languages
Japanese (ja)
Other versions
JPH0654877B2 (en
Inventor
Koji Chiba
千葉 耕司
Toshio Nojima
俊雄 野島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP1242465A priority Critical patent/JPH0654877B2/en
Priority to EP90909852A priority patent/EP0431201B1/en
Priority to CA002035455A priority patent/CA2035455C/en
Priority to PCT/JP1990/000838 priority patent/WO1991000653A1/en
Priority to US07/651,375 priority patent/US5251330A/en
Priority to DE69024182T priority patent/DE69024182T2/en
Publication of JPH03104422A publication Critical patent/JPH03104422A/en
Publication of JPH0654877B2 publication Critical patent/JPH0654877B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0211Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
    • H03F1/0216Continuous control
    • H03F1/0222Continuous control by using a signal derived from the input signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3223Modifications of amplifiers to reduce non-linear distortion using feed-forward
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02Transmitters
    • H04B1/04Circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02Transmitters
    • H04B1/04Circuits
    • H04B2001/0408Circuits with power amplifiers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02Transmitters
    • H04B1/04Circuits
    • H04B2001/0408Circuits with power amplifiers
    • H04B2001/0441Circuits with power amplifiers with linearisation using feed-forward

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Transmitters (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Amplifiers (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To amplify a high speed modulation signal by using a saturation type power amplifier to constitute a linear transmission equipment applying power voltage control of an amplifier, and applying frequency equalization to an input signal of a DC voltage control circuit. CONSTITUTION:A frequency equalization circuit 10 connected between a correction circuit 6 and a DC voltage control circuit 7, receiving an envelope signal, applying amplitude and phase equalization of a signal taking an envelope signal as a variable and inputting its output signal to the DC voltage control circuit 7 is provided. The equalizing signal is inputted to the DC voltage control circuit 7 and the frequency characteristic of the DC voltage control circuit 7 has an improved high frequency characteristic, and its cut-off frequency reaches >=50kHz. Since the drain voltage VD of the power amplifier 4 is controlled with the output voltage of the improved DC voltage control circuit 7, high speed modulation signal is amplified.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は線形送信装置に利用され、特に、変調によって
包絡線が変化する変調波信号を高効率で増幅する電力増
幅器を含む線形送信装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention is applied to a linear transmitter, and particularly relates to a linear transmitter including a power amplifier that amplifies with high efficiency a modulated wave signal whose envelope changes due to modulation. .

〔従来の技術〕[Conventional technology]

従来、線形送信装置に用いられる電カ増幅器の動作クラ
スは八級ないしはAB級が用いられる。
Conventionally, the operating class of power amplifiers used in linear transmitters is class 8 or class AB.

これは、電力増幅器への入力信号の全周期がそのまま出
力信号に増幅されるように、半導体増幅素子のバイアス
を設定することにより線形性を維持している。しかし、
入力信号の包絡線が小さい場合、電力増幅器の電力効率
が低下する欠点があった。このため電池を電力源とする
携帯形の無線機においては、電池の消耗が大きく無線機
の使用時間が短くなる欠点があった。
This maintains linearity by setting the bias of the semiconductor amplification element so that the entire cycle of the input signal to the power amplifier is directly amplified into the output signal. but,
When the envelope of the input signal is small, the power efficiency of the power amplifier decreases. For this reason, portable radio devices that use batteries as a power source have the disadvantage that the batteries are consumed significantly and the operating time of the radio device is shortened.

この問題を解決するため、高効率の線形送信装置を実現
する装置構戊の検討が行われている。
In order to solve this problem, studies are being conducted on device structures that realize highly efficient linear transmitting devices.

第9図はかかる線形送信装置の一例を示すブロック構或
図で、特願昭61−118786号等で示されたドレイ
ン制御形高効率電力増幅器を用いたものである。
FIG. 9 is a block diagram showing an example of such a linear transmitter, which uses a drain-controlled high-efficiency power amplifier disclosed in Japanese Patent Application No. 118786/1986.

第9図において、1は変調入力端子、2は変調器、3は
結合器、4は飽和形の電力増幅器、5は包絡線検波器、
6は補正回路、7は直流電圧制御回路、8は電源端子お
よび9は送信出力端子である。そして、電力増幅器4は
、入力整合回路41、半導体増幅素子としての電界効果
トランジスタ42、高周波阻止用のコイル43および出
力整合回路44を含んでいる。
In FIG. 9, 1 is a modulation input terminal, 2 is a modulator, 3 is a coupler, 4 is a saturation type power amplifier, 5 is an envelope detector,
6 is a correction circuit, 7 is a DC voltage control circuit, 8 is a power supply terminal, and 9 is a transmission output terminal. The power amplifier 4 includes an input matching circuit 41, a field effect transistor 42 as a semiconductor amplification element, a high frequency blocking coil 43, and an output matching circuit 44.

次に、本従来例の動作について説明する。変調人力端子
lから入力された変調情報(アナログ信号、ディジタル
信号〉により、変調器2で線形変調波信号を発生し、こ
れで増幅する。このとき、電界効果トランジスタ42の
ドレインバイアス電圧Vnを入力信号の包絡線にほぼ比
例して制御することにより、電力増幅器4の包絡出力レ
ベルを人力信号の包絡線に追従させる。このような制御
によって、電力増幅器4を高効率の飽和状態に保ったま
ま線形増幅器として動作させることができるので、出力
の歪を著しく逓減させることができる。
Next, the operation of this conventional example will be explained. Based on the modulation information (analog signal, digital signal) input from the modulation terminal l, a linear modulation wave signal is generated in the modulator 2 and amplified.At this time, the drain bias voltage Vn of the field effect transistor 42 is input. The envelope output level of the power amplifier 4 is made to follow the envelope of the human input signal by controlling it in approximately proportion to the envelope of the signal.With such control, the power amplifier 4 can be kept in a highly efficient saturated state. Since it can be operated as a linear amplifier, output distortion can be significantly reduced.

かつ、電力増幅器4は入力電力の小さいときでもドレイ
ン電圧を可変し、増幅器をほどんど飽和状態でドレイン
させるので、電力効率が大きく劣化することがない。
In addition, since the power amplifier 4 varies the drain voltage even when the input power is small and drains the amplifier almost in a saturated state, the power efficiency does not deteriorate significantly.

このドレイン制御1言号Vcは、変調波信号の包絡線信
号をダイオード等で構威される包絡線検波器5で検出し
、検出信号と制御信号とのレベルシフト等を行う補正回
路6で少し補正を施すことにより得ており、これをDC
−DCコンバータあるきはシリーズ制御トランジスタよ
りなる直流電圧制御回路7を用いて電力増幅器4のドレ
インバイアス端子に加えている。
This drain control 1 word Vc is generated by a correction circuit 6 which detects the envelope signal of the modulated wave signal with an envelope detector 5 composed of a diode or the like, and performs a level shift between the detection signal and the control signal. It is obtained by applying correction, and this is converted to DC
- The voltage is applied to the drain bias terminal of the power amplifier 4 using a DC converter or, if necessary, a DC voltage control circuit 7 consisting of a series control transistor.

本従来例によれば、高効率の飽和形の電力増幅器による
線形送信装置が実現できる。例えば、電力増幅器4に電
力効率70%の飽和形増幅器を用い、直流電圧制御回路
7に電力効率75%のDC−DCコンバータを使用すれ
ば、総合効率50%以上の線形送信装置が実現できる。
According to this conventional example, a linear transmitter using a highly efficient saturated power amplifier can be realized. For example, if a saturated amplifier with a power efficiency of 70% is used as the power amplifier 4 and a DC-DC converter with a power efficiency of 75% is used in the DC voltage control circuit 7, a linear transmitter with an overall efficiency of 50% or more can be realized.

直流電圧制御回路7として、こでは、DC−DCコンバ
ータあるいはシリーズ制御トランジスタを例にあげた。
Here, as the DC voltage control circuit 7, a DC-DC converter or a series control transistor is taken as an example.

その他には通常S級増幅器と呼ばれるパルス幅変調を使
った直流電圧制御回路が適用できる。動作原理が極めて
似ているものに、降圧形のDC−DCコンバータやスイ
ッチングレギュレー夕がある。
In addition, a DC voltage control circuit using pulse width modulation, which is usually called a class S amplifier, can be applied. Step-down DC-DC converters and switching regulators have extremely similar operating principles.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、以上説明した従来の線形送信装置において、通
常、直流電圧制御回路7は、入力電圧に対し一定の出力
を得るため、極めて低い周波数を増幅し、入出力の遮断
周波数は非常に小さ< 10KHz程度である。よって
、この遮断周波数より高い周波数で変動する変調波信号
の増幅器においては、直流電圧制御回路7は変調波信号
の変化に追随できない。その結果出力には歪みが発生す
る。例えば、スイッチングレギュレー夕の周波数特性は
レギュレー夕内の制御用スイッチ周波数やフィルタなど
に依存する。この周波数特性を改羞するためには制御用
スイッチ周波数を高くすればよいが、スイッチであるト
ランジスタやダイオードのスイッチング特性により高々
500KHz程度である。このため十分な周波数特性を
得ることが困難であり、その結果変調周波数の高い変調
波信号に対しては十分な線型送信装置を実現できない欠
点があった。
However, in the conventional linear transmitter described above, the DC voltage control circuit 7 usually amplifies extremely low frequencies in order to obtain a constant output with respect to the input voltage, and the input/output cutoff frequency is extremely small < 10 KHz. That's about it. Therefore, in an amplifier for a modulated wave signal that fluctuates at a frequency higher than this cutoff frequency, the DC voltage control circuit 7 cannot follow changes in the modulated wave signal. As a result, distortion occurs in the output. For example, the frequency characteristics of a switching regulator depend on the control switch frequency, filter, etc. within the regulator. In order to modify this frequency characteristic, the frequency of the control switch may be increased, but the frequency is about 500 KHz at most, depending on the switching characteristics of the transistors and diodes that are the switches. For this reason, it is difficult to obtain sufficient frequency characteristics, and as a result, a sufficient linear transmitter cannot be realized for a modulated wave signal with a high modulation frequency.

本発明の目的は、前記の欠点を除去することにより、従
来の直流電圧制御回路を用い、簡易な構戊で等価的に入
出力の周波数特性を広帯域化した線形送信装置を提供す
ることにある。
An object of the present invention is to provide a linear transmitter that uses a conventional DC voltage control circuit and equivalently widens the input/output frequency characteristics with a simple structure by eliminating the above-mentioned drawbacks. .

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、変調情報信号を入力して変調波信号とその包
絡線信号とを生成出力する変調手段と、前記変調波信号
を入力信号とする半導体増幅素子を含む高周波増幅器と
、前記包絡線信号を変数とする信号に従って前記高周波
増幅器の電源端子に印加される直流電源電圧を制御する
直流電圧制御回路とを備えた線形送信装置において、前
記変調手段と前記直流電圧制御回路との間に接続され、
前記包絡線信号を入力して前記包絡線信号を変数とする
信号の振幅および位相等化を行いその出力信号を前記直
流電圧制御回路に入力する周波数等化回路を備えたこと
を特徴とする。
The present invention provides a modulation means for generating and outputting a modulated wave signal and its envelope signal by inputting a modulated information signal, a high frequency amplifier including a semiconductor amplifying element that receives the modulated wave signal as an input signal, and a high frequency amplifier for generating and outputting a modulated wave signal and its envelope signal. and a DC voltage control circuit that controls a DC power supply voltage applied to the power supply terminal of the high frequency amplifier according to a signal having a variable of . ,
The present invention is characterized in that it includes a frequency equalization circuit that inputs the envelope signal, equalizes the amplitude and phase of the signal using the envelope signal as a variable, and inputs the output signal to the DC voltage control circuit.

また、本発明は前記変調手段からの前記変調信号および
前記包絡線信号のいずれか一方を遅延する遅延回路を備
えることができる。
Further, the present invention may include a delay circuit that delays either the modulation signal or the envelope signal from the modulation means.

〔作用〕[Effect]

周波数等化回路は、変調手段からの包絡線信号を入力し
て、前記包絡線信号を変数とする信号の振幅および位相
等化を行いその出力信号を直流電圧制御回路に入力する
The frequency equalization circuit inputs the envelope signal from the modulation means, equalizes the amplitude and phase of the signal using the envelope signal as a variable, and inputs the output signal to the DC voltage control circuit.

従って、前記直流電圧制御回路の周波数特性は、この周
波数等化回路により広帯域化が図られ、結果として、変
調周波数の高い変調波信号に対しても十分に特性を満足
することが可能となる。
Therefore, the frequency characteristics of the DC voltage control circuit are widened by the frequency equalization circuit, and as a result, it becomes possible to sufficiently satisfy the characteristics even for a modulated wave signal with a high modulation frequency.

〔実施例〕〔Example〕

以下、本発明の実施例について図面を参照して説明する
Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の第一実施例を示すブロック構或図およ
び第2図はその周波数等化回路の一例を示す回路図であ
る。
FIG. 1 is a block diagram showing a first embodiment of the present invention, and FIG. 2 is a circuit diagram showing an example of a frequency equalization circuit thereof.

本第一実施例は、変調入力端子1より変調情報信号を入
力して変調波信号とその包絡線信号とを生戒出力する変
調手段としての変調器2、結合器3、包絡線検波器5お
よび補正回路6と、前記変調波信号を人力信号とする半
導体増幅素子としての電界効果トランジスタ42、入力
整合回路41、高周波阻止用のコイル43および出力整
合回路44を含む高周波増幅器としての飽和形の電力増
幅器4と、前記包絡線信号を変数とする信号に従って電
力増幅器4の電源端子に印加される電源端子8からの供
給直流電源電圧を制御する直流電圧制御回路7とを備え
た線形送信装置において、 本発明の特徴とするところの、補正回路6と直流電圧制
御回路7との間に接続され、前記包絡線信号を入力して
前記包絡線信号を変数とする信号の振幅および位相等化
を行いその出力信号を直流電圧制御回路7に人力する周
波数等化回路1oを備えている。
The first embodiment includes a modulator 2, a coupler 3, and an envelope detector 5 as modulation means for inputting a modulation information signal from a modulation input terminal 1 and outputting a modulated wave signal and its envelope signal. and a correction circuit 6, a field effect transistor 42 as a semiconductor amplification element which uses the modulated wave signal as a human input signal, an input matching circuit 41, a high frequency blocking coil 43, and an output matching circuit 44. In a linear transmitter comprising a power amplifier 4 and a DC voltage control circuit 7 that controls a DC power supply voltage supplied from a power supply terminal 8 applied to a power supply terminal of the power amplifier 4 according to a signal having the envelope signal as a variable. , which is a feature of the present invention, is connected between the correction circuit 6 and the DC voltage control circuit 7, inputs the envelope signal, and equalizes the amplitude and phase of the signal using the envelope signal as a variable. The frequency equalization circuit 1o is provided with a frequency equalization circuit 1o that performs the same operation and inputs the output signal to the DC voltage control circuit 7.

第2図によると、周波数等化回路1oは、抵抗R,〜R
6と、コンデンサclおよびc2と、演算増幅器l2お
よびl3とを含んで構或される。そして、抵抗R,およ
びR6の一端は入カ端子11に接続され、抵抗R,の他
端は抵抗R2、コンデンサc1およびC2の一端に共通
接続され、抵抗R,の他端は接地され、コンデンサCI
の他端は抵抗R,の他端および抵抗R,の一端とともに
演算増幅器12の出力に接続され、コンデンサc2の他
端は抵抗R,の一端とともに演算増幅器12の反転入力
端子に接続され、演算増幅器12の正転入力端子は接地
され、抵抗R4の他端は抵抗R,の一端および抵抗R6
の他端とともに演算増幅器13の反転入カ端子に接続さ
れ、演算増幅器13の正転入力端子は接地され、演算増
幅器13の出力は抵抗R,の他端および出力端子l4に
接続される。
According to FIG. 2, the frequency equalization circuit 1o includes resistors R, ~R
6, capacitors cl and c2, and operational amplifiers l2 and l3. One ends of the resistors R and R6 are connected to the input terminal 11, the other end of the resistor R is commonly connected to the resistor R2, and one end of the capacitors c1 and C2, and the other end of the resistor R is grounded, and the other end of the resistor R is connected to the input terminal 11. C.I.
The other end of the capacitor c2 is connected to the output of the operational amplifier 12 along with the other end of the resistor R and one end of the resistor R, and the other end of the capacitor c2 is connected to the inverting input terminal of the operational amplifier 12 along with one end of the resistor R. The non-inverting input terminal of the amplifier 12 is grounded, and the other end of the resistor R4 is connected to one end of the resistor R and the resistor R6.
It is connected together with the other end to the inverting input terminal of the operational amplifier 13, the non-inverting input terminal of the operational amplifier 13 is grounded, and the output of the operational amplifier 13 is connected to the other end of the resistor R and the output terminal l4.

次に、本実施例の動作について第3図を参照して説明す
る。ここで第3図は、直流電圧制御回路7の周波数特性
を周波数等化前と後とで示し、さらに周波数等化回路1
0の周波数特性を示したものである。
Next, the operation of this embodiment will be explained with reference to FIG. Here, FIG. 3 shows the frequency characteristics of the DC voltage control circuit 7 before and after frequency equalization, and also shows the frequency characteristics of the frequency equalization circuit 1.
This shows the frequency characteristics of 0.

第3図において、曲線Aは周波数等化前の直流電圧制御
回路7の周波数特性を示し、そのしゃ断周波数は10K
Hz以下である。これに対し周波数等化回路10の周波
数特性は、周波数等化の結果第3図の曲線Bのようにな
り、高周波域で振幅が大となる特性を有している。この
等化信号は直流電圧制御回g8. 7に入力され、その
結果、直流電圧制御回路7の周波数特性は第3図の曲線
Cに示すように高城特性が改善され、しゃ断周波数は5
0KHz以上となる。この改善された直流電圧制御回路
7の出力電圧により、電力増幅器4のドレイン電圧VD
が制御されるので、高速の変調波信号を増幅することが
可能となる。
In FIG. 3, curve A shows the frequency characteristics of the DC voltage control circuit 7 before frequency equalization, and its cutoff frequency is 10K.
It is below Hz. On the other hand, the frequency characteristic of the frequency equalization circuit 10 becomes as shown by curve B in FIG. 3 as a result of frequency equalization, and has a characteristic in which the amplitude becomes large in the high frequency range. This equalization signal is applied to the DC voltage control circuit g8. As a result, the frequency characteristics of the DC voltage control circuit 7 are improved as shown by curve C in FIG. 3, and the cutoff frequency is 5.
It becomes 0KHz or more. Due to the improved output voltage of the DC voltage control circuit 7, the drain voltage VD of the power amplifier 4
is controlled, it becomes possible to amplify a high-speed modulated wave signal.

なお、このような周波数特性を有する周波数等化回路I
Oは、第2図にその一例を示したように、演算増幅器、
抵抗およびコンデンサを含んで簡単に構或される(ウィ
リアム著、加藤監訳「電子フィルタ」マグロウヒル社、
参照)。
Note that the frequency equalization circuit I having such frequency characteristics
O is an operational amplifier, as shown in FIG.
It can be easily constructed by including a resistor and a capacitor (author William, translated by Kato, "Electronic Filter", McGraw-Hill Publishing,
reference).

第4図は本発明の第二実施例を示すブロック構或図であ
る。
FIG. 4 is a block diagram showing a second embodiment of the present invention.

本第二実施例は、第1図の第一実施例とは別の変調手段
を有する線形送信装置に本発明を適用したものである。
In the second embodiment, the present invention is applied to a linear transmitter having a modulation means different from that in the first embodiment shown in FIG.

本第二実施例における変調手段は、複素包絡線生成回路
21、同相或分包絡線用および直交戒分包絡線発生用の
ディジタルアナログ変換器(D/A)22および23、
直交変調器24ならびに搬送波発振器25を含む変調器
部2aと、ドレイン制御信号生成回路15とを含んでい
る。
The modulation means in the second embodiment includes a complex envelope generating circuit 21, digital-to-analog converters (D/A) 22 and 23 for in-phase or quadrature dividing envelope generation and orthogonal dividing envelope generation,
It includes a modulator section 2a including a quadrature modulator 24 and a carrier wave oscillator 25, and a drain control signal generation circuit 15.

この変調部2aの構或は、包絡線および位相の変化を変
調信号を発生するための公知の構戒である。すなわち、
変調波の搬送波角周波数をω。、包絡線信号をR(t)
、変調位相をφ(1)とすると、変調波信号e (t)
は一般的に、e(t)=R(t)・Re [exp(j
φt)゜exp(jωe1):] =Re  [’E(t)・exp(jωct))(1) と表される。ただし、Re(・〕は〔・〕の実数部を表
す。ここで、E (t)は複素包絡線と呼ばれ、 E(t)= I (t) − j Q( t)    
   (2)I(t)=R(t) c o sφ(1)
Q(t)−R(t) s i nφ( t )    
  (3)となる。I  (t)およびQ (t)は、
複素包絡線E (t)の同相戊分および直交或分と呼ば
れる。
The structure of the modulation section 2a is a known structure for generating a modulated signal based on changes in envelope and phase. That is,
The carrier wave angular frequency of the modulated wave is ω. , the envelope signal is R(t)
, the modulation phase is φ(1), then the modulated wave signal e (t)
is generally expressed as e(t)=R(t)・Re [exp(j
φt)゜exp(jωe1): ] =Re ['E(t)·exp(jωct))(1) It is expressed as follows. However, Re (・) represents the real part of [・]. Here, E (t) is called the complex envelope, and E (t) = I (t) − j Q ( t)
(2) I(t)=R(t) co sφ(1)
Q(t)−R(t) sinφ(t)
(3) becomes. I (t) and Q (t) are
They are called the in-phase and orthogonal parts of the complex envelope E (t).

複素包絡線生戊回路2■では、変調人力に応じた1  
(t)およびQ (t)の値をディジタル処理により算
出する。I  (t)およびQ (t)の算出値をそれ
ぞれディジタルアナログ変換器27および28によりア
ナログ電圧に変換することにより、I (t)およびQ
 (t)の波形が得られる。これらの波形を直交変調器
24に入力する。直交変調器24ではI  (t)およ
びQ (t)にそれぞれ同相および直交搬送波を乗算し
て変調波信号e (t)を得、これを出力する。
In the complex envelope generation circuit 2■, 1 according to the modulation power
The values of (t) and Q (t) are calculated by digital processing. By converting the calculated values of I (t) and Q (t) into analog voltages by digital-to-analog converters 27 and 28, respectively, I (t) and Q
(t) waveform is obtained. These waveforms are input to the quadrature modulator 24. The quadrature modulator 24 multiplies I (t) and Q (t) by in-phase and quadrature carrier waves, respectively, to obtain a modulated wave signal e (t), which is output.

この複素包絡線生戒回路21で算出されたI  (t)
およびQ (t)の値を用いて包絡線信号R (t)を
求めることができる。
I (t) calculated by this complex envelope calculation circuit 21
The envelope signal R (t) can be determined using the values of and Q (t).

ドレイン制御信号生成回路15では、 R(t)=〔1(t)2+Q(t)’)””    (
4)を算出することにより包絡線信号R (t)を得る
ことができる。得られた包絡線信号R (t)はそのま
ま、あるいはドレイン制御が最適となるような補正が行
われた後、ディジタルアナログ変換器によりアナログ電
圧に変換されてドレイン制御信号生成回路15より出力
される。このドレイン制御信号生成回路15より出力さ
れたドレイン制御信号は周波数等化器10に入力され、
十分な制御信号に等化された後、直流電圧制御回路7へ
加えられる。
In the drain control signal generation circuit 15, R(t)=[1(t)2+Q(t)')"" (
4), the envelope signal R (t) can be obtained. The obtained envelope signal R (t) is output as is, or after being corrected to optimize drain control, it is converted into an analog voltage by a digital-to-analog converter and output from the drain control signal generation circuit 15. . The drain control signal output from this drain control signal generation circuit 15 is input to the frequency equalizer 10,
After being equalized to a sufficient control signal, it is applied to the DC voltage control circuit 7.

直流電圧制御回路7は電力増幅器25のドレインバイア
ス電圧Vnが比例して変化するように動作する。直流電
圧制御回路7に周波数等化回路10を前置することによ
り、高い変調波信号を増幅する線形送信装置を実現する
ことができる。
The DC voltage control circuit 7 operates so that the drain bias voltage Vn of the power amplifier 25 changes proportionally. By providing the frequency equalization circuit 10 in front of the DC voltage control circuit 7, it is possible to realize a linear transmitter that amplifies a highly modulated wave signal.

ドレイン制御信号生成回路15としては、数値演算プロ
セッサを用い、人力されたI  (t)およびQ (t
)の値から式(4)に従って包絡線信号R (t)を求
め、これをそのまま、あるいは補正を加えてディジタル
アナログ変換器でアナログ電圧に変換されて出力される
。また、数値演算プロセッサの替わりにメモリテーブル
を用いて簡単に構或することができる。
As the drain control signal generation circuit 15, a numerical arithmetic processor is used to generate manually generated I (t) and Q (t
) is used to obtain an envelope signal R (t) according to equation (4), and this is converted into an analog voltage by a digital-to-analog converter and output as it is or after correction. Moreover, it can be easily constructed by using a memory table in place of the numerical calculation processor.

第5図は、QPSK変調方式における包絡線信号のスペ
クトラムの一例を示す特性図である。すなわち、式(4
)の包絡線信号R (t)の周波数分布である。ただし
、ロール・オフ=0.5、伝送速度は32Kb/sであ
る。電力増幅器4の振幅歪を50dB以下に抑えるため
には、直流電圧制御回路7の周波数特性は、直流戊分よ
り50dB低いスペクトラム戊分まで含む必要がある。
FIG. 5 is a characteristic diagram showing an example of the spectrum of an envelope signal in the QPSK modulation method. In other words, the formula (4
) is the frequency distribution of the envelope signal R (t). However, the roll off=0.5 and the transmission speed is 32 Kb/s. In order to suppress the amplitude distortion of the power amplifier 4 to 50 dB or less, the frequency characteristics of the DC voltage control circuit 7 must include a spectrum component that is 50 dB lower than the DC component.

よって、この場合約40〜50KHzまでの帯域が必要
であることが分かる。そして、既に第3図で説明したよ
うに、直流電圧制御回路7はしゃ断周波数が約50KH
z以上であり、十分にこの要求を満足している。
Therefore, it can be seen that a band of about 40 to 50 KHz is required in this case. As already explained in FIG. 3, the DC voltage control circuit 7 has a cutoff frequency of about 50 KH.
z or more, which fully satisfies this requirement.

なお、本発明は、電力増幅器の電源電圧を制御する線形
送信装置において、直流電圧制御回路の入出力の周波数
等化を行うことにより制御回路の高速化を簡易に実現す
ることである。よって、電源制御の信号は必ずしも変調
波信号の包絡線に一致する必要はなく、包絡線に近い信
号でもこの効果は十分発揮することが可能である。また
、電力増幅器の人力変調波信号は包絡線が一定であり、
電力増幅器で振幅変調をかけるAM送信装置にも応用が
可能である。
The present invention is to easily realize speeding up of the control circuit in a linear transmitter that controls the power supply voltage of a power amplifier by equalizing the input and output frequencies of the DC voltage control circuit. Therefore, the power supply control signal does not necessarily have to match the envelope of the modulated wave signal, and even a signal close to the envelope can sufficiently exhibit this effect. In addition, the envelope of the power amplifier's manually modulated wave signal is constant;
It can also be applied to an AM transmitter that applies amplitude modulation using a power amplifier.

第6図は本発明の第三実施例を示すブロック構或図であ
る。
FIG. 6 is a block diagram showing a third embodiment of the present invention.

第三実施例は、第4図の第二実施例において、本発明の
特徴とするところの、遅延回路(τ〉26および27を
、それぞれディジタルアナログ変換器22および23の
前に付加したものである。
The third embodiment differs from the second embodiment shown in FIG. 4 in that delay circuits (τ>26 and 27, which are a feature of the present invention, are added before the digital-to-analog converters 22 and 23, respectively). be.

第4図において直流電圧制御回路7に周波数等化回路l
Oを挿入した場合、電力増幅器4のドレイン電圧V,と
変調器部2aの出力からの包絡線の位相とが相対的に遅
れ進みが生じる。本第三実施例は、電力増幅器4のドレ
イン電圧V,が電力増幅器4の変調波入力信号より包絡
線位相が遅れている場合に対するものである。この場合
、シフトレジスタ等で構戊できる遅延回路(τ)26お
よび27を挿入して変調波信号を遅延させ、電力増幅器
25のドレイン電圧V,の位相と一致させる。これによ
り、ドレイン電圧V,の制御遅延による歪みを少なくす
ることができる。
In FIG. 4, the DC voltage control circuit 7 includes a frequency equalization circuit l.
When O is inserted, the drain voltage V of the power amplifier 4 and the phase of the envelope from the output of the modulator section 2a are relatively delayed or advanced. The third embodiment is for a case where the drain voltage V of the power amplifier 4 lags behind the modulated wave input signal of the power amplifier 4 in its envelope phase. In this case, delay circuits (τ) 26 and 27, which can be constituted by a shift register or the like, are inserted to delay the modulated wave signal to match the phase of the drain voltage V of the power amplifier 25. Thereby, distortion due to control delay of the drain voltage V, can be reduced.

また、進み遅れが反対になっている場合、すなわち第6
図の第三実施例では電力増幅器4のドレイン電圧Vnが
遅れている場合でも、遅延差の補償は可能である。この
場合の第四実施例を第7図に示す。遅延回路26および
27はドレイン制御信号生成回路15の入力側に挿入さ
れる。この遅延回路26および27は包絡線信号を遅延
させるものであり、遅延線などのアナログ回路でも実現
でき、挿入箇所はアナログ信号線、すなわちドレイン制
御信号生成回路15の出力または、ディジタルアナログ
変換器22および23の出力側となる。
Also, if the lead and lag are opposite, that is, the 6th
In the third embodiment shown in the figure, even if the drain voltage Vn of the power amplifier 4 is delayed, it is possible to compensate for the delay difference. A fourth embodiment in this case is shown in FIG. Delay circuits 26 and 27 are inserted on the input side of drain control signal generation circuit 15. These delay circuits 26 and 27 delay the envelope signal, and can be realized by an analog circuit such as a delay line.The insertion point is the analog signal line, that is, the output of the drain control signal generation circuit 15, or the digital-to-analog converter 22. and 23 output side.

第8図は、32κb/sのオフセッ}QPSK信号を用
いたときの、前記実施例による電力増幅器4の出力スペ
クトラムである。直流電圧制御回路7を周波数等化した
場合、約5〜10dBの歪改善が見られる。
FIG. 8 shows the output spectrum of the power amplifier 4 according to the embodiment when using a 32 kb/s offset QPSK signal. When the DC voltage control circuit 7 is frequency-equalized, distortion improvement of about 5 to 10 dB can be seen.

なお、前記実施例においては、半導体増幅素子として、
電界効果トランジスタを用いたけれども、これはバイポ
ーラトランジスタでも同様である。
In addition, in the above embodiment, as a semiconductor amplification element,
Although field effect transistors were used, the same applies to bipolar transistors.

さらに、本発明は変調が中間周波数で行われるような変
調器と高周波増幅器の間に周波数変換が含むような送信
装置にも応用が可能である。
Further, the present invention can be applied to a transmitting device in which frequency conversion is included between a modulator and a high frequency amplifier in which modulation is performed at an intermediate frequency.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、例えば飽和形の
電力増幅器を用い増幅器の電源電圧制御を行う線形送信
装置を構或し、直流電圧制御回路の人力信号を周波数等
化をすることにより、より高速の変調信号を増幅するこ
とが可能であり、しかも、周波数等化回路は簡易な構或
であり、部品点数を大きくすることなく高速線形送信装
置が実現でき、その効果は大である。
As explained above, according to the present invention, a linear transmitter is constructed that controls the power supply voltage of the amplifier using, for example, a saturation type power amplifier, and by frequency equalizing the human input signal of the DC voltage control circuit. , it is possible to amplify higher-speed modulated signals, and the frequency equalization circuit has a simple structure, so a high-speed linear transmitter can be realized without increasing the number of parts, and its effects are large. .

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第一実施例を示すブロック構或図。 第2図はその周波数等化回路の一例を示す回路図。 第3図はその周波数特性図。 第4図は本発明の第二実施例を示すブロック構或図。 第5図は包絡線スベクトラムを示す特性図。 第6図は本発明の第三実施例を示すブロック構或図。 第7図は本発明の第四実施例を示すブロック構威図。 第8図は本発明の実施例による出力スベクトラムの一例
を示す特性図。 第9図は従来例を示すブロック構威図。 1・・・変調入力端子、2・・・変調器、2a・・・変
調器部、3・・・結合器、4・・・電力増幅器、5・・
・包絡線検波器、6・・・補正回路、7・・・直流電圧
制御回路、8・・・電源端子、9・・・送信出力端子、
10・・・周波数等化回路、1l・・・入力端子、12
、13・・・演算増幅器、14・・・出力端子、l5・
・・ドレイン制御信号生戊回路、21・・・複素包絡線
生成回路、22、23・・・ディジタルアナログ変換器
(D/A) 、24・・・直交変調器、25・・・搬送
波発振器、26、27・・・遅延回路(τ〉、41・・
・入力整合回路、42・・・電界効果トランジスタ、4
3・・・コイル、44・・・出力整合回路、C. 、C
.・・・コンデンサ、R.〜R6・・・抵抗。 第一夷箱例(鴎及虹答化口塔) 昂 2 回 亮 1 図 A:JL詑11f:Rl褥川ヨ膚5(周波客c号4ヒ剤
)8:鳩渡収等化回晒 C:,!走!圧制間回塔(周反叡耳に亀)周″LL吸 (kHz) 0 ’  50k lj1′&板 (階) 100k 児二実兄?j (包a甑スベフトラム)昂 5 図 夷a2l例(出ηスペクトラム〉 38 図
FIG. 1 is a block diagram showing a first embodiment of the present invention. FIG. 2 is a circuit diagram showing an example of the frequency equalization circuit. Figure 3 shows its frequency characteristics. FIG. 4 is a block diagram showing a second embodiment of the present invention. FIG. 5 is a characteristic diagram showing the envelope spectrum. FIG. 6 is a block diagram showing a third embodiment of the present invention. FIG. 7 is a block diagram showing a fourth embodiment of the present invention. FIG. 8 is a characteristic diagram showing an example of an output spectrum according to an embodiment of the present invention. FIG. 9 is a block diagram showing a conventional example. DESCRIPTION OF SYMBOLS 1...Modulation input terminal, 2...Modulator, 2a...Modulator section, 3...Coupler, 4...Power amplifier, 5...
・Envelope detector, 6... Correction circuit, 7... DC voltage control circuit, 8... Power supply terminal, 9... Transmission output terminal,
10... Frequency equalization circuit, 1l... Input terminal, 12
, 13... operational amplifier, 14... output terminal, l5.
...Drain control signal generation circuit, 21...Complex envelope generation circuit, 22, 23...Digital to analog converter (D/A), 24...Orthogonal modulator, 25...Carrier wave oscillator, 26, 27...Delay circuit (τ>, 41...
- Input matching circuit, 42... field effect transistor, 4
3... Coil, 44... Output matching circuit, C. , C
.. ...Capacitor, R. ~R6...Resistance. 1st Yibako example (Ko and Rainbow answering mouth tower) 昂 2 Kairyo 1 Diagram A: JL 詑 11f: Rl Futagawa Yodera 5 (frequency customer C No. 4 Hi drug) 8: Pigeon crossing equalization times exposure C:,! Run! Oppression interpolation tower (Turtle in the ear of Zhou) Zhou''LL absorption (kHz) 0' 50k lj1'& board (floor) 100k Jiji's brother? Spectrum〉 38 Figure

Claims (1)

【特許請求の範囲】 1、変調情報信号を入力して変調波信号とその包絡線信
号とを生成出力する変調手段(2、2a、3、5、15
、25)と、 前記変調波信号を入力信号とする半導体増幅素子を含む
高周波増幅器(4)と、 前記包絡線信号を変数とする信号に従って前記高周波増
幅器の電源端子に印加される直流電源電圧を制御する直
流電圧制御回路(7)と を備えた線形送信装置において、 前記変調手段と前記直流電圧制御回路との間に接続され
、前記包絡線信号を入力して前記包絡線信号を変数とす
る信号の振幅および位相等化を行いその出力信号を前記
直流電圧制御回路に入力する周波数等化回路(10)を 備えたことを特徴とする線形送信装置。 2、請求項1記載の線形送信装置において、前記変調手
段からの前記変調信号および前記包絡線信号のいずれか
一方を遅延する遅延回路(26、27)を 備えたことを特徴とする線形送信装置。
[Claims] 1. Modulation means (2, 2a, 3, 5, 15) that receives a modulation information signal and generates and outputs a modulated wave signal and its envelope signal.
, 25), a high frequency amplifier (4) including a semiconductor amplification element which receives the modulated wave signal as an input signal, and a DC power supply voltage applied to a power supply terminal of the high frequency amplifier according to a signal having the envelope signal as a variable. A linear transmitting device comprising a DC voltage control circuit (7) for controlling, connected between the modulation means and the DC voltage control circuit, inputting the envelope signal and using the envelope signal as a variable. A linear transmitter comprising a frequency equalization circuit (10) that equalizes the amplitude and phase of a signal and inputs the output signal to the DC voltage control circuit. 2. The linear transmitter according to claim 1, further comprising a delay circuit (26, 27) for delaying either the modulated signal or the envelope signal from the modulating means. .
JP1242465A 1989-06-30 1989-09-19 Linear transmitter Expired - Lifetime JPH0654877B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP1242465A JPH0654877B2 (en) 1989-09-19 1989-09-19 Linear transmitter
EP90909852A EP0431201B1 (en) 1989-06-30 1990-06-28 Linear transmitter
CA002035455A CA2035455C (en) 1989-06-30 1990-06-28 Linear transmitter
PCT/JP1990/000838 WO1991000653A1 (en) 1989-06-30 1990-06-28 Linear transmitter
US07/651,375 US5251330A (en) 1989-06-30 1990-06-28 Linear transmitter
DE69024182T DE69024182T2 (en) 1989-06-30 1990-06-28 LINEAR TRANSMITTER

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1242465A JPH0654877B2 (en) 1989-09-19 1989-09-19 Linear transmitter

Publications (2)

Publication Number Publication Date
JPH03104422A true JPH03104422A (en) 1991-05-01
JPH0654877B2 JPH0654877B2 (en) 1994-07-20

Family

ID=17089488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1242465A Expired - Lifetime JPH0654877B2 (en) 1989-06-30 1989-09-19 Linear transmitter

Country Status (1)

Country Link
JP (1) JPH0654877B2 (en)

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JPH06177681A (en) * 1992-12-01 1994-06-24 Nippon Telegr & Teleph Corp <Ntt> High frequency amplifier
US5889434A (en) * 1996-11-01 1999-03-30 Mitsubishi Denki Kabushiki Kaisha Microwave power amplifier
JP2003500873A (en) * 1999-05-17 2003-01-07 エリクソン インコーポレイテッド Power modulator and method for separately amplifying high and low frequency parts of amplitude waveform
JP2006518955A (en) * 2003-02-20 2006-08-17 ソニー・エリクソン・モバイルコミュニケーションズ, エービー Efficient modulation of RF signals
JP2008022513A (en) * 2006-06-15 2008-01-31 Hitachi Kokusai Electric Inc Amplifier with distortion control function
JP2008514044A (en) * 2004-09-14 2008-05-01 テレフオンアクチーボラゲット エル エム エリクソン(パブル) Delay calibration in polar modulation transmitters.
US8036303B2 (en) 2005-12-27 2011-10-11 Panasonic Corporation Transmitter apparatus
WO2013093989A1 (en) * 2011-12-19 2013-06-27 富士通株式会社 Amplification circuit
WO2013186863A1 (en) * 2012-06-12 2013-12-19 富士通株式会社 Amplification circuit
US10277173B1 (en) 2017-11-17 2019-04-30 Qualcomm Incorporated Amplifier linearizer with wide bandwidth
US11283407B2 (en) 2017-07-17 2022-03-22 Qorvo Us, Inc. Multi-mode envelope tracking amplifier circuit
US11309922B2 (en) 2019-12-13 2022-04-19 Qorvo Us, Inc. Multi-mode power management integrated circuit in a small formfactor wireless apparatus
WO2022103484A1 (en) * 2020-11-16 2022-05-19 Qorvo Us, Inc. Envelope tracking integrated circuit operable across wide modulation bandwidth
US11349436B2 (en) 2019-05-30 2022-05-31 Qorvo Us, Inc. Envelope tracking integrated circuit
US11349513B2 (en) 2019-12-20 2022-05-31 Qorvo Us, Inc. Envelope tracking system
US11374482B2 (en) 2019-04-02 2022-06-28 Qorvo Us, Inc. Dual-modulation power management circuit
US11424719B2 (en) 2019-04-18 2022-08-23 Qorvo Us, Inc. Multi-bandwidth envelope tracking integrated circuit
US11539289B2 (en) 2019-08-02 2022-12-27 Qorvo Us, Inc. Multi-level charge pump circuit
US11539330B2 (en) 2020-01-17 2022-12-27 Qorvo Us, Inc. Envelope tracking integrated circuit supporting multiple types of power amplifiers
US11588449B2 (en) 2020-09-25 2023-02-21 Qorvo Us, Inc. Envelope tracking power amplifier apparatus
US11716057B2 (en) 2020-01-28 2023-08-01 Qorvo Us, Inc. Envelope tracking circuitry
US11728774B2 (en) 2020-02-26 2023-08-15 Qorvo Us, Inc. Average power tracking power management integrated circuit
US11909385B2 (en) 2020-10-19 2024-02-20 Qorvo Us, Inc. Fast-switching power management circuit and related apparatus

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06177681A (en) * 1992-12-01 1994-06-24 Nippon Telegr & Teleph Corp <Ntt> High frequency amplifier
US5889434A (en) * 1996-11-01 1999-03-30 Mitsubishi Denki Kabushiki Kaisha Microwave power amplifier
JP2003500873A (en) * 1999-05-17 2003-01-07 エリクソン インコーポレイテッド Power modulator and method for separately amplifying high and low frequency parts of amplitude waveform
JP2006518955A (en) * 2003-02-20 2006-08-17 ソニー・エリクソン・モバイルコミュニケーションズ, エービー Efficient modulation of RF signals
JP2008514044A (en) * 2004-09-14 2008-05-01 テレフオンアクチーボラゲット エル エム エリクソン(パブル) Delay calibration in polar modulation transmitters.
US8036303B2 (en) 2005-12-27 2011-10-11 Panasonic Corporation Transmitter apparatus
JP2008022513A (en) * 2006-06-15 2008-01-31 Hitachi Kokusai Electric Inc Amplifier with distortion control function
WO2013093989A1 (en) * 2011-12-19 2013-06-27 富士通株式会社 Amplification circuit
US8872582B2 (en) 2011-12-19 2014-10-28 Fujitsu Limited Amplifier circuit
JPWO2013093989A1 (en) * 2011-12-19 2015-04-27 富士通株式会社 Amplifier circuit
WO2013186863A1 (en) * 2012-06-12 2013-12-19 富士通株式会社 Amplification circuit
US9099977B2 (en) 2012-06-12 2015-08-04 Fujitsu Limited Amplifier circuit
JPWO2013186863A1 (en) * 2012-06-12 2016-02-01 富士通株式会社 Amplifier circuit
US11283407B2 (en) 2017-07-17 2022-03-22 Qorvo Us, Inc. Multi-mode envelope tracking amplifier circuit
WO2019099142A1 (en) * 2017-11-17 2019-05-23 Qualcomm Incorporated Amplifier linearizer with wide bandwidth
US10277173B1 (en) 2017-11-17 2019-04-30 Qualcomm Incorporated Amplifier linearizer with wide bandwidth
US11374482B2 (en) 2019-04-02 2022-06-28 Qorvo Us, Inc. Dual-modulation power management circuit
US11424719B2 (en) 2019-04-18 2022-08-23 Qorvo Us, Inc. Multi-bandwidth envelope tracking integrated circuit
US11349436B2 (en) 2019-05-30 2022-05-31 Qorvo Us, Inc. Envelope tracking integrated circuit
US11539289B2 (en) 2019-08-02 2022-12-27 Qorvo Us, Inc. Multi-level charge pump circuit
US11309922B2 (en) 2019-12-13 2022-04-19 Qorvo Us, Inc. Multi-mode power management integrated circuit in a small formfactor wireless apparatus
US11349513B2 (en) 2019-12-20 2022-05-31 Qorvo Us, Inc. Envelope tracking system
US11539330B2 (en) 2020-01-17 2022-12-27 Qorvo Us, Inc. Envelope tracking integrated circuit supporting multiple types of power amplifiers
US11716057B2 (en) 2020-01-28 2023-08-01 Qorvo Us, Inc. Envelope tracking circuitry
US11728774B2 (en) 2020-02-26 2023-08-15 Qorvo Us, Inc. Average power tracking power management integrated circuit
US11588449B2 (en) 2020-09-25 2023-02-21 Qorvo Us, Inc. Envelope tracking power amplifier apparatus
US11909385B2 (en) 2020-10-19 2024-02-20 Qorvo Us, Inc. Fast-switching power management circuit and related apparatus
WO2022103484A1 (en) * 2020-11-16 2022-05-19 Qorvo Us, Inc. Envelope tracking integrated circuit operable across wide modulation bandwidth

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