JPH06175880A - Information processor - Google Patents

Abstract

PURPOSE:To shorten time for starting a system requiring time for initial setting at the time of starting this system by enlarging the capacity of a main memory, setting the parameter of a peripheral I/O device to be connected and enlarging the scale of a diagnostic program. CONSTITUTION:Under the control of a memory bus controller 3, a microcomputer 2 reads the initial setting and diagnostic program routine for various I/O devices from a memory 5 with built-in initial setting/diagnostic program and afterwards, the program is executed through an I/O controller 7. During this execution, a CPU 1 parallelly processes the initial setting/diagnostic program for the mount capacity of a main memory 4 and read/write check or the like. Thus, time for initial setting/diagnosis can be shortened when starting the system of the information processor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus such as a personal computer or a workstation for performing office work in office work.

[0002]

2. Description of the Related Art In recent years, an information processing apparatus requires a large amount of main memory capacity, parameter settings of connected peripheral I / O devices, and a large-scale diagnostic program, which requires a lot of time for initial setting at system startup. It has become to.

In such an information processing apparatus, a method of starting the system in a short time is being studied. For example, Japanese Patent Laid-Open No. 3-276230 discloses that check data is read into a non-volatile memory, and the check holding data corresponding to the start-up data stored in this memory is collated and compared with the check reference data. If they do not match, the startup data is read again from the external storage medium into the memory, and the check holding data corresponding to this startup data is reset. It was

Further, conventionally, a method of holding an initialization program as information in the ROM of the system and sequentially executing the program from the head address of the ROM has been adopted.

[0005]

Conventionally, since the initial setting and diagnostic programs are built in the ROM and are executed sequentially from the head address, the memory capacity check and the various I / O diagnostics that constitute the system are diagnosed. , No ingenuity was made to execute the initial setting in a short time.

As various I / Os constituting the system have become multifunctional and have higher performance, the number of special registers that need to be set inside each controller is also increasing.

In addition, a hard disk, Ether, RS
Various I / Os such as 232C have a self-diagnosis mode to improve the functionality and reliability of the device, and the initial diagnosis of various I / Os is complicated.

Under the circumstances as described above, the number of steps of the initial setting and the diagnostic program is large, and there is a disadvantage that the time required for the initial setting and the diagnosis becomes long.

[0009]

SUMMARY OF THE INVENTION The present invention is to solve the above-mentioned problems by providing a means for carrying out parallel processing of a CPU and a microcomputer in a memory bus controller by mounting a microcomputer for initial setting and diagnosis. Be prepared. Also,
If this microcomputer is realized by the same one as the CPU, it becomes a multiprocessor high-performance information processing device.

Further, each controller constituting the system is provided with means for incorporating an initial setting / diagnosis program, for example, a memory area and means for executing the initial setting / diagnosis program, and blocks controlled by the various controllers are provided. This makes it possible to perform initial setting and diagnosis independently.

[0011]

By the means described above, it becomes possible to perform parallel and distributed processing of what was conventionally performed sequential initialization / diagnosis.
This has the effect of reducing the time required for diagnosis. Further, by providing a stack area for holding the parameter information required by the operating system, it becomes possible to efficiently execute the initialization / diagnosis program.

Further, since each controller has an initial setting / diagnostic program and its executing means, it is possible to reduce the mounting area on the board by eliminating the need for mounting the internal memory for the initial setting / diagnostic program which is conventionally required. It is possible to achieve a compact design.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the logical configuration of the system. Reference numeral 1 is a central processing unit (hereinafter referred to as CPU) that performs a central function of an information processing apparatus. 2 is a microcomputer that executes a system initial setting / diagnostic program in parallel with CPU 1 at startup. 3 is a main memory 4. A memory bus controller that controls access and system bus 8,
Reference numeral 4 is a main memory, 5 is an initial setting / diagnostic program built-in memory, 6 is a display controller for controlling the display system and setting display parameters, and 7 is various I / O configuring the system.
An I / O controller that controls O devices, and 8 is a system bus.

The microcomputer 2 is controlled by the memory / bus controller 3 and has a memory 5 with a built-in initial setting / diagnostic program.
The initial setting of various I / O devices and the diagnostic program routine are read out and executed via the I / O controller 7. During this period, the CPU 1 processes the installed capacity of the main memory 4 and the initial setting / diagnostic program such as read / write check in parallel.

This will be described below with reference to the drawings. Reference numeral 9 shown in FIG. 2 is a memory initialization diagnostic path, and 10 is an I / O and display system initialization diagnostic path. As shown in the figure, the memory / bus controller 3 displays the initial setting / diagnosis program from the internal setting / diagnostic program memory 5 as an initial diagnosis of the main memory 4, a capacity check program, and various I / O devices constituting the system. It operates so that the initial setting program of the internal register of the controller is executed in parallel. Which part of the microcomputer 2 is to be initialized and diagnosed can be easily changed by rewriting the memory 5 with built-in initialization / diagnostic program, that is, changing the address to which the program is assigned.

The address to which the initial setting / diagnostic program is assigned is arbitrary depending on each system. It is possible to allocate the system startup time so that the time can be shortened efficiently.

The memory / bus controller 3 has a function of internally converting a processor address into a memory address, and converts the processor address into a memory address for memory access. In this case, it is necessary to switch the memory address to the main memory 4 depending on whether the system is in the initial setting / diagnosis processing state or in the normal state.

Normally, the memory 5 with built-in initial setting / diagnosis program is accessed at the time of power-on and at the time of restarting the system by a reset or the like. In the above case, the memory address output to the memory can be switched. Will be needed. The memory bus controller 3 is provided with these functions to control memory access.

FIG. 3 is an internal block diagram of the memory bus controller 3. Reference numeral 11 is an address conversion unit for converting a processor address into a memory address, 12 is a system control unit for controlling access to the main memory 4 of the CPU 1, the microcomputer 2, the initial setting / diagnostic program built-in memory 5, and the system bus 8. A parameter information stack unit for stacking parameter information which is a result of the initial setting / diagnosis performed by the microcomputer 2, 14 is a CPU address bus of the CPU 1, 15 is a microcomputer address bus of the microcomputer 2, 16
Is a mode switching signal for switching between initial setting / diagnostic processing and normal processing, 17 is a CPU data bus of the CPU 1, 18 is a microcomputer data bus of the microcomputer 2, 19 is the main memory 4, and initial setting / Memory data bus to the diagnostic program built-in memory 5, 20 is the main memory 4,
A memory address bus to the memory 5 with built-in initialization / diagnosis program.

The address converter 11 generates an address stored in the program to be executed from the internal memory 5 for storing the initial setting / diagnostic program executed by the CPU 1 and the microcomputer 2. The system control unit 12 operates so that the CPU 1 checks the main memory 4 and the microcomputer 2 checks the display unit and I / O unit connected to the system bus 8 and sets parameters in parallel. This makes it possible to reduce the time required for initial setting and diagnosis.

FIG. 4 shows an example of an internal block diagram of the address conversion unit. Reference numeral 21 is a multiplexer (hereinafter referred to as MPX) for converting the addresses of the CPU address bus 14 and the microcomputer address bus 15 into a memory address, and 22 is an initial setting processing state according to a mode switching signal 16 output from the system control unit 12. Selector circuit for switching the mode of selecting the memory address to be output, 23 synthesizes the selected memory addresses, and outputs the storage address of the program executed by the CPU 1.
Is an address composition unit that controls whether to output the storage address of the program to be executed by.

At the time of initial setting of the system, a memory address is selected so that the CPU 1 and the microcomputer 2 execute the initial setting / diagnostic program, and the memory address is transferred from the address synthesizing section 23 to the main memory 4 and the initial setting / diagnostic program built-in memory 5. Is output.

Next, the parameter information stack unit 13 will be described with reference to FIG. The parameter information stack unit 13 holds the parameter information that can be realized by a normal memory core and is necessary for the operating system, and when the execution of the initialization / diagnosis program is completed, the system control unit 12 stores the parameter information in the main memory 4. Write to the memory area managed by the operating system. That is,
When the main memory 4 is initially diagnosed by the CPU 1, the parameter information required by the operating system cannot be written in the main memory 4. Therefore,
The microcomputer 2 is provided with a parameter information stack unit 13 for holding the parameter information of the display unit and I / O unit which are initially set and diagnosed. At the time of the initial diagnosis processing, the system control unit 12 operates so as to write the parameter information in the parameter information stack unit 13 together with the data of the memory 5 with the initial setting / diagnosis program. Further, by providing the system control unit 12 with a distributed processing function, the CPU 1 executes the initial setting / diagnosis program and the process of writing the parameter information in the main memory 4, the microcomputer 2
4 of the process of executing the initial setting / diagnostic program and writing the parameter information to the parameter information stack unit 13 by
It is possible to efficiently process one process.

When parameter information is written from the parameter information stack unit 13 to the main memory 4, the main memory 4 is checked in block units, for example, 4 Mbit DRA.
Since M is performed in units of 4 Mbytes, it is possible to write to the memory area for which diagnosis has been completed at any time. This allows
The capacity of the parameter information stack unit 13 can be minimized.

Further, by adopting the same microcomputer 2 as that of the CPU 1, the processing performance of the system can be improved by adopting a multiprocessor configuration.

Further, the parameter information stack unit 13
In the case where is composed of a register, it is possible to know the necessary parameter information by setting parameter information in the register by the microcomputer 2 and accessing this register by the operating system.

It is also possible to read the initial setting / diagnosis program into the parameter information stack unit 13 and execute the program.

Further, while writing the parameter information to the memory area managed by the operating system of the main memory 4, the system control section 12 can read the operating system normally stored in the hard disk and start up the system. . As a result, the startup of the operating system and the writing of the parameter information to the main memory 4 can be processed in parallel, and the time required for system startup can be shortened.

FIG. 6 is a block diagram showing the second embodiment. Reference numeral 24 denotes the initial setting and the initial setting including the diagnostic program built-in memory 5 and the microcomputer 2 described in the first embodiment.
It is a memory / bus controller with a built-in diagnostic program.
The initial setting / diagnostic program built-in memory / bus controller 24 is provided with the initial setting / diagnostic program to reduce the number of parts, the mounting area, and the size of the information processing apparatus. Further, by executing the program inside the controller, the processing time can be significantly shortened as compared with the case where the program is read from the conventional external ROM and executed.

Further, a semiconductor component such as a custom LSI having a CPU core and an initial setting / diagnostic program built-in, and a CP having a ROM area having the initial setting / diagnostic program built-in.
It can also be realized in U. Further, by incorporating an operating system and application software in the above-mentioned semiconductor component, it is possible to improve performance and shorten the startup time of the operating system and application software.

FIG. 7 is a system logical configuration diagram including various controllers with built-in programs. Reference numeral 25 is a program-embedded memory / bus controller, 26 is a program-embedded display controller, and 27 is a program-embedded I / O controller. By incorporating a program in each controller and executing the initial setting / diagnosis program for each function, the time required for initial setting / diagnosis at system startup can be shortened.

[0032]

Since the present invention is constructed as described above, it has the following effects. It is possible to shorten the time required for initial setting / diagnosis when the system of the information processing apparatus is started up.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment showing a logical configuration of a system.

FIG. 2 is a block diagram showing a path for executing an initialization / diagnosis program.

FIG. 3 is an internal configuration diagram of a memory bus controller.

FIG. 4 is an internal block diagram of an address conversion unit.

FIG. 5 is an explanatory diagram of a parameter information stack unit.

FIG. 6 is a block diagram showing a second embodiment.

FIG. 7 is a system logical configuration diagram including various controllers with built-in programs.

[Explanation of symbols]

1 ... CPU (central processing unit), 2 ... Microcomputer, 3 ... Memory / bus controller, 4 ... Main memory, 5 ... Initial setting / diagnostic program built-in memory, 6 ... Display controller, 7 ... I / O controller, 8 ... System bus, 9 ... Memory initial setting / diagnostic path, 10 ... I / O and display system initial setting / diagnostic path, 11 ... Initial setting / diagnostic program built-in memory / bus controller, 12 ... System controller, 13 ... Parameter information Stack part, 14 ... CPU address bus, 15 ... Microcomputer address bus, 16 ... Mode switching signal, 17 ... CPU data bus, 18 ... Microcomputer data bus, 19 ... Memory data bus, 20 ... Memory address bus, 21 ... MPX, 22 ... Selector circuit, 23 ... Address synthesis section, 24 ... Built-in initial setting / diagnostic program Mori bus controller, 25 ... program built-in memory bus controller, 26 ... program built-in display controller, 27 ... program built-in I / O controller.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takayuki Tamura, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi Ltd. Microelectronics Device Development Laboratory

Claims (4)

[Claims] 1. A central processing unit (hereinafter referred to as CPU),
Display controller, memory / bus controller, I /
An information processing device comprising an O controller, a main memory, etc., characterized by having a microcomputer capable of executing an initial setting / diagnosis program for system startup in parallel with a CPU. 2. The information processing apparatus according to claim 1, further comprising a stack area for holding parameter information provided to the operating system, other than the main memory. 3. The information processing apparatus according to claim 2, wherein the information processing apparatus has a controller that contains an initialization / diagnosis program and can execute the program. 4. The information processing apparatus according to claim 3, wherein the information processing apparatus has a plurality of function-based controllers that contain a program and can execute the built-in program.