JPH06163272A - Impedance element - Google Patents

Impedance element

Info

Publication number
JPH06163272A
JPH06163272A JP16595193A JP16595193A JPH06163272A JP H06163272 A JPH06163272 A JP H06163272A JP 16595193 A JP16595193 A JP 16595193A JP 16595193 A JP16595193 A JP 16595193A JP H06163272 A JPH06163272 A JP H06163272A
Authority
JP
Japan
Prior art keywords
hole
conductor
impedance
penetrating
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16595193A
Other languages
Japanese (ja)
Other versions
JP2868198B2 (en
Inventor
Yoshinori Sasaki
良典 佐々木
Toshio Watanabe
寿雄 渡辺
Kazuo Yokoyama
効生 横山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP5165951A priority Critical patent/JP2868198B2/en
Publication of JPH06163272A publication Critical patent/JPH06163272A/en
Application granted granted Critical
Publication of JP2868198B2 publication Critical patent/JP2868198B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To obtain an impedance element which can exhibit sufficient characteristics in a very small limited volume, and be surely mounted on a board. CONSTITUTION:At least one penetrating hole 13 penetrating the part between a first surface 11 and a second surface 12 of a rectangular ferrite element body which surfaces are different from the board fixing surface and face with each other is formed, and a penetrating conductor is formed in the penetrating hole. In the case of one penetrating hole, both surfaces of the penetrating conductor are connected with electrode surfaces 8 formed on the third surface and a fourth surface of the ferrite element body which surfaces are different from the board fixing surface of the ferrite element body and face with each other. In the case of a plurality of penetrating holes, both ends of an electric coupler formed by connecting a plurality of penetrating conductors in series are connected with the electrode surfaces 8. An insulating film is formed on at least one out of the above first surface 11 and the second surface 12 which cats as electrically active planes.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、インピーダンス素子に
関し、特にビーズフィルタに適用して好適なインピーダ
ンス素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an impedance element, and more particularly to an impedance element suitable for application to a bead filter.

【0002】[0002]

【従来の技術】従来、ビーズフィルタは、磁性体を円筒
状に形成し、その穴の中に導体を通したものよりなり、
主に、低周波領域ではインダクタ、高周波領域では抵抗
素子として使われている。このようなビーズフィルタの
インピーダンスZは、磁性体の透磁率を複素透磁率(μ
=μ′+jμ″)で考えた場合、
2. Description of the Related Art Conventionally, a bead filter is formed by forming a magnetic material in a cylindrical shape and passing a conductor through the hole.
It is mainly used as an inductor in the low frequency region and as a resistance element in the high frequency region. The impedance Z of such a bead filter is obtained by comparing the magnetic permeability of a magnetic material with the complex magnetic permeability (μ
= Μ ′ + jμ ″)

【0003】[0003]

【数1】 [Equation 1]

【0004】で表わされる。ただし、μ0 は真空の透磁
率(4π×10-7H/m)、lnは自然対数、OD 、I
D 、lはそれぞれ円筒型磁性体の外径、内径、長さ、N
は巻数(ビーズフィルタの場合は1)、j=√−1であ
る。従って(1)式から分るように、上記のごときビー
ズフィルタは、形式的な面では、内径が小さく、長さ、
外径の大きい程、インピーダンスが高くなる。
It is represented by Here, μ 0 is the magnetic permeability of vacuum (4π × 10 −7 H / m), ln is the natural logarithm, O D , I
D and l are the outer diameter, inner diameter, length, and N of the cylindrical magnetic body, respectively.
Is the number of turns (1 in the case of a bead filter), j = √−1. Therefore, as can be seen from the equation (1), the bead filter as described above has a small inner diameter and a long
The larger the outer diameter, the higher the impedance.

【0005】しかしながら、このような従来のビーズフ
ィルタにあっては、インピーダンスをより大きくしよう
とすると装置の大型化は避けられず、限られた体積の中
では特性を十分発揮できない。
However, in such a conventional bead filter, an increase in impedance is unavoidable when the impedance is increased, and the characteristics cannot be sufficiently exhibited in a limited volume.

【0006】基板取り付け面よりこの面と相対向する面
へ貫通する複数の貫通穴を設け、貫通穴に通された導体
を連続的に結合した電気的結合体の両端を電極面とそれ
ぞれ接続させ、少なくとも基板取り付け面に絶縁膜を設
けるようにインピーダンス素子を構成すれば、限られた
体積で所望の大きなインピーダンス値をとることがで
き、また絶縁膜によって当該インピーダンス素子と基板
に装着されているランド、パターン等の活電部との良好
な電気的絶縁を行なわれる。
A plurality of through holes penetrating from the board mounting surface to the surface opposite to this surface is provided, and both ends of the electrical coupling body, in which the conductors passed through the through holes are continuously coupled, are connected to the electrode surfaces, respectively. By configuring the impedance element so that the insulating film is provided at least on the board mounting surface, a desired large impedance value can be obtained in a limited volume, and the impedance element and the land mounted on the board are provided. Good electrical insulation from live parts such as patterns is achieved.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、このよ
うに基板取り付け面に絶縁膜が設けられていると、この
インピーダンス素子を基板にリフロー法等によってハン
ダ付けする場合に、マンハッタン現象と称せられる素子
の浮き上がり現象が生じてしまう恐れがある。これは、
ハンダの表面張力によって一方の電極面が下方に引っ張
られ、絶縁膜の端縁を支点にして他方の電極面が基板か
ら浮き上がってしまうものである。
However, when the insulating film is provided on the board mounting surface as described above, when the impedance element is soldered to the board by a reflow method or the like, an element called Manhattan phenomenon is formed. There is a risk that the phenomenon of floating will occur. this is,
One electrode surface is pulled downward by the surface tension of the solder, and the other electrode surface is lifted from the substrate with the edge of the insulating film as a fulcrum.

【0008】本発明はこのような問題点を解決するため
になされたものであり、非常に小型で限られた体積の中
で十分な特性を発揮できると共に基板への装着が確実に
行えるインピーダンス素子を提供することを目的として
いる。
The present invention has been made in order to solve the above problems, and is an extremely small impedance element which can exhibit sufficient characteristics in a limited volume and can be reliably mounted on a substrate. Is intended to provide.

【0009】[0009]

【課題を解決するための手段】本発明によれば、角板状
のフェライト素体の基板取り付け面とは異なる相対向す
る第1の面及び第2の面間を貫通する少なくとも1つの
貫通穴を設け、該貫通穴内に貫通導体を設け、貫通穴が
1つの場合は該貫通導体の両端を、貫通穴が複数の場合
は複数の該貫通導体を導体パターンを介して直列接続し
てなる電気的結合体の両端をフェライト素体の基板取り
付け面とは異なる相対向する第3の面及び第4の面にそ
れぞれ形成された電極面とそれぞれ接続させ、活電面を
なす上述の第1の面及び第2の面のうちの少なくとも一
方に絶縁膜を設けたインピーダンス素子が提供される。
According to the present invention, at least one through hole penetrating between a first surface and a second surface of a rectangular plate-shaped ferrite body different from the substrate mounting surface and facing each other. And a through conductor is provided in the through hole, and both ends of the through conductor are connected when there is one through hole, and a plurality of through conductors are connected in series through a conductor pattern when there are a plurality of through holes. The both ends of the dynamic coupling body are respectively connected to the electrode surfaces formed on the third surface and the fourth surface, which are different from the substrate mounting surface of the ferrite element body, respectively, and form the active surface. There is provided an impedance element in which an insulating film is provided on at least one of the surface and the second surface.

【0010】電気的結合体が、各貫通導体を隣接した貫
通穴の貫通導体相互による磁束のうち消しあいがないよ
う連続的に直列接続したものであることが好ましい。
It is preferable that the electrical coupling body is a series connection of the through conductors so that the magnetic fluxes from the through conductors in the adjacent through holes do not cancel each other out.

【0011】[0011]

【作用】活電面をなす第1の面及び第2の面がフェライ
ト素体の基板取り付け面とは異なる面であり、これら活
電面のうちの少なくとも一方に絶縁膜が形成されている
から、基板への装着時に素子の浮き上がり等の不都合が
生じず、装着歩留が向上する。限られた体積で所望の大
きなインピーダンス値をとれることはいうまでもない。
Since the first surface and the second surface which are the live surfaces are different from the board mounting surface of the ferrite body, the insulating film is formed on at least one of the live surfaces. In addition, the mounting yield is improved without causing inconvenience such as floating of the element when mounted on the substrate. It goes without saying that a desired large impedance value can be obtained with a limited volume.

【0012】[0012]

【実施例】本発明の実施例を説明する前に、本発明に先
行して考えられたインピーダンス素子について図面を参
照して説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Before describing the embodiments of the present invention, impedance elements considered prior to the present invention will be described with reference to the drawings.

【0013】図1(a)〜(c)は本発明に先行するイ
ンピーダンス素子の例を示す図であって、(a)は平面
図、(b)は底面図、(c)は(a)のA−A′線断面
図である。なお、同図(a)及び(b)では構造をわか
りやすくするため絶縁膜10が省略されている。
1 (a) to 1 (c) are views showing examples of impedance elements prior to the present invention, in which (a) is a plan view, (b) is a bottom view, and (c) is (a). FIG. 9 is a sectional view taken along line AA ′ of FIG. The insulating film 10 is omitted in FIGS. 2A and 2B for the sake of clarity.

【0014】この先行例のインピーダンス素子1では、
角板状のフェライト素体2の厚み方向、即ち基板への取
り付け面を貫通する方向、に6つの貫通穴3、3a〜3
fが図示の如く形成されている。そして各貫通穴3内に
はスルーホール導体4が形成され、これらのスルーホー
ル導体4は素体2の表面5及び裏面6にて導体パターン
7により電気的に直列に結合されている。またこの電気
的に直列に結合された結合体の両端のスルーホール導体
は、導体パターン7′により素体2の対向する両端部に
設けられた電極8にそれぞれ接続されている。
In the impedance element 1 of this prior art example,
Six through holes 3, 3a to 3 in the thickness direction of the rectangular plate-shaped ferrite element body 2, that is, in the direction of penetrating the mounting surface to the substrate.
f is formed as shown. Through-hole conductors 4 are formed in each through-hole 3, and these through-hole conductors 4 are electrically connected in series by a conductor pattern 7 on the front surface 5 and the rear surface 6 of the element body 2. Further, the through-hole conductors at both ends of the electrically coupled body connected in series are connected to the electrodes 8 provided at opposite ends of the element body 2 by conductor patterns 7 '.

【0015】従って、電気的接続は、電極8−導体パタ
ーン7′−スルーホール導体(貫通孔3a)−導体パタ
ーン7−スルーホール導体(貫通孔3b)−導体パター
ン7−スルーホール導体(貫通孔3c)−導体パターン
7−スルーホール導体(貫通孔3d)−導体パターン7
−スルーホール導体(貫通孔3e)−導体パターン7−
スルーホール導体(貫通孔3f)−導体パターン7′−
電極8のようになる。
Therefore, the electrical connection is made by: electrode 8-conductor pattern 7'-through hole conductor (through hole 3a) -conductor pattern 7-through hole conductor (through hole 3b) -conductor pattern 7-through hole conductor (through hole). 3c) -Conductor pattern 7-Through hole conductor (through hole 3d) -Conductor pattern 7
-Through hole conductor (through hole 3e) -Conductor pattern 7-
Through hole conductor (through hole 3f) -conductor pattern 7'-
It becomes like the electrode 8.

【0016】この例の場合、インピーダンス素子1の寸
法は縦3.2mm、横4.5mm、高さ1.5mmのも
のが好ましく用いられる。なお、穴数1のときには縦
1.2mm、横2.0mm、高さ0.9mmが、穴数2
のときには縦1.6mm、横3.2mm、高さ1.1m
mが、穴数4のときには縦2.5mm、横3.2mm、
高さ1.3mmのチップ素子が好ましくは用いられる。
In the case of this example, the size of the impedance element 1 is preferably 3.2 mm in length, 4.5 mm in width, and 1.5 mm in height. When the number of holes is 1, the length is 1.2 mm, the width is 2.0 mm, and the height is 0.9 mm.
1.6 mm long, 3.2 mm wide, 1.1 m high
When m is 4 holes, the length is 2.5 mm, the width is 3.2 mm,
Chip elements with a height of 1.3 mm are preferably used.

【0017】フェライト素体2の材質としては、主にM
n−Znフェライト、Ni−Cu−Znフェライト、N
i−Znフェライトなどが使用される。
The material of the ferrite element body 2 is mainly M
n-Zn ferrite, Ni-Cu-Zn ferrite, N
i-Zn ferrite or the like is used.

【0018】貫通穴3は例えば素体2が粉末成型される
場合、焼成前に治具により適当な大きさの径の穴を所定
数だけあけてその後(1000〜1300℃程度の温度
で)焼成を行ない形成する。穴径は0.01mm以上で
あるのが好ましい。これより小さいと貫通穴3内にスル
ーホール導体4を設けることが困難となる。
For example, when the element body 2 is powder-molded, the through hole 3 is formed by forming a predetermined number of holes having an appropriate diameter with a jig before firing and firing (at a temperature of about 1000 to 1300 ° C.). To form. The hole diameter is preferably 0.01 mm or more. If it is smaller than this, it becomes difficult to provide the through hole conductor 4 in the through hole 3.

【0019】スルーホール導体4と導体パターン7及び
7′は、例えば導電ペーストの焼付け、あるいはメッキ
などにより素体2と密着形成する方法によって行う。
The through-hole conductor 4 and the conductor patterns 7 and 7'are formed by a method in which they are formed in close contact with the element body 2 by, for example, baking a conductive paste or plating.

【0020】この先行例では、インピーダンス素子1を
基板等に装着の際該基板面に設けられている活電部(ラ
ンド、パターン等)との電気的絶縁を図るため、インピ
ーダンス素子1の活電面5及び6に電極8を覆わないよ
うに絶縁膜10が施してある。この絶縁膜10は速硬化
性樹脂を用いて形成するのが好ましい。熱硬化樹脂を用
いると過熱硬化時に樹脂が軟化するためチップ表面のホ
ール部にピンホールが生じ電気的に悪影響を与える。例
えば基板にインピーダンス素子1を装着後ハンダディッ
ピングをする際ホール部にハンダが入り込み特性値が変
化する。従ってピンホールを生じさせないため樹脂を塗
布後瞬時に硬化させる必要があるので速硬化性樹脂の使
用が好ましい。速硬化性樹脂としては一般的には紫外線
硬化型樹脂、廉気性樹脂が使用される。絶縁膜10には
フェライト粉末などを含ませても良い。このようにする
と、シールド効果が生じ、またぬりむら、ひびわれを減
少させることができ、更に耐熱性を向上できる利点があ
る。
In this prior art example, when the impedance element 1 is mounted on a substrate or the like, it is electrically insulated from the live parts (lands, patterns, etc.) provided on the surface of the substrate. An insulating film 10 is applied to the surfaces 5 and 6 so as not to cover the electrode 8. It is preferable that the insulating film 10 be formed using a fast-curing resin. When the thermosetting resin is used, the resin is softened at the time of overheating, so that a pin hole is generated in the hole portion on the chip surface, which adversely affects the electrical characteristics. For example, when the impedance element 1 is mounted on the substrate and solder dipping is performed, the solder enters the holes and the characteristic value changes. Therefore, it is preferable to use a fast-curing resin because it is necessary to cure the resin instantly after application in order to prevent generation of pinholes. As the quick-curing resin, an ultraviolet-curing resin or an inexpensive resin is generally used. The insulating film 10 may contain ferrite powder or the like. By doing so, there is an advantage that a shielding effect is generated, unevenness in the coloring and cracks can be reduced, and the heat resistance can be further improved.

【0021】この様にして形成されたインピーダンス素
子1は、図2のような構成となり、内径ID 、架空外形
D 、長さlの円筒型ビーズが6つ直列に結合されたご
とき素子となる。図2において、記号
The impedance element 1 thus formed has a structure as shown in FIG. 2, and is composed of an element such as six cylindrical beads having an inner diameter I D , an imaginary outer diameter O D and a length l connected in series. Become. In FIG. 2, symbols

【0022】[0022]

【外1】 [Outer 1]

【0023】は電流が図面の表側から裏側に向かう方向
を流れることを示し、
Indicates that the current flows in the direction from the front side to the back side of the drawing,

【0024】[0024]

【外2】 [Outside 2]

【0025】は電流が図面の裏側から表側に向かう方向
の流れることを示し、矢印は磁束の方向を示している。
電流方向は近接した貫通穴3の間では互いに逆向きであ
り、磁束の打消はしない。この例の素子の理論的なイン
ピーダンスZは次式より計算することができる。なお各
パラメータは前述の(1)式で用いたものと同じであ
る。
[0025] indicates that the current flows in the direction from the back side of the drawing to the front side, and the arrow indicates the direction of the magnetic flux.
The current directions are opposite to each other between the adjacent through holes 3, and the magnetic flux is not canceled. The theoretical impedance Z of the device of this example can be calculated by the following equation. Each parameter is the same as that used in the above equation (1).

【0026】[0026]

【数2】 [Equation 2]

【0027】図3は、10MHzでのμ′が220、
μ″が300のフェライト素体にIDが0.4mm、OD
が1.6mm、1が1.5mmとして6つの穴を形成
してなる素子におけるインピーダンス特性を測定した結
果を示すグラフである。理論計算ではインピーダンス値
は10MHzで約60Ωとなり、測定データとほぼ一致
している。
In FIG. 3, μ'at 10 MHz is 220,
Ferrite body with μ ″ of 300 has I D of 0.4 mm and O D
2 is a graph showing the results of measuring the impedance characteristics of an element formed by forming 6 holes, where is 1.6 mm and 1 is 1.5 mm. In theoretical calculation, the impedance value is about 60Ω at 10 MHz, which is almost the same as the measured data.

【0028】図3より明らかなように、この例のインピ
ーダンス素子のインピーダンスは低周波領域においては
小さく、高周波領域においては大きくなっている。従っ
て、このインピーダンス素子は例えばTVチューナ回路
におけるノイズフィルタとして使用することができる。
As is apparent from FIG. 3, the impedance of the impedance element of this example is low in the low frequency region and high in the high frequency region. Therefore, this impedance element can be used, for example, as a noise filter in a TV tuner circuit.

【0029】図4は、長さ1をそれぞれ0.5mm
(イ)、1.0mm(ロ)、1.5mm(ハ)にした場
合の素子のインピーダンス特性を示すグラフであるが、
これもほぼ理論値と一致している。
In FIG. 4, the length 1 is 0.5 mm each.
It is a graph showing the impedance characteristics of the element when (a), 1.0 mm (b) and 1.5 mm (c).
This also agrees with the theoretical value.

【0030】上述のごとき構成によれば、素体の外形寸
法の大きさ、厚さ、ホール数、導体パターンなどを変化
させることにより任意にインピーダンスが調整でき、所
望の特性を有するビーズフィルタを構成することができ
る。また、従来のビースフィルタに取付けられていた端
子部のリード線をなくし、リードレスのチップ状素子と
することができ、自動装着装置によるインピーダンス素
子の回路への自動取付にも好適なものとなる。また素子
の活電面には絶縁膜が設けてあるので素子を基板に装着
した際に、この基板に設けられた活電部との絶縁が確実
になされる。
According to the above-mentioned configuration, the impedance can be arbitrarily adjusted by changing the outer size of the element body, the thickness, the number of holes, the conductor pattern, and the like, and a bead filter having desired characteristics is constructed. can do. Further, the lead wire of the terminal portion attached to the conventional bead filter can be eliminated to form a leadless chip-like element, which is also suitable for automatic attachment of an impedance element to a circuit by an automatic mounting device. . Moreover, since the insulating film is provided on the live surface of the element, when the element is mounted on the substrate, the element is surely insulated from the live part provided on the substrate.

【0031】複数の貫通穴が形成されたインピーダンス
素子について説明したが、図5に示すような単一の貫通
穴を有するインピーダンス素子も適用可能である。なお
図5において、図1の(a)〜(c)と同様な要素には
同じ参照符号が付してあり、構造をわかりやすくするた
め絶縁膜は省略されている。このような単一の貫通穴タ
イプのインピーダンス素子は従来のビーズフィルタと同
様の性能を発揮することはもちろん、スルーホール導
体、導体パターンを例えば導体ペーストの焼付け、ある
いはメッキ等の方法により素体と密着形成することによ
り、リードレスタイプのチップ状素子にすることがで
き、従来のリード付ビーズフィルタに比べリードによる
影響がないため特性のバラツキが少なく、又、リードの
はんだ付時取付け作業が不要となるので、自動装着装置
による自動取付に好適なものとなる。
Although the impedance element having a plurality of through holes has been described, an impedance element having a single through hole as shown in FIG. 5 is also applicable. In FIG. 5, elements similar to those in (a) to (c) of FIG. 1 are designated by the same reference numerals, and the insulating film is omitted to make the structure easy to understand. Such a single through-hole type impedance element not only exhibits the same performance as a conventional bead filter, but also a through-hole conductor and a conductor pattern are formed into a body by a method such as baking a conductor paste or plating. By forming them in close contact, a leadless type chip-shaped element can be obtained. Compared to the conventional beaded filter with leads, there is less influence from the leads, so there is less variation in characteristics, and there is no need to attach the leads when soldering. Therefore, it is suitable for automatic mounting by an automatic mounting device.

【0032】図6及び図7は、本発明の実施例を示して
いる。前述した先行例では、角板状のフェライト素体の
厚み方向、即ち基板への取り付け面を貫通する方向、に
貫通穴を設けるようにしているが、本発明の一実施例に
よれば、図6に示すように角板状の素体の幅方向に、即
ち基板への取り付け面とは異なる面11からこれと相対
向する面12に貫通穴13が設けられている。面11及
び面12上の絶縁膜は、図6では図示が省略されてい
る。また、本発明の他の実施例によれば、図7に示すよ
うに(絶縁膜省略)角板状の素体の長さ方向に、即ち基
板への取り付け面とは異なる面14からこれと相対向す
る面15に貫通穴16が設けられている。面14及び面
15上の絶縁膜は、図7では図示が省略されている。
6 and 7 show an embodiment of the present invention. In the above-mentioned prior art example, the through hole is provided in the thickness direction of the rectangular plate-shaped ferrite element body, that is, in the direction penetrating the mounting surface to the substrate, but according to one embodiment of the present invention, As shown in FIG. 6, a through hole 13 is provided in the width direction of the rectangular plate-shaped element body, that is, from the surface 11 different from the mounting surface to the substrate to the surface 12 opposite thereto. The insulating films on the surfaces 11 and 12 are not shown in FIG. Further, according to another embodiment of the present invention, as shown in FIG. 7 (insulating film omitted), from the surface 14 different from the mounting surface to the substrate in the longitudinal direction of the rectangular plate-shaped element, Through holes 16 are provided in the surfaces 15 facing each other. The insulating films on the surfaces 14 and 15 are not shown in FIG. 7.

【0033】このように、フェライト素体の基板取り付
け面とは異なる面が貫通穴の現れる活電面をなしてお
り、これら活電面に絶縁膜が形成されている。従って、
フェライト素体の基板取り付け面には絶縁膜が存在しな
いこととなり、この絶縁膜によって基板への装着時にハ
ンダの表面張力によって素子が浮き上がってしまう不都
合が未然に防止できる。その結果、インピーダンス素子
の基板実装時における装着歩留が大幅に向上する。もち
ろん、最小限の体積で大きいインピーダンスを有する非
常にサイズの小さいインピーダンス素子を提供すること
ができることはいうまでもない。また、導体パターン、
スルーホール導体等の厚さを容易に厚くすることができ
るので、Qを大きくできる利点がある。さらに、素子の
活電面を絶縁膜で覆うようにしたので、基板等に装着す
る際これらに設けられた活電部との電気的絶縁を確実に
することができる。またさらに、素子をリードレスのチ
ップ状にすることもでき、この場合、自動装着装置によ
る取付が好適に利用できる。
As described above, the surface of the ferrite element body different from the substrate mounting surface forms an active surface in which the through holes appear, and the insulating film is formed on these active surfaces. Therefore,
Since the insulating film does not exist on the board mounting surface of the ferrite body, the inconvenience that the element is lifted up by the surface tension of the solder at the time of mounting on the board can be prevented by this insulating film. As a result, the mounting yield of the impedance element when mounted on the substrate is significantly improved. It goes without saying that it is possible to provide a very small impedance element having a large impedance with a minimum volume. Also, a conductor pattern,
Since the thickness of the through-hole conductor and the like can be easily increased, there is an advantage that Q can be increased. Further, since the live surface of the element is covered with the insulating film, it is possible to ensure electrical insulation from the live parts provided in these when the element is mounted on the substrate or the like. Furthermore, the element may be in the form of a leadless chip, and in this case, mounting by an automatic mounting device can be preferably used.

【0034】なお、本発明では、導体が直線状であって
コイルを形成していないので、コイルを形成した場合に
比べてインダクタンス成分が小さくなる。このことは、
コイルを形成した場合に比べて、インダクタンスによる
共振周波数が高く、より高い周波数で大きなインピーダ
ンスを有することを意味し、ノイズフィルタなどに応用
した際にノイズ除去の効果が非常に大きい。
In the present invention, since the conductor is linear and does not form a coil, the inductance component becomes smaller than that when a coil is formed. This is
This means that the resonance frequency due to the inductance is higher and the impedance is higher at a higher frequency than in the case where a coil is formed, and when applied to a noise filter or the like, the effect of removing noise is very large.

【0035】[0035]

【発明の効果】以上詳細に説明したように本発明によれ
ば、角板状のフェライト素体の基板取り付け面とは異な
る相対向する第1の面及び第2の面間を貫通する少なく
とも1つの貫通穴を設け、該貫通穴内に貫通導体を設
け、貫通穴が1つの場合は該貫通導体の両端を、貫通穴
が複数の場合は複数の該貫通導体を導体パターンを介し
て直列接続してなる電気的結合体の両端をフェライト素
体の基板取り付け面とは異なる相対向する第3の面及び
第4の面にそれぞれ形成された電極面とそれぞれ接続さ
せ、活電面をなす上述の第1の面及び第2の面のうちの
少なくとも一方に絶縁膜を設けているので、フェライト
素体の基板取り付け面には絶縁膜が存在しないこととな
り、この絶縁膜によって基板への装着時にハンダの表面
張力によって素子が浮き上がってしまう不都合が未然に
防止できる。その結果、インピーダンス素子の基板実装
時における装着歩留が大幅に向上する。もちろん、最小
限の体積で大きいインピーダンスを有する非常にサイズ
の小さいインピーダンス素子を提供することができるこ
とはいうまでもない。
As described above in detail, according to the present invention, at least one of the rectangular plate-shaped ferrite element bodies which penetrates between the first surface and the second surface which are different from the substrate mounting surface and which face each other. One through hole is provided, and a through conductor is provided in the through hole. When there is one through hole, both ends of the through conductor are connected, and when there are a plurality of through holes, a plurality of the through conductors are connected in series through a conductor pattern. The both ends of the electrical coupling body formed as described above are respectively connected to the electrode surfaces formed on the third surface and the fourth surface, which are different from the substrate mounting surface of the ferrite element body and face each other, and form the live surface. Since the insulating film is provided on at least one of the first surface and the second surface, the insulating film does not exist on the board mounting surface of the ferrite element body, and the insulating film prevents the solder from being attached to the board. The surface tension of Will up come inconvenience can be prevented in advance. As a result, the mounting yield of the impedance element when mounted on the substrate is significantly improved. It goes without saying that it is possible to provide a very small impedance element having a large impedance with a minimum volume.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)〜(c)はそれぞれ本発明に先行するイ
ンピーダンス素子の平面図、底面図、断面図である。
1A to 1C are a plan view, a bottom view, and a sectional view of an impedance element prior to the present invention.

【図2】理論説明のためのインピーダンス素子の模式図
である。
FIG. 2 is a schematic diagram of an impedance element for theoretical explanation.

【図3】6穴の素子における周波数−インピーダンス特
性の測定結果を示すグラフである。
FIG. 3 is a graph showing the measurement results of frequency-impedance characteristics of a device with 6 holes.

【図4】位置を変えた場合のインピーダンス推移の測定
結果を示すグラフである。
FIG. 4 is a graph showing measurement results of impedance transition when the position is changed.

【図5】単一の貫通穴タイプのインピーダンス素子に適
用した例の平面図である。
FIG. 5 is a plan view of an example applied to a single through-hole type impedance element.

【図6】素体の幅方向に貫通穴が設けられた本発明の一
実施例を示す斜視図である。
FIG. 6 is a perspective view showing an embodiment of the present invention in which a through hole is provided in the width direction of the element body.

【図7】素体の長さ方向に貫通穴が設けられた本発明の
他の実施例を示す斜視図である。
FIG. 7 is a perspective view showing another embodiment of the present invention in which a through hole is provided in the length direction of the element body.

【符号の説明】[Explanation of symbols]

1 回路素子 2 フェライト素体 3、13、16 貫通穴 4 スルーホール導体 7 導体パターン 8 電極 10 絶縁膜 11、12、14、15 面 1 Circuit Element 2 Ferrite Element 3, 13, 16 Through Hole 4 Through Hole Conductor 7 Conductor Pattern 8 Electrode 10 Insulating Film 11, 12, 14, 15 Surface

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 角板状のフェライト素体の基板取り付け
面とは異なる相対向する第1の面及び第2の面間を貫通
する少なくとも1つの貫通穴を設け、該貫通穴内に貫通
導体を設け、該貫通導体の両端又は複数の該貫通導体を
導体パターンを介して直列接続してなる電気的結合体の
両端を前記フェライト素体の基板取り付け面とは異なる
相対向する第3の面及び第4の面にそれぞれ形成された
電極面とそれぞれ接続させ、活電面をなす前記第1の面
及び第2の面のうちの少なくとも一方に絶縁膜を設けた
ことを特徴とするインピーダンス素子。
1. A rectangular plate-shaped ferrite element is provided with at least one through hole penetrating between a first surface and a second surface opposite to each other different from a board mounting surface, and a through conductor is provided in the through hole. A third surface, which is provided on both ends of the through conductor or both ends of an electrical coupling body in which a plurality of the through conductors are connected in series via a conductor pattern, is opposite to the substrate mounting surface of the ferrite element body and faces each other. An impedance element, characterized in that an insulating film is provided on at least one of the first surface and the second surface, which are connected to the electrode surfaces respectively formed on the fourth surfaces and are active surfaces.
【請求項2】 角板状のフェライト素体の基板取り付け
面とは異なる相対向する第1の面及び第2の面間を貫通
する複数の貫通穴を設け、該各貫通穴内にそれぞれ貫通
導体を設け、複数の該貫通導体を導体パターンを介して
直列接続してなる電気的結合体の両端を前記フェライト
素体の基板取り付け面とは異なる相対向する第3の面及
び第4の面にそれぞれ形成された電極面とそれぞれ接続
させ、活電面をなす前記第1の面及び第2の面のうちの
少なくとも一方に絶縁膜を設けたことを特徴とするイン
ピーダンス素子。
2. A plurality of through holes penetrating between a first surface and a second surface of the rectangular plate-shaped ferrite body different from the board mounting surface and facing each other, and each of the through holes has a through conductor. And a plurality of the through conductors connected in series via a conductor pattern to both ends of an electrical coupling body on a third surface and a fourth surface opposite to the board mounting surface of the ferrite element body. An impedance element, characterized in that an insulating film is provided on at least one of the first surface and the second surface, which are connected to the respective formed electrode surfaces and form an active surface.
【請求項3】 前記電気的結合体が、前記各貫通導体を
隣接した貫通穴の貫通導体相互による磁束のうち消しあ
いがないよう連続的に直列接続したものであることを特
徴とする請求項2に記載のインピーダンス素子。
3. The electrical coupling body is formed by continuously connecting the through conductors in series so that magnetic fluxes generated by the through conductors in adjacent through holes do not cancel each other. 2. The impedance element according to 2.
JP5165951A 1993-06-14 1993-06-14 Method for manufacturing impedance element Expired - Lifetime JP2868198B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5165951A JP2868198B2 (en) 1993-06-14 1993-06-14 Method for manufacturing impedance element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5165951A JP2868198B2 (en) 1993-06-14 1993-06-14 Method for manufacturing impedance element

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP17006984A Division JPH0227808B2 (en) 1984-08-16 1984-08-16 INPIIDANSUSOSHI

Publications (2)

Publication Number Publication Date
JPH06163272A true JPH06163272A (en) 1994-06-10
JP2868198B2 JP2868198B2 (en) 1999-03-10

Family

ID=15822120

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5165951A Expired - Lifetime JP2868198B2 (en) 1993-06-14 1993-06-14 Method for manufacturing impedance element

Country Status (1)

Country Link
JP (1) JP2868198B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6791444B1 (en) * 1994-10-19 2004-09-14 Taiyo Yuden Kabushiki Kaisha Chip inductor, chip inductor array and method of manufacturing same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56140252A (en) * 1980-03-31 1981-11-02 Sharp Corp Diagnostic apparatus for quality of hair and detecting apparatus for setting time of permanent wave
JPS5856415U (en) * 1981-10-09 1983-04-16 ティーディーケイ株式会社 chip inductor
JPS5889818A (en) * 1981-11-20 1983-05-28 Matsushita Electric Ind Co Ltd Manufacture of chip inductor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56140252A (en) * 1980-03-31 1981-11-02 Sharp Corp Diagnostic apparatus for quality of hair and detecting apparatus for setting time of permanent wave
JPS5856415U (en) * 1981-10-09 1983-04-16 ティーディーケイ株式会社 chip inductor
JPS5889818A (en) * 1981-11-20 1983-05-28 Matsushita Electric Ind Co Ltd Manufacture of chip inductor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6791444B1 (en) * 1994-10-19 2004-09-14 Taiyo Yuden Kabushiki Kaisha Chip inductor, chip inductor array and method of manufacturing same

Also Published As

Publication number Publication date
JP2868198B2 (en) 1999-03-10

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