JPH06152657A - Data transfer system - Google Patents

Abstract

PURPOSE:To improve the availability of a memory area by providing a means giving a control command between reception data to an external interface thereby simplifying data extract control from a communication memory. CONSTITUTION:A communication protocol control circuit 1 controls a protocol of a communication block. Furthermore, a communication interface memory 2 is a memory storing all communicated signals and a status memory 3 is a memory writing status to inform write area information or the like of reception data. A communication interface control circuit 4 controls the extraction of a data area from the signal received by the communication protocol control circuit 1. Furthermore, the control circuit 4 controls the command of the communication protocol control or the like in response to the state of data area read by an external interface. The control circuit 5 controls an external interface and a buffer memory 6 extracts data for sending the data to the outside.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to data transfer between a communication device for transmitting and receiving data while performing polling and an external interface for transferring only communication data outside the communication device. .

[0002]

2. Description of the Related Art Conventionally, when digital data is communicated by a wireless communication device or the like, a protocol having a resending procedure as well as error correction is used because of the problem of line quality, and the resending procedure is easy for data transmission. HDLC (High Level Data Link Contro)
It is realized by polling according to the procedures such as l Procedure).

In the data communication procedure using this polling, a command (for example, SAB) for connecting a link is used.
Commands such as M: Set Asynchronous Balanced Mode command, a transmission / reception confirmation command (for example, RR: Receive Ready command), a resend request command (Rej: Reject command), and a response are exchanged in addition to data.

As shown in FIG. 4, the code for this communication control is stored between data (I frames) in the memory, and for the external interface, the head of the memory in which the I frame is written. It becomes possible to read by giving the address and the number of data bytes.

[0005]

However, in the above-mentioned conventional example, since the entire memory area is used, the memory utilization efficiency is improved, but the address required to read data from the external interface is increased. There is a problem that the amount of information and the number of data bytes is increased, and the determination of the control of the unused area of the memory becomes complicated.

The present invention provides a data transfer method which can simplify the control of extracting data from the communication memory, simplify the monitoring control of the unused area of the communication memory, and improve the utilization efficiency of the memory area. With the goal.

[0007]

According to the present invention, a memory for data communication is divided into areas each having a maximum frame size (maximum number of bits transmitted / received in one frame as an I frame), and the divided areas are updated every reception. Means for indicating the beginning of an area for receiving data (I frame), a means for indicating the number of data areas continuously received from this area, and a control command between I and I frames. By having the means shown in the external interface, the external interface control circuit can have a fixed map of the divided memory areas, simplifying the control of extracting the data from the communication memory, and the communication memory. The monitoring control of the unused area can be simplified, and the utilization efficiency of the memory area can be improved.

[0008]

1 is a block diagram showing a protocol control circuit of a data communication device and a control circuit of an external interface in an embodiment of the present invention.

In FIG. 1, a radio protocol control circuit 1
Is a circuit for controlling the protocol of the wireless section. The communication memory 2 is a memory that stores all signals to be communicated, and the status memory 3 is a memory that writes a status for notifying write area information of received data and the like.

FIG. 2 is a schematic diagram showing the contents of the memory map in this embodiment.

In FIG. 2, pointers 3-1 and 3-
Reference numerals 3, 3-5, and 3-9 indicate RX values (values of RXD1 to 32) in the first area of the data reception block.
D write pointer.

Pointers 3-2, 3-4, 3-6, 3-
Reference numerals 8 and 3-10 are pointers indicating the number of RXD valid points indicating the number of areas in which continuous data is written from the area indicated by the RXD write pointer.

The pointer 3-11 is an RXD read pointer showing a value up to a point read by the data written in the communication memory 3 by the external interface.

The pointer 3-12 is an RXD write pointer number indicating the write point value next to the RXD write pointer. For example, when data is written up to RXD3-3, the value 3 indicating the next block is taken.

The pointer 3-13 is an RXD that updates the points of the divided areas in the communication memory 3 each time it is received.
The current write pointer.

Next, in FIG. 1, the communication interface control circuit 4 controls the communication protocol according to the control for extracting the data area from the signal received from the communication protocol control circuit 1 and the state of the data area read by the external interface. This is a circuit that performs control such as control instructions.

The control circuit 5 is a circuit for controlling an external interface, and the buffer memory 6 is an external interface buffer memory for drawing out data for sending only data to the outside.

FIG. 3 is a state transition diagram showing an example of data communication control in this embodiment. The operation of each pointer will be described below according to the data communication procedure.

First, when there is transmission data from the data transmission side, the SAB is transmitted from the transmission side communication interface.
The M signal is transmitted. This SABM signal is received by the communication protocol control circuit 1 of the receiving side communication interface, and is used as a signal in the area 1 (RXD) of the communication memory 2.
In addition to being written in 1), a reception notification signal is sent to the communication interface control circuit 4.

Upon receiving this signal, the communication interface control circuit 4 reads the signal from the area of RXD1 of the communication memory 2 and then outputs a link connection response signal transmission instruction to the communication protocol control circuit 1. Upon receiving this signal, the communication protocol control circuit 1 sends a UA response as a link connection response signal, and ends the link connection operation.

When the connection of this link is completed, the communication interface on the data transmission side transmits the data (I frame) up to the maximum number of unconfirmed transmission packets (for example, I _{1-1 to} I).
After sending up to _1-7 ), wait for receipt confirmation response.

The communication protocol control circuit 1, which has received the data packet I _1-1 , sends out a normal signal reception notification to the communication interface 4 as described above when the received data has no error, and the received data communication memory Area RX of 2
Transfer to D2.

Upon receipt of this signal, the communication control interface sets the value of the current write pointer 3-13 to 2, RXD.
The value of the write pointer is set to 1, and the value of the RXD write pointer number 3-12 is set to 1.

Next, when the data packet I _1-2 is received, the value of the RXD original writing pointer 3-13 is updated to 3, and further, the value is incremented by _{1 when} the data packet I _1-3 is received. The update operation is continued until the communication protocol control circuit 1 outputs an acknowledgment request signal, an I-frame damage display signal, or a reception sequence number error signal.

Then, for example, when the confirmation response request signal is sent from the communication protocol control circuit 1, the communication interface control circuit 4 writes the value at the beginning of the reception data pointer (that is, RXD2) to the RXD write pointer 3-1. After writing the number of received I frames (7 in this case), RXD read pointer 3-11 and RXD
If the value of the RXD current write pointer 3-13 is compared with the value of the RXD current write pointer 3-13 and the value of the RXD read pointer match, the received busy acknowledge signal (RNR) is compared. ) Is sent to the communication protocol control circuit 1, and if they do not match, the sending instruction signal of the confirmation response signal (RR) is sent to the communication protocol control circuit 1. After that, the RXD write pointer number 3-12 is updated (pointer number is set to 2) and the reception is waited.

When the RXD write pointer number 3-13 is updated, the external interface control circuit 5 causes the RX
The value of the D write pointer 3-1 is read, the value of the address map corresponding to the value indicated by the RXD pointer 2 is set in the internal register, and then the RXD valid pointer 3-2
Read the value of and set the number of valid data frames.

Then, the external interface control circuit 5
Transfers the received data to the external interface buffer memory 6 according to the address information, sets the value of the RXD read pointer 3-11 to 8 after the transfer, and sets the RXD write pointer 3-1 and the RXD valid point number 3 After clearing the value of -2, the contents of the RXD write pointer indicated by RXD write pointer number 3-12, the value of the RXD valid point number, and the value of the RXD write pointer are monitored, and the value is written to the RXD valid point number. At that time, the data is transferred by the same operation as described above.

When data is damaged during reception of an I frame, the communication protocol control circuit 1 sends a data reception error signal to the communication interface control circuit 4. When the communication interface control circuit 4 receiving this has already successfully received some data frames, the communication interface control circuit 4 performs the same operation as described above.
The RXD write pointer and the number of RXD valid points are updated, and the value of the RXD current write pointer 3-13 is updated each time the RXD write pointer is subsequently received. Receiving this, the external interface control circuit 5 updates the RXD read pointer 3-11 to a value obtained by subtracting -1 from the value indicated by the RXD current write pointer, after transferring data by the same operation as described above.

Also, when an I frame reception sequence number error is received, the same operation as described above is performed.

In the above embodiment, even when an I frame reception sequence number error occurs, the area of the communication memory 2 is updated when the I frame is subsequently received. At the time of occurrence, it is possible to instruct the communication protocol control circuit 1 not to update the allocation of the area of the communication memory 2.

If the external interface is configured to simply send data, the external interface buffer memory 6 can be omitted. Also,
The external interface control circuit 5 can be shared by the communication interface control circuit 4, and a direct memory access controller can be used instead of the external interface control circuit 5.

[0032]

As described above, according to the present invention,
In the control circuit of the external interface, it becomes possible to have a fixed map of the divided memory area,
Control of data extraction from the communication memory is simplified,
Moreover, the monitoring control of the unused area of the communication memory can be simplified, and the utilization efficiency of the memory area can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a schematic diagram showing the contents of a memory map in the above embodiment.

FIG. 3 is a state transition diagram showing an example of data communication control in the above embodiment.

FIG. 4 is a schematic diagram showing a structure of communication data.

[Explanation of symbols]

 1 ... Wireless protocol control circuit, 2 ... Communication memory, 3 ... Status memory, 4 ... Communication interface control circuit, 5 ... External interface control circuit, 6 ... Buffer memory.

Claims (1)

[Claims] 1. A communication interface circuit having a control circuit for controlling a communication protocol and a communication memory for storing all signals to be communicated; an external interface memory for extracting and storing only data sent by communication. And an external interface circuit having a control circuit for controlling transmission of data from the memory to the outside; a communication interface control circuit for controlling data transfer in each interface circuit; In a communication device that performs communication, storage means for circulating an area of the communication memory to store a received signal; first pointer means for indicating an area written in the communication memory; and in the communication memory. , The beginning of the area where the data is written, and the A second pointer means for indicating the number of blocks; and an updating means for advancing the value of the first pointer means according to the position of the communication control signal between the received data and the received data; method.