JPH06152349A - Control device and image formation device - Google Patents

Abstract

PURPOSE:To provide a control device and an image formation device capable of simplifying constitution without reducing control accuracy and reducing a chip area to be integrated on one chip. CONSTITUTION:Signals are time-dividedly selected from external input terminals P2-1 to P2-4 by an analog multiprocessor 6 and each selection signal is compared with a reference signal Vr1 outputted from a D/A converter 2 by a comparator 3. An electronic switch circuit 8 responding to the compared output switches and outputs a control limit signal Vr2 outputted from the D/A converter 2 and ground potential. Electronic switches S3-1 to S3-4 distribute the output of the circuit 8 to integrating circuits R1-1, C1-1 to R1-4, C1-4 synchronously with the multiplexer 6. Comparators Q1-1 to Q1-4 compare the output of the integrating circuit with the output of a triangular wave generating circuit 4 and output the compared outputs to external output terminals P1-1 to P1-4 as PWM signals.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a controller suitable for an image forming apparatus such as a copying machine or a printer, and an image forming apparatus using this controller.

[0002]

2. Description of the Related Art Conventionally, a control circuit including an error amplifier for comparing an output detection signal with a reference value and a PWM circuit for obtaining a pulse width signal according to the output of the error amplifier is individually provided for one controlled device. Was generally formed.

In response to the recent progress in semiconductor technology, a digital control method has been proposed in which an output detection signal is A-D converted and fetched in a microcomputer, and a pulse width is controlled according to a calculation result. It is not generalized in terms of speed and cost performance.

In order to solve both the speed and the cost, the present applicants drive the output of a large number of controlled devices and the control data of the microcomputer D-A by driving one comparator in a time division manner. We proposed a method to obtain a PWM output by comparing the analog converted value with a converter and controlling the counter according to the comparison result. This proposal also proposes a method in which the output of the time-divided comparator is directly input to the drive circuit of the control target device to simplify the configuration.

[0005]

In the proposed method, the error amplifier is changed to a comparator, and the comparator and the DA converter are shared by a large number of control systems by time division, so that the connection terminal with the external circuit is connected. The number was reduced as much as possible and the increase in the chip area was suppressed.

However, since the PWM circuit section is composed of a counter, the number of elements constituting the circuit is increased, and the number of PWM circuits cannot be increased to suppress the chip area, resulting in a comparator output. I had no choice but to use a simple control method that directly inputs the signal to the drive circuit.

For this reason, in a system using a simple control method, the control frequency fluctuates greatly in response to load fluctuations and input fluctuations, which causes stress on the switching transistors of the drive circuit and fluctuations in output. I was invited.

The present invention has been made to solve such a problem, and can simplify the configuration without lowering the control accuracy and reduce the chip area when integrated on one chip. An object is to provide an image forming apparatus.

[0009]

In order to achieve the above-mentioned object, in the present invention, the control device is configured as in the following (1) to (7), and the image forming apparatus is configured in the following (8). Constitute.

(1) A DA converter that outputs a variable reference signal and a variable control limit signal, an analog multiplexer that selects and outputs one signal from a plurality of external input terminals in a time division manner, and this analog multiplexer. A first comparator for comparing an output with a reference signal output of the DA converter, and a first comparator for switching and outputting a control limit signal output of the DA converter and a ground potential according to the output of the first comparator. Second switch, a plurality of time constant circuits, and a second output that switches the output of the first switch to the respective time constant circuits of the plurality of time constant circuits in synchronization with the time division timing of the analog multiplexer. Switch, a triangular wave generating circuit, a plurality of external output terminals, an output of each of the time constant circuits and an output of the triangular wave generating circuit Controller having a plurality of comparators of the second and subsequent output to the external output terminal of each comparison compares outputs of the plurality of external output terminals.

(2) A DA converter that outputs a variable reference signal and a variable control limit signal, an analog multiplexer that selects and outputs one signal from a plurality of external input terminals in a time division manner, and this analog multiplexer. A first comparator for comparing an output and a reference signal output of the DA converter, and a first switch for switching and outputting a positive constant current output and a negative constant current output in accordance with the output of the first comparator. A limiting circuit that limits one of the positive constant current output and the negative constant current output with the control limit value, a plurality of capacitors, and the first switch in synchronization with the time division timing of the analog multiplexer. Switch for switching and outputting the output of each of the plurality of capacitors to each of the capacitors, a triangular wave generating circuit, and a plurality of external output terminals , The control device including a plurality of comparators of the second and subsequent outputting the comparison output by comparing the output of the output and the triangular wave generation circuit of the respective capacitor to the external output terminal of each of the plurality of external output terminals.

(3) A control device in which the control device according to the above (1) or (2), a microcomputer, and peripheral circuits of this microcomputer are integrated on one chip.

(4) The control device according to (3), which comprises successive approximation type A / D conversion means composed of a D-A converter and a microcomputer.

(5) The self-diagnosis means for sending a predetermined signal from the D-A converter to the two inputs of the first comparator and performing self-diagnosis of the first comparator by the output of the first comparator. (3) The control device as described above.

(6) A predetermined signal is sent from the DA converter to one input of the first comparator to perform the successive approximation A / D conversion, and the successive approximation system A-
The control device according to (4), further including self-diagnosis means for performing self-diagnosis of the D conversion means.

(7) A pulse width-voltage conversion circuit externally connected between the external output terminal and the external input terminal, and a successive approximation method A-
The control device according to (4) above, further including a PWM circuit self-diagnosis means having a D conversion means.

(8) Each output detection circuit of a power supply device, an exposure device, a fixing device, a motor drive device, etc. is connected to each external input terminal of the control device according to any one of (1) to (7) above, An image forming apparatus in which drive circuits such as the power supply device, the exposure device, the fixing device, and the motor drive device are connected to the respective external output terminals of the control device.

[0018]

With the configurations described in (1) to (7) above, each signal of the external input terminal is compared with the reference signal in a time division manner, and by this comparison output, one input of the second and subsequent comparators is controlled in a time division manner. To be done. One input of this comparator,
The other input, the triangular wave, is compared, and the comparison output, P
The WM output is supplied to the external output terminal. In addition to this,
In the configuration described in (4) above, the DA converter and the microcomputer perform A-D conversion by a successive approximation method. In the configuration described in (5) above, self-diagnosis of the first comparator is performed, and ) In the described configuration, the successive approximation method A
The self-diagnosis of the -D conversion means is performed, and the PWM circuit is self-diagnosed in the configuration (7).

In the image forming apparatus described in (8), the PWM of the power supply device, the exposure device, the fixing device, the motor drive device, etc.
Take control.

[0020]

EXAMPLES The present invention will be described in detail below with reference to examples.

(Embodiment 1) FIG. 1 is a block diagram of a "control device" which is Embodiment 1, and FIG. 2 is a timing chart thereof. The circuits of this embodiment are all integrated on one chip.

In FIG. 1, reference numeral 1 denotes a microcomputer, which internally has a CPU core, memories such as ROM and RAM, and peripheral circuits such as various timers. Although not shown externally, various sequence control inputs and outputs are provided. The ends are connected. A timing circuit 5 divides the clock signal of the microcomputer 1 or the output signal of the timer circuit to generate a DA converter 2 and an analog multiplexer 6.
The time-division signals (a) to (d) and the sampling signals (e) to (h) output from the electronic switch circuit 8 are applied as control signals to the respective circuits.

P1-1 to P1-4 are PWM output terminals, which are external output terminals, and include a power supply device outside the chip, an exposure device,
It is connected to drive circuits of various control systems such as a fixing device and a motor drive device. P2-1 to P2-4 are respectively P1-1
Is an external input terminal to which the output detection signal of the control system corresponding to P1-4 is input.

The high-precision comparator 3 compares the signal selected by the analog multiplexer 6 with the first output Vr1 of the DA converter 2. The reference signals of various control systems are output to the first output Vr1 of the DA converter 2 while being switched for each control system in accordance with the time division timing.

The output of the comparator 3 is input to the circuit 8 as a drive pulse for the electronic switch circuit 8. The output of the electronic switch circuit 8 is D-, depending on the output of the comparator 3.
The second output voltage Vr2 of the A converter 2 is switched to the ground potential. Second output V of D-A converter 2
r2 gives the limit value (maximum pulse width) of the PWM output according to the characteristics of the drive circuits of various control systems. By controlling the programming of the second output Vr2, it becomes possible to control the output timing of the control system, soft start, soft stop and the like.

The output of the electronic switch circuit 8 is input to the integrating circuits connected to the one-sided inputs of the comparators Q1-1 to Q1-4, respectively, via the electronic switches S3-1 to S3-4. Integrating capacitors C1-1 to C1 of the integrating circuit
-4 is a predetermined time constant at the timing when the switch S3 is closed as shown in (l) of FIG. 2. Charging / discharging is performed according to the output of the comparator 3, and the charges are held at other timings. Keep the state.

Comparators Q1-1 to Q1-4 compare the potential of the integrating capacitor C1 and the triangular wave from the triangular wave generating circuit 4 applied to the other input, and output a PWM output (wo). This PWM output is the external terminal P1-
1 to P1-4 are supplied to the corresponding drive circuits of the control system.

The operation of this embodiment will be described below with reference to the operation example shown in FIG. At time t1, the analog multiplexer 6 selects the input terminal P2-1 as shown in FIG. 2A by the control signal of the timing circuit 5, and the control system connected to this input terminal P2-1. The output detection signal is supplied to one input terminal of the comparator 3. The DA converter 2 time-divisionally converts the reference signal of the control system by the control signal of the timing circuit 5, and the converted reference signal Vr1 is supplied to the other input terminal of the comparator 3.

At time t1, since the output detection signal of the input terminal P2-1 is smaller than the reference signal, the comparator 3 outputs the "H" level as shown in FIG.
The DA converter 2 also supplies a control limit signal Vr2, which gives a control limit value of the PWM output of the control system, to the electronic switch circuit 8. The electronic switches S1 and S2 of the electronic switch circuit 8 are controlled by the output “H” of the comparator 3
Since they are on and off respectively, each electronic switch S1-1
The control limit signal Vr2 is supplied from the DA converter 2 to one end of S3-4.

The electronic switches S3-1 to S3-4 are turned on at the timings shown in FIGS. 2 (e) to 2 (h), and the electronic switch S3-1 is turned on from the time t1 to t2. The signal Vr2 is supplied to the integrating circuit including the resistor R1-1 and the integrating capacitor C1-1, the potential of the integrating capacitor C1-1 rises as shown in FIG. 2L, and the value at time t2 is held. .

The negative input terminal of the comparator Q1-1 is
The triangular wave generating circuit 4 supplies the triangular wave shown in FIG. 2 (i), while the + input terminal has an integrating capacitor C1-
Since the voltage of 1 is supplied, the comparator Q1-1
As shown in FIG. 2 (o), a PWM output having a duty increased from the previous time is obtained from the time t2 to the time t3 at the output terminal P1-1.

Also at time t3, the output detection signal of the control system connected to the input terminal P2-1 of the analog multiplexer 6 is smaller than the reference signal, so that the integration capacitor C1-1 is further charged and the potential rises, A PWM output with a further increased duty is obtained at the output terminal P1-1 of the comparator Q1-1.

The upper limit of the potential of the integrating capacitor C1-1 is D
Since it is determined by the value of the control limit signal Vr2 output from the -A converter 2, the control such as the output timing of the control characteristic peculiar to the control system connected to the output terminal P1-1, the soft start and the soft stop can be performed. it can.

At time t4, since the output detection signal of the control system connected to the input terminal P2-1 is larger than the reference signal, the output of the comparator 3 becomes "L" and PW
The control limit signal Vr2 of M output is cut by the electronic switch S1, the integration capacitor C1-1 is grounded through the resistor R1-1, the electronic switches S3-1 and S2, and the potential of the integration capacitor C1-1 is as shown in FIG. It decreases as shown in (l). Therefore, the duty of the PWM output of the output terminal P1-1 decreases from the previous time as shown in FIG.

The respective control systems connected to the other input terminals P2-2 to P2-4 of the analog multiplexer 6 operate similarly in a time division manner.

As described above, in the present embodiment, the configuration can be simplified by sharing the DA converter 2 and the comparator 3 in a large number of control systems in a time division manner, and the microcomputer 1
Thus, it is possible to perform control with the control characteristic peculiar to each control system.

(Second Embodiment) FIG. 3 is a block diagram of the second embodiment, and FIG. 4 is a timing chart of the second embodiment.
In this embodiment, the high precision comparator 3 and the DA comparator 2-1 are made to operate not only the control circuit but also the AD converter. The A / D conversion input signal is input to the input terminal P2-5 of the analog multiplexer 6 in the same manner as the output detection signal of the control system.

As shown in FIG. 4, at the time division timing of A-D conversion, the first output V of the DA converter 2-1 is output.
First, 1/2 MSB is output to r1 and is compared with the AD conversion input by the comparator 3. As shown in FIG. 4F, according to the comparison result of the comparator 3, the first output V
Levels of 1/4, 1/8, and 1/16 are sequentially added to and subtracted from r1 to determine an AD conversion value. In this way, the successive approximation method AD conversion is performed. Although an example of 4-bit conversion is shown in FIG. 4 for ease of illustration, it goes without saying that the number of bits can be freely selected.

As shown in FIG. 4, the 1-bit processing of the A-D conversion is performed at a time division timing parallel to the timing of one channel of the PWM processing. Further, the third output Vr3 of the D-A converter 2 is the analog multiplexer 6
Connected to the input of the D-A converter 2-1 and the analog multiplexer 6 and the comparator 3 by the self-diagnosis programming at the time of manufacturing this chip.
The conversion accuracy is measured, and the result is sent to an external device via a communication means such as a serial interface or an external bus.

(Third Embodiment) FIG. 5 is a block diagram of the third embodiment. In the second embodiment, an example of 1-channel A-D conversion is shown, but this embodiment is an example in which multi-channel A-D conversion is enabled.

The analog multiplexer 9 time-divisionally inputs the analog signals input to the external input terminals P3-1 to P3-4 to the analog multiplexer 6.

Instead of time division by the analog multiplexer 9, A-
It is also possible to select the D conversion input. Also, D-A
The third output of the converter 2-2 is connected to the inputs of the analog multiplexers 6 and 9, and the self-diagnosis programming at the time of manufacturing this chip comprehensively determines the accuracy of the DA converter, the analog multiplexer, and the comparator. −
It is measured as D conversion accuracy, and the result is sent to an external device through a communication means such as a serial interface or an external bus.

(Fourth Embodiment) FIG. 6 is a block diagram of the fourth embodiment. Since the integration capacitors C1-1 to C1-4 are formed on the silicon chip, their capacitance is at most p.
Limited to F. Therefore, in order to obtain an appropriate charge / discharge speed, it is necessary to limit the charge / discharge current to 1 μA or less,
The values of the resistors R1-1 to R1-4 of Examples 1 to 3 are high resistances of 1 MΩ or more, and it is very difficult to form such high resistance and high precision resistors on the chip. Even if it is forcibly formed, the charging / discharging speed greatly varies, and there is a risk that the loop response of the control system becomes unstable. In order to eliminate such a risk, the conditions for the phase correction in the external circuit become strict and the adjustment of the correction circuit becomes necessary.

In this embodiment, positive and negative standard current sources are provided, and the current sources are switched by the electronic switch circuit 8-1 to eliminate the resistors R1-1 to R4-1.

Q41 and Q42 of the electronic switch circuit 8-1
Is a current mirror circuit, which supplies the switches S1 and S2 with currents which are substantially equal to the external standard current source currents supplied through the external terminals P4 and P5, respectively.

Reference numeral 41 is a limiter circuit, which is a current mirror circuit Q.
The maximum voltage level of the output of 41 is the second of the D-A converter
Output Vr2 or less. Second D-A converter
Output Vr2 of each of the terminals P1-1 to P1- for each control system.
It is provided by the built-in programming of the microcomputer 1 so that the optimum control limits are supplied to the drive circuit connected to 4.

In this embodiment, among the analog circuits such as the comparator, the DA converter, the PWM circuit, etc., the comparator 3 which requires high accuracy is of the charge control type,
The internal comparators Q1-1 to Q1-4 of the WM circuit are configured with a circuit having a minimum element configuration with low accuracy, and it is possible to eliminate an error amplifier which is indispensable for a conventional control circuit. C is required due to the configuration that avoids the mounting of resistors and capacitors required on the chip.
It can be manufactured by the MOS process.

(Fifth Embodiment) FIG. 7 shows a timing chart of a control program of a microcomputer in the fifth embodiment, and FIG. 8 shows a flow chart of the fifth embodiment. The hardware configuration is the same as in FIG.

In the present embodiment, P clarified in the fourth embodiment
The WM output limiting function is further developed to have a soft start function according to the characteristic peculiar to the drive circuit of the control system when the output of each control system rises.

The control program of PWM1 to PWM4 as shown in FIG. 8 is interrupted by the main program by the interrupt signal (shown in FIG. 7 (Y)) generated by the hard timer and the timing control circuit, and the predetermined repetition is performed. It is time-divided by frequency and switched to individual PWM control subprograms. The sampling pulse of each PWM circuit shown in FIGS. 7N to 7M, that is, the drive pulse of the switches S3-1 to S3-4 in FIG. 6 is generated after the end of each control program.

The PWM1 subprogram will be described with reference to FIG. When the subprogram of PWM1 is accessed by the interrupt signal, the flag A indicating the generation state of the output of PWM1 set by the main program, the variable P1 that determines the step width of the rising edge of the PWM output, and the limit value of the PWM output are set. The value of the variable M1 to be determined is read (S1).

If the flag A is 0, the DA converter 2
The data memory X1 (not shown) dedicated to PWM1 which is one of the inputs of -3 is set to 0. In this state, the DA converter 2
The output 2 of -3 becomes zero, and the output of the current mirror circuit Q41 of the electronic switch circuit 8-1 is set to be equal to or lower than the negative peak of the triangular wave. Therefore, no PWM output is generated at the external output terminal P1-1 (S6). . When the flag A changes to 1, X1 is set to P
Set to 1. The value of P1 is added for each control timing of PWM1 (S3). The output of the PWM1 is applied to the drive circuit of the control system, and the output of the comparator 3 keeps the switch S1 of the electronic switch circuit 8-1 conductive until the output of the control system reaches the target (S4, NO). The charging voltage of −1 continues to increase, and the PWM1 output (duty) increases at each control timing.

When the output of the control system reaches the target, the output of the comparator 3 repeats inversion according to the increase / decrease of the detection signal of the output of the control system, and the PWM output is stabilized with the minimum pulse width fluctuation.

When the value of X1 exceeds the limit value M1, X1 becomes M
It is changed to 1 (S5), and the output of the current mirror circuit Q41 is held at the voltage level corresponding to the digital output M1.

An abnormality in the control system drive circuit or output detection circuit,
When the output of the comparator 3 remains selected in the switch S1 due to a large deviation of the load of the control system from the proper value or the like, the charging voltage of the capacitor C1-1 remains held at its limit value.

The circuit of PWM1 has been described above.
It goes without saying that optimum control of the soft start can be performed in other PWM circuits according to the connected drive circuits.

(Sixth Embodiment) FIG. 9 is a block diagram of the sixth embodiment. The present embodiment relates to an inspection at the time of manufacturing a chip, and in particular, an inspection of an analog circuit portion can be performed in the same step as a general digital dedicated LSI.
By switching the inspection mode changeover switch S61 connected to the external connection terminal P7 to the ground, the CPU1
Is switched to the self-diagnosis program.

Further, the PWM output terminals P1-1 to P1-4
Are connected to integration circuits 61-1 to 61-4, respectively, to convert each PWM output into pulse width-voltage. This converted output is input to the analog multiplexer 6 via the external input terminals P2-1 to P2-4.

With this configuration, the accuracy check of the DA converter 2-4, the high-precision comparator 3 and the analog multiplexer 6 is performed as follows. DA converter 2
-4 outputs a predetermined value to the third output and supplies it to the first input of the comparator 3 via the analog multiplexer 6. The upper limit value and the lower limit value of the threshold level of the comparator 3 with respect to this predetermined value are set to the DA converter 2-
To the second input of the comparator. The output of the comparator 3 at this time is sent to the CPU 1 and is compared with a preprogrammed result for determination. The determination result is sent to the external checker via the serial I / O circuit. This check is performed at the three points of the upper, middle and lower limits of the dynamic range of the input of the comparator 3.

PWM circuit, that is, triangular wave generation circuit 4,
Analog comparators Q1-1 to Q1-4, integration capacitors C1-1 to C1-4, sampling switch S
The accuracy check of the circuits 3-1 to S3-4, the electronic switch circuit 8-1, and the limiter circuit 41 is performed as follows.

First, a predetermined value is output to the first and third outputs of the DA converter 2-4 so that the output of the comparator 3 always turns on the switch S2. P at this time
The WM output is pulse width-integrated circuits 61-1 to 61-4.
The voltage is converted and input to the analog multiplexer, and this is AD converted to confirm that the output is zero.

Next, the first and third outputs of the DA converter 2-4 are changed so that the switch S1 is always turned on. D
-By giving a predetermined value to the second output of the A converter 2-4,
The PWM output pulse width-voltage conversion output at this time is AD-converted, the CPU 1 determines whether or not it is within an appropriate range, and sends the determination result to the external checker. D- at this time
As the second output of the A converter 2-4, three levels of the upper limit, middle and lower limit of the dynamic range of the inputs of the analog comparators Q1-1 to Q1-4 are selected.

[0063]

As described above, according to the present invention,
The structure can be simplified without lowering the control accuracy, the start-up and fall-down can be controlled according to each drive circuit, and the chip area when integrated into one chip can be reduced. In addition to this, in the invention of claim 4, without increasing the number of circuits, A-
A D conversion function can be provided, and in the invention of claim 5, the self-diagnosis of the first comparator can be performed without increasing the number of circuits, and in the invention of claim 6, the successive approximation type AD conversion without increasing the number of circuits. The self-diagnosis of means is possible, and
According to the invention, the PWM circuit can be self-diagnosed only by externally attaching the pulse width-voltage conversion circuit. According to the invention of claim 8, each drive circuit of the image forming apparatus can be PWM-controlled.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment.

FIG. 2 is a timing chart of the first embodiment.

FIG. 3 is a block diagram of a second embodiment.

FIG. 4 is a timing chart of the second embodiment.

FIG. 5 is a block diagram of a third embodiment.

FIG. 6 is a block diagram of a fourth embodiment.

FIG. 7 is a timing chart of the fifth embodiment.

FIG. 8 is a flowchart of the fifth embodiment.

FIG. 9 is a block diagram of a sixth embodiment.

[Explanation of symbols]

 2 DA converter 3 Comparator 4 Triangular wave generation circuit 6 Analog multiplexer 8 Electronic switch circuit Q1-1 to Q1-4 Comparator P1-1 to P1-4 External output terminal P2-1 to P2-4 External input terminal S3-1 to S3-4 Electronic switch

Claims (8)

[Claims] 1. A DA converter that outputs a variable reference signal and a variable control limit signal, an analog multiplexer that selects and outputs one signal from a plurality of external input terminals in a time division manner, and an output of this analog multiplexer. And the above D
A first comparator for comparing the reference signal output of the A-A converter, and a first switch for switching and outputting the control limit signal output of the D-A converter and the ground potential according to the output of the first comparator, A plurality of time constant circuits, and a second switch that outputs the output of the first switch by switching the output of the first switch to each of the time constant circuits of the plurality of time constant circuits in synchronization with the time division timing of the analog multiplexer; A triangle wave generating circuit, a plurality of external output terminals, a second constant output circuit outputs the respective time constant circuits and the triangular wave generating circuit, and outputs a comparison output to each of the plurality of external output terminals. A control device comprising a plurality of subsequent comparators. 2. A DA converter that outputs a variable reference signal and a variable control limit signal, an analog multiplexer that selects and outputs one signal from a plurality of external input terminals in a time division manner, and an output of this analog multiplexer. And the above D
A first comparator for comparing the reference signal output of the -A converter, and a first comparator for switching between a positive constant current output and a negative constant current output according to the output of the first comparator
Switch, a limiting circuit for limiting one of the positive constant current output and the negative constant current output with the control limit value, a plurality of capacitors, and the first multiplexer in synchronization with the time division timing of the analog multiplexer. A second switch for switching and outputting the output of the switch to each of the capacitors, a triangular wave generating circuit, a plurality of external output terminals, an output of each of the capacitors and an output of the triangular wave generating circuit. A control device comprising: a plurality of second and subsequent comparators that compare and output comparison outputs to respective external output terminals of the plurality of external output terminals. 3. A control device comprising: the control device according to claim 1 or 2; a microcomputer; and a peripheral circuit of the microcomputer integrated on one chip. 4. The control device according to claim 3, further comprising a successive approximation type A / D conversion means composed of a D-A converter and a microcomputer. 5. The two inputs of the first comparator are D-
4. The control device according to claim 3, further comprising a self-diagnosis unit that sends a predetermined signal from the A converter and self-diagnoses the first comparator based on the output of the first comparator. 6. A D- input to one input of the first comparator.
Sequential comparison method A-
5. The control device according to claim 4, further comprising a self-diagnosis unit that performs D conversion and performs self-diagnosis of the successive approximation type A-D conversion unit based on the conversion result. 7. A PWM circuit self-diagnosis means having a pulse width-voltage conversion circuit externally provided between an external output terminal and an external input terminal, and a successive approximation type A / D conversion means. Item 4. The control device according to item 4. 8. An output detection circuit of a power supply device, an exposure device, a fixing device, a motor drive device, etc. is connected to each external input terminal of the control device according to any one of claims 1 to 7, An image forming apparatus, wherein each drive circuit of the power supply device, the exposure device, the fixing device, the motor drive device, etc. is connected to each external output terminal of the control device.