JPH06151515A - Carrier tape, mold tool for molding and manufacture of semiconductor device using them - Google Patents

Abstract

PURPOSE:To prevent a leakage of resin occurring when a semiconductor chip on a carrier tape is sealed with the resin and also to facilitate removal of unwanted resin formed on the occasion of sealing. CONSTITUTION:A runner slit 2f to be a flow passage of molten resin is opened in an insulative tape 2 to the end in the width direction of the tape and, moreover, a metal leaf 4 for preventing a leakage of resin which enables prevention of the leakage of resin on the occasion of sealing is provided on the lateral side parts of the runner slit. A semiconductor chip mounted on this carrier tape is sealed with resin by using a top force and a bottom tool each of which has a runner gate provided at a position corresponding to the runner slit 2f of the carrier tape.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a TAB (Tape Automat).
ed Bonding) method, the present invention relates to a carrier tape used when mounting a semiconductor chip on a mounting substrate, and a molding die used when resin-sealing a semiconductor chip bonded to the carrier tape. The present invention relates to a method for manufacturing a semiconductor device using a tape and a molding die.

[0002]

2. Description of the Related Art As a technique for connecting electrodes of a semiconductor device such as a semiconductor integrated circuit device, a TAB method using a carrier tape is widely adopted along with a wire bonding method. FIG. 5A is a plan view of a conventional carrier tape on which a semiconductor chip is mounted, and FIG. 5B is a cross-sectional view taken along the line BB (for example, Japanese Patent Laid-Open No. 37823/7823).
No. 6 publication). The carrier tape 1 is composed of an insulating tape 2 formed of a resin film such as polyimide and leads 3 made of copper foil. The insulating tape 2 has a plurality of sprocket holes 2a arranged at equal intervals along both side edges thereof, and a rectangular device hole 2b for accommodating the semiconductor chip 6 in the center portion in the width direction thereof.
Has been opened.

Four outer lead holes 2c are formed in the peripheral portion of the device hole 2b along each side of the device hole. A lead support portion 2d is formed between the device hole 2b and the outer lead hole 2c. The lead support portion 2d is connected to the insulating tape body by a tie bar 2e provided between two adjacent outer lead holes 2c. It is connected.

A plurality of leads 3 are fixed on the lead support portion 2d. The tip portion of the lead 3 projects into the device hole 2b as an inner lead 3a, and the central portion thereof is located on the outer lead hole 2c as an outer lead 3b connected to an electrode of an external circuit. Further, a test pad 3c is formed at the rear end of each lead 3.

One of the four tie bars is formed with an opening 2g which serves as a flow path for the molten resin during resin molding so as to straddle a molding line 7 indicating a boundary line sealed by the resin package.

As shown in FIG. 5B, in the device hole 2b of the carrier tape 1, the bumps 6a of the semiconductor chip 6 are connected to the inner leads 3a of the leads 3, respectively. Chip 6
Forming a tape carrier. Such a tape carrier is sealed with a mold resin in order to protect the semiconductor chip 6, the leads 3 and the like from external force and the external environment.

FIG. 6 is a sectional view showing a state at the time of conventional transfer molding. The molding die 10 is composed of an upper die 10c and a lower die 10d, and the tape carrier has an upper die 10c and a lower die 1 prior to resin sealing.
It is set between 0d. At this time, the tape carrier is aligned so that the semiconductor chip 6 is housed in the cavity half 12d of the lower mold 10d. After that, the upper die 10c and the lower die 10d are clamped, the parting surface 11c of the upper die 10c is the upper surface of the lead 3, and the parting surface 11d of the lower die 10d is the lower surface of the insulating tape 2. In close contact with.

When a molten resin such as an epoxy resin is circulated in this state, the molten resin is indicated by an arrow A through the runner gate 14c of the upper die 10c and the opening 2g of the insulating tape 2 located below the gate 13c. Through the flow passage,
Cavity half 12c of upper mold 10c and lower mold 10d
And is injected into the cavity formed by the cavity half 12d.

After the resin is cured, the upper mold 10c and the lower mold 10d are opened and the molded product is taken out. As shown in FIG. 7, the obtained molded product contains unnecessary resin 8d formed on the runner gate 14c portion in addition to the mold resin 8. This unnecessary resin is called a gate break,
It is removed in the step of cutting the molded product at the portion 8c of the upper mold 10c corresponding to the gate 13c. Further, by cutting each lead 3 between the outer lead 3b and the test pad 3c and cutting the tie bar 2e of the insulating tape 2, the method for manufacturing the TAB type semiconductor device is completed.

[0010]

In the conventional carrier tape described above, in the resin sealing step, the parting surface 11c of the upper die 10c is lifted from the upper surface of the insulating tape 2 by the thickness of the lead 3 so that the resin leaks. The resin that has flowed into the outer lead holes adheres to the surfaces of the leads 3 and causes defective bonding. Further, if the resin that has adhered is attempted to be removed from the lead surface, the lead will be damaged.

Further, in the conventional example, the cavity (12c,
Since the flow path of the molten resin is limited to a narrow range by the gate 13c provided in front of 12d), the resin is vigorously injected into the cavity. Therefore, the semiconductor chip may be fixed in a tilted state due to a large impact force. In particular, when the thickness of the package is reduced to reduce the thickness of the semiconductor device, the stress applied to the semiconductor chip increases and it becomes easier to tilt, and the film thickness of the resin on the semiconductor chip decreases and the reliability of the semiconductor device decreases. I will let you.

Further, in the conventional example, since the molten resin is injected only from the upper mold side, it is difficult for the resin to wrap around uniformly, which may promote the tendency of the semiconductor chip to be tilted and fixed. It gave the cause of the package defect such as occurrence.

Further, in the conventional manufacturing method, the unnecessary resin 8
Since d is adhered on the insulating tape 2, there is a high possibility that the unnecessary resin 8d separated in the gate break process will come into contact with the leads 3 and the like, which may damage the leads.

Therefore, the object of the present invention is, firstly, to limit the flow path of the molten resin to a closed space so that the resin does not flow out to the other, and secondly, to the inside of the cavity. This is to alleviate the momentum of the injected molten resin and prevent the semiconductor chip from tilting. Thirdly, the resin is evenly injected into both the upper mold and the lower mold, resulting in a package defect. Fourthly, it is necessary to prevent unnecessary resin from adhering to the insulating film, facilitate removal of the unnecessary resin, and prevent damage to the leads and the like. .

[0015]

In the carrier tape of the present invention, sprocket holes are formed at predetermined intervals along each of two edges in the longitudinal direction, and a semiconductor chip is housed in the approximate center in the width direction. A device hole for opening is formed, and a plurality of outer lead holes are formed around the device hole. The outer lead hole is formed from the end of the side in the longitudinal direction through the tie bar portion between the two outer lead holes, and A long insulating tape having runner slits reaching up to the inner side, and a plurality of leads supported by the insulating tape and straddling the outer lead holes, one end of which extends into the device hole, It is equipped.

The mold for resin-sealing the semiconductor chip mounted on the carrier tape is provided with a runner gate serving as a passage for the molten resin in a portion of the carrier tape corresponding to the runner slit. A cavity half for resin-sealing the semiconductor chip is provided in a portion of the carrier tape corresponding to the device hole, and a gate slightly lower than a parting surface is provided between the runner gate and the cavity half. Upper mold and a lower mold having a runner gate, a cavity half and a gate respectively provided in a portion of the upper mold facing the runner gate, the cavity half and the gate. Is.

[0017]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1A is a plan view showing a state in which a semiconductor chip is mounted on a carrier tape according to the first embodiment of the present invention, and FIGS. 1B and 1C respectively show FIG. It is sectional drawing of the BB line and CC line of (a). The carrier tape 1 has an insulating tape 2 and leads 3 made of polyimide or the like.

The insulating tape 2 has a plurality of sprocket holes 2a arranged at equal intervals along both side edges thereof, and a rectangular device for accommodating the semiconductor chip 6 in the center portion in the width direction thereof. The hole 2b is opened. Four outer lead holes 2c are formed in the peripheral portion of the device hole 2b along each side of the device hole. A lead support portion 2d is formed between the device hole 2b and the outer lead hole 2c. The lead support portion 2d is connected to the insulating tape body by a tie bar 2e provided between two adjacent outer lead holes 2c. It is connected.

A runner slit 2f is formed in the insulating tape 2 so as to pass through one of the tie bars 2e from the end in the width direction and to cross a molding line 7 which indicates a boundary line sealed by a resin package during a molding process. Has been done. The runner slit 2f serves as a flow path for the molten resin when the semiconductor chip is sealed with the resin.

A plurality of leads 3 are fixed on the lead support portion 2d. The tip portion of the lead 3 projects into the device hole 2b as the inner lead 3a, and the center portion thereof is located on the outer lead hole 2c as the outer lead 3b connected to the electrode of the external circuit. Further, a test pad 3c is formed at the rear end of each lead 3.

A metal foil 4 for preventing resin leakage, which is formed of a copper foil, is fixed to the peripheral portion of the runner slit 2f like the lead 3. This metal foil 4 for preventing resin leakage is
When the tape carrier is attached to the mold,
The outer end portion is formed to be outside the side wall surface of the runner gate of the mold, that is, in contact with the parting surface of the mold. As a general rule, the inner end surface of the metal foil 4 for preventing resin leakage coincides with the side wall of the runner gate of the mold, but even if it protrudes into the runner gate or slightly recedes from the side wall surface, there is a particular problem. There is no. Further, the resin leak prevention metal foil 4 is connected by a splash prevention metal foil 5 formed at a position corresponding to the sprocket hole 2a for preventing the insulating tape 2 from splashing. . The metal foil 5 for preventing splashing also leads 3
And the width thereof is about 100 μm.

Next, a method of manufacturing a semiconductor device using the carrier tape having such a structure will be described. First, after aligning the semiconductor chip 6 having a plurality of bumps 6a formed on its surface in the device 2b of the carrier tape 1 so that the bumps 6a and the corresponding inner leads 3a of the leads 3 are aligned, Bump 6 by thermocompression bonding
a and the inner lead 3a are electrically connected. This forms the tape carrier.

Next, as shown in FIG. 2, a tape carrier is set between the upper die 10a and the lower die 10b which constitute the die 10. At this time, the semiconductor chip 6 is moved to the lower mold 10.
The tape carrier is aligned so that it is housed in the cavity half 12b of b. A cavity half 12a is formed in the upper mold 10a at a position corresponding to the cavity half 12b of the lower mold 10b.

Further, the upper mold 10a and the lower mold 10b are provided with groove-shaped runner gates 14a and 14b facing the cavity at positions corresponding to the runner slits 2f of the carrier tape. The widths of the runner gates 14a and 14b are set to the same extent as the runner slit 2f of the carrier tape so as not to exceed the range of the resin leak preventing metal foil 4 of the carrier tape. In addition, the runner gate 14a and the cavity half 12
a and runner gate 14b and cavity half 12
The boundary with b is the runner slit 2 of the carrier tape.
It is located at the position corresponding to the terminal end of f, and the gate 13
a and 13b are formed. This gate 13a, 13
The surface of b is formed at a position about 30 μm lower than the parting surface 11a of the upper mold 10a and the parting surface 11b of the lower mold 10b.

After mounting the tape carrier, the upper die 10a and the lower die 10b are clamped. As a result, the upper die 10a
The parting surface 11a of the lower die 10b is closely attached to the leads 3 and the metal foil 4 for preventing resin leakage, and
1b adheres to the lower surface of the insulating tape 2. In this state, a molten resin made of epoxy resin or the like is transferred by the transfer method through the runner gates 14a and 14b, and the upper mold 10
It is injected into the cavity formed by the cavity half 12a of a and the cavity half 12b of the lower mold 10b.

As described above, the runner gates 14a and 14b formed on the upper die 10a and the lower die 10b are formed.
Is formed so as not to stick out from the outer end portion of the resin leak prevention metal foil 4, so that after the mold is clamped, the molten resin flow passage also includes the runner gates 14a and 14b, the runner slit 2f, and the resin. It is limited to the closed space formed by the side surface of the anti-slip metal foil 4. Therefore, there is no inconvenience that the molten resin leaks from the flow passage and enters the outer lead hole 2c. The molten resin that has passed through the flow passage between the runner gates 14a and 14b is introduced into the cavity through the injection port formed by the gates 13a and 13b and the runner slit 2f. At this time, there is nothing blocking the inflow of the resin in front of the injection port, so that the resin can be injected smoothly.

After the injected resin is cured, the upper mold 1
0a and the lower mold 10b are opened and the molded product is taken out. FIG. 3 shows a cross-sectional view of the obtained molded product. Next, the unnecessary resin 8b formed in the runner gate portion by folding the resin at the resin 8a portion corresponding to the gate 13a of the upper mold 10a and the gate 13b of the lower mold 10b by the gate breaking step.
Is separated and removed from the mold resin 8. After that, each lead 3 is cut between the outer lead 3b and the test pad 3c, and the insulating tape 2 is cut by the tie bar 2e to obtain a TAB type resin-sealed semiconductor device.

In the above embodiment, since the unnecessary resin 8b formed on the runner gate portion is not formed on the insulating tape, it can be easily separated from the main body by the gate break process. Therefore, for example, by preparing a tray under the tape carrier and dropping the unnecessary resin 8b into the tray when cutting the resin, the separated unnecessary resin can be prevented from coming into contact with the leads 3 and the like. It is possible to prevent the lead 3 from being damaged. Further, since the resin is prevented from entering the outer lead hole 2c of the insulating tape 2 at the time of resin sealing, it is possible to avoid the occurrence of defective bonding and eliminate the need to remove unnecessary sealing resin from here. It is also possible to prevent lead damage due to resin removal work.

Further, gates are provided in both the upper mold 10a and the lower mold 10b, and the resin injection port is the gate 13a,
Since the width of 13b and the runner slit 2f is increased, the momentum of the inflowing resin at the time of injecting the resin can be relieved, and the injecting resin can prevent the semiconductor chip from tilting. Further, since the resin is injected into the upper and lower cavity halves 12a and 12b, the resin can be smoothly filled into the cavities and the occurrence of package defects can be suppressed.

FIG. 4A is a plan view showing a state in which a semiconductor chip is mounted on the carrier tape of the second embodiment of the present invention, and FIG. 4B is its BB line. FIG. In this embodiment, the resin leak prevention metal foil 4 having the runner slit 2f and the bounce prevention metal foil 5 provided on the carrier tape 1 of the first embodiment is point-symmetric with respect to the center of the device hole 2b. Is formed in position.
In this carrier tape, when the resin is sealed, the molten resin supply source can be installed on either the upper side or the lower side of FIG. Therefore, according to this embodiment,
In the case of the first embodiment, a pot (molten resin supply source) is arranged in the center of one die, and a so-called double-type molding apparatus that supplies tape carriers to the left and right of the pot can be constructed. It is possible to improve mass productivity.

[0031]

As described above, in the carrier tape of the present invention, the runner slit is provided from the widthwise end of the tape to the position reaching the mold line, and the metal foil for preventing resin leakage is provided around the runner slit. The upper and lower molds used to seal the semiconductor chips on the carrier tape are provided with runner gates at the positions corresponding to the runner slits, and the runner gate ends are each provided with a runner gate. Since the gate is provided, the following effects can be obtained.

The impact of the molten resin injected into the cavity on the semiconductor chip can be mitigated, and the inclination of the semiconductor chip and the deformation of the leads can be prevented. Since unnecessary resin is not formed on the carrier tape,
Unnecessary resin can be easily removed from the main body during a gate break. In addition, the separated unnecessary resin can be prevented from coming into contact with the leads and the like, and the leads and the like can be prevented from being damaged. It is possible to prevent the resin from entering the outer lead holes, prevent the bondability of the leads from deteriorating, and avoid damage to the leads due to resin removal. Since the molten resin is injected into both the cavity halves of the upper and lower molds at the time of resin sealing, the resin can be smoothly filled in the cavities and the occurrence of package defects can be suppressed.

[Brief description of drawings]

FIG. 1 is a plan view and a sectional view showing a carrier tape according to a first embodiment of the present invention.

FIG. 2 is a sectional view for explaining a method for manufacturing a semiconductor device using the carrier tape according to the first embodiment.

FIG. 3 is a cross-sectional view illustrating the method for manufacturing a semiconductor device using the carrier tape according to the first embodiment.

FIG. 4 is a plan view and a sectional view showing a carrier tape according to a second embodiment of the present invention.

FIG. 5 is a plan view and a sectional view of a conventional carrier tape.

FIG. 6 is a cross-sectional view for explaining a method for manufacturing a semiconductor device using a conventional carrier tape.

FIG. 7 is a sectional view for explaining a method for manufacturing a semiconductor device using a conventional carrier tape.

[Explanation of symbols]

1 ... Carrier tape, 2 ... Insulating tape, 2a
... Sprocket hole, 2b ... Device hole, 2c ... Outer lead hole, 2d ... Lead support part, 2e
… Tie bar, 2f… Runner slit, 2g…
Opening, 3 ... Lead, 3a ... Inner lead,
3b ... outer lead, 3c ... test pad,
4 ... Metal foil for preventing resin leakage, 5 ... Metal foil for preventing splashing, 6 ... Semiconductor chip, 6a ... Bump,
7 ... Mold line, 8 ... Mold resin, 8a,
8c ... Resin corresponding to the gate portion, 8b, 8d ... Unnecessary resin, 10 ... Mold, 10a, 10c ... Upper mold,
10b, 10d ... Lower mold, 11a, 11b ... Parting surface, 12a, 12b, 12c, 12d ...
Cavity half, 13a, 13b, 13c ... Gate, 14a, 14b, 14c ... Runner gate.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁵ Identification code Internal reference number FI technical display location // B29L 31:34 4F

Claims (8)

[Claims] 1. A sprocket hole is formed at a predetermined interval along each edge of two sides in the longitudinal direction, and a device hole for accommodating a semiconductor chip is formed substantially at the center in the width direction. A plurality of outer lead holes are formed around the device hole, and a runner slit is formed from the end of the side in the longitudinal direction through the tie bar portion between the two outer lead holes to reach the inside of the tie bar portion. A carrier tape comprising: a long insulating tape that extends; and a plurality of leads that are supported by the insulating tape and that extend over the outer lead holes and have one end protruding into the device hole. 2. The carrier tape according to claim 1, wherein a pair of metal foils for preventing resin leakage are formed on the insulating tape along the ends of the runner slits. 3. The carrier tape according to claim 2, wherein the pair of metal foils for preventing resin leakage are connected by a metal foil for preventing bounce overlaid on the runner slit. 4. The runner slit passes through a place where the sprocket hole is to be formed, and one of the pair of resin leak-preventing metal foils and the pair of bounce-preventing metal foils forms one. The carrier tape according to claim 3, wherein sprocket holes are formed. 5. The runner slits are provided at two points in point symmetry with respect to the device hole.
The carrier tape according to 2, 3, or 4. 6. An insulating tape in which a device hole for housing a semiconductor chip is opened, and a runner slit is opened from the end of the side in the longitudinal direction to the vicinity of the device hole, and on the insulating tape. Is a mold for resin-sealing a semiconductor chip mounted on a carrier tape, which is supported by, and has one end protruding into the device hole, and in the runner slit of the carrier tape. A runner gate serving as a passage for molten resin is provided in a corresponding portion, and a cavity half for resin-sealing the semiconductor chip is provided in a portion corresponding to the device hole of the carrier tape. An upper mold having a gate slightly lower than the parting surface between the cavity half and the upper mold; N'nageto, the cavity half and said gate opposite to each portion runner gate, mold die provided with a lower mold cavity half and a gate is provided. 7. The upper mold and the lower mold are provided with runner gates, gates, and cavity halves, which are supplied with the molten resin from the same molten resin supply source, at two positions in the width direction of the insulating tape. The mold for molding according to claim 6. 8. An insulating tape in which a device hole for housing a semiconductor chip is opened, and a runner slit is opened from an end of a side in the longitudinal direction to a position close to the device hole, and the insulating tape. A semiconductor chip mounted on a carrier tape, the carrier tape having a plurality of leads each having one end protruding into the device hole, the carrier tape having the semiconductor chip mounted on the carrier tape, and the runner slit of the carrier tape. A runner gate that serves as a passage for molten resin is provided in the part corresponding to
A cavity half for resin-sealing the semiconductor chip is provided in a portion of the carrier tape corresponding to the device hole, and a gate slightly lower than a parting surface is provided between the runner gate and the cavity half. Between the upper mold and the lower mold in which the runner gate of the upper mold, the cavity half and the portion facing the gate, and the lower mold provided with the cavity half and the gate, respectively, The runner slit is between the runner gates, and
Guiding the device hole so that it is located between the cavity halves, and a passage through which the molten resin is formed by the runner slit and the two runner gates, and by the runner slit and the two gates. Through a hole formed by the two cavity halves to fill the cavity with a molten resin, and the molten resin in the cavity is cured to seal the semiconductor chip with a resin. A method of manufacturing a semiconductor device, comprising: