JPH0614681B2 - Image signal processing method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an image signal processing method, and more particularly to an image signal processing method for expressing a halftone image in black and white binary.

[Prior art]

In a facsimile or the like, when a halftone image is represented by binary black and white, an image signal is generally binarized by a dither method. However, in such a conventional processing method, there is a problem that image quality deterioration occurs due to chipping or crushing in the character portion included in the halftone image.

〔Purpose〕

It is an object of the present invention to provide an image signal processing method which prevents the above-mentioned image quality deterioration of a character portion due to the dithering method of a halftone image.

〔Example〕

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 10 is a CCD image sensor for reading an original, main scanning is performed by this CCD image sensor 10, and sub-scanning is performed by feeding the original. 1
An image sensor driver 2 drives the CCD image sensor 10, to which the line synchronization signal LS and the clock MC are input.

The analog image signal VD1 output from the CCD image sensor 10 is applied to one input of the comparator 14. A fixed slice level obtained by dividing 12 V by the potentiometer 16 is applied to the other input of the comparator 14, and a binary image signal VD5 obtained by binarizing the image signal VD1 by the fixed slice level is output from the comparator 14. Is output.

Reference numeral 18 is a circuit for binarizing the image signal VD1 by the dither method, and includes a counter 20 for counting the line synchronization signal LS, a counter 22 for counting the clock MC, a ROM 24 storing a dither matrix, and a digital / analog converter 26. , And a comparator 28. From the ROM 24, the stored data at the address designated by the outputs of the counters 20 and 22, that is, the varying slice level is read out, which is converted into an analog signal by the digital / analog converter 26 and is input to one input of the comparator 28. Is applied. The image signal VD1 is applied to the other input of the comparator 28, and the binary image signal VD2 obtained by binarizing the image signal VD1 at the variable slice level is output from the comparator 28.

Reference numerals 30 and 32 are RAMs for storing binary image signals for one line, 34 is an address counter for generating addresses of the RAMs 30 and 32, and 36 is a RAM 30,
32 read / write control read / write
It is a light controller. A line synchronization signal L is sent to the address counter 34 and the read / write controller 36.
S and clock MC are input respectively.

The binary image signal VD2 output from the comparator 28 is
It is directly input to the 3-bit shift register 38 and also input to the RAM 30. From this RAM30,
The binary image signal VD3 of the immediately preceding line is output in synchronization with the binary image signal VD2 of the line currently being scanned, and this is input to the 3-bit shift register 40 and RA
It is input to M32. The binary image signal VD4 of the line two lines before the line currently being scanned is output from the RAM 32 in synchronization with the image signal VD2, and this is input to the 3-bit shift register 42. The shift register 38,
The shift clocks 40 and 42 are the address counter 34
Supplied from

Thus, the pixels A to I in the 3 × 3 pixel area shown in FIG.
A binary image signal by the dither method for the shift register 3
8 to 42. The pixels A to I correspond to the outputs A to I of the shift registers 38 to 42, respectively. Here, the central pixel E is the target pixel to be processed.

The outputs of the shift registers 38 to 42 are applied to the address inputs of the ROM 44 in parallel. Further, the binary image signal VD5 at the fixed slice level is delayed by one pixel by the 2-bit shift register 46 and applied to one address input of the ROM 44. The shift register 46 is provided to convert the binary image signal VD5 into the binary image signals VD2 and VD2.
This is to match the timing of D3 and VD4.

The ROM 44 stores a logical table according to the regulations described below in order to remove the unevenness of the character portion of the image.

The patterns of the binary image signals extracted by the shift registers 38 to 42 by the dither method of 3 × 3 pixels are shown in FIG.
In any one of (d), when the binary image signal with the fixed slice level for the target pixel is white, the white image signal VD6
Is output.

If the binary image signal pattern of the 3 × 3 pixel dither method is any one of (e) to (h) in FIG. 3 and the binary image signal with the fixed slice level for the target pixel is black, And outputs the binary image signal VD6.

When none of the above conditions is satisfied, the output E of the shift register 40 is output as it is as the binary image signal VD6.

By such processing, the unevenness of the character portion caused by the binarization by the dither method is corrected.

For example, when the binary image signal VD2 obtained by the dither method is reproduced as it is, as shown in FIG.
In the case of an image in which is generated, the reproduction pattern of the binary image signal VD6 output through the ROM 44 is as shown in FIG. 5, and the unevenness before processing is removed. Generally, when the image signal of the character portion and the picture portion is dithered, black pixels are often arranged in a dispersed manner in the picture portion (because there are many halftones),
Like the pattern shown in FIG. 3, black pixels are less likely to be concentrated. On the other hand, in the character portion, black pixels are likely to be concentrated as shown in FIG. Therefore, the above-mentioned unevenness removal is performed only on the character portion, and the image quality of the picture portion is not deteriorated. Thus, the image quality of the character portion can be improved without degrading the image quality of the picture portion.

FIG. 6 is a timing chart of each signal in FIG.

〔effect〕

As is apparent from the above description, according to the present invention, a binary image signal binarized by the dither method is binarized at a fixed slice level under a predetermined condition. The image quality of the character portion can be improved without degrading the image quality of the picture portion.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a conceptual diagram showing a pixel array of 3 × 3 pixels centering on a target pixel, and FIG. 3 is explaining a rule of removing irregularities of a character portion. FIG. 4 is a conceptual diagram showing an example of a pattern before performing the unevenness removing process, FIG. 5 is a conceptual diagram showing the pattern after performing the pattern unevenness removing process of FIG. 4, and FIG. FIG. 3 is a timing chart of each signal in FIG. 10 ... CCD image sensor, 12 ... Image sensor driver, 14, 28 ... Comparator, 20, 22
...... Counter, 24 …… ROM, 26 …… Digital / analog converter, 30, 32 …… RAM, 34 …… Address counter, 3
6 ... Read / write controller, 38, 40, 42 ... 3-bit shift register, 44 ... ROM, 46 ... 2-bit shift register.

Claims (1)

[Claims] 1. A unit for binarizing an image signal into a first binary image signal at a fixed slice level; a unit for binarizing the image signal into a second binary image signal by a dither method; A binary image signal of n × m pixels centered on the pixel of interest, and a second n × m pixel centered on the extracted pixel of interest.
And the first binary image signal corresponding to the target pixel are input, and the target pixel in the second binary image signal of the n × m pixels is black, and half or more of the surrounding pixels are The first condition is that the pixel is continuously white and the first binary image signal corresponding to the pixel of interest is white, and the second condition of the n × m pixels is the second condition.
The second condition is that the target pixel in the binary image signal is white, more than half of the surrounding pixels are continuously black, and the first binary image signal corresponding to the target pixel is black. A case other than the first condition and the second condition is set as a third condition, and in the case of the first condition and the second condition, a first binary image signal corresponding to the target pixel is output, and the third condition is output. In the case of, the means for outputting the binary image signal of the pixel of interest in the second binary image signal of the n × m pixels.